The 1/fγ noise characteristic parameter Sfγ model in an n-MOSFET under DC hot carrier stress is studied. A method characterizing the MOSFET abilities of an anti-hot carrier with noise parameter Sfγ is presented. Th...The 1/fγ noise characteristic parameter Sfγ model in an n-MOSFET under DC hot carrier stress is studied. A method characterizing the MOSFET abilities of an anti-hot carrier with noise parameter Sfγ is presented. The hot carrier degradation effect of n-MOSFET in high-,mid-,and low gate stresses and its 1/fγ noise feature are studied. Experimental results agree well with the developed model.展开更多
In this study,the neutral gas distribution and steady-state discharge under different discharge channel lengths were studied via numerical simulations.The results show that the channel with a length of 22 mm has the a...In this study,the neutral gas distribution and steady-state discharge under different discharge channel lengths were studied via numerical simulations.The results show that the channel with a length of 22 mm has the advantage of comprehensive discharge performance.At this time,the magnetic field intensity at the anode surface is 10%of the peak magnetic field intensity.Further analysis shows that the high-gas-density zone moves outward due to the shortening of the channel length,which optimizes the matching between the gas flow field and the magnetic field,and thus increases the ionization rate.The outward movement of the main ionization zone also reduces the ion loss on the wall surface.Thus,the propellant utilization efficiency can reach a maximum of 96.8%.Moreover,the plasma potential in the main ionization zone will decrease with the shortening of the channel.The excessively short-channel will greatly reduce the voltage utilization efficiency.The thrust is reduced to a minimum of 46.1 m N.Meanwhile,because the anode surface is excessively close to the main ionization zone,the discharge reliability is also difficult to guarantee.It was proved that the performance of Hall thrusters can be optimized by shortening the discharge channel appropriately,and the specific design scheme of short-channel of HEP-1350 PM was defined,which serves as a reference for the optimization design of Hall thruster with large height–radius ratio.The shortchannel design also helps to reduce the thruster axial dimension,further consolidating the advantages of lightweight and large thrust-to-weight ratio of the Hall thruster with large height–radius ratio.展开更多
we investigate the effects of 60^Co γ-ray irradiation on the 130 nm partially-depleted silicon-on-isolator （PDSOI） input/output （I/O） n-MOSFETs. A shallow trench isolation （STI） parasitic transistor is responsi...we investigate the effects of 60^Co γ-ray irradiation on the 130 nm partially-depleted silicon-on-isolator （PDSOI） input/output （I/O） n-MOSFETs. A shallow trench isolation （STI） parasitic transistor is responsible for the observed hump in the back-gate transfer characteristic curve. The STI parasitic transistor, in which the trench oxide acts as the gate oxide, is sensitive to the radiation, and it introduces a new way to characterize the total ionizing dose （TID） responses in the STI oxide. A radiation enhanced drain induced barrier lower （DIBL） effect is observed in the STI parasitic transistor. It is manifested as the drain bias dependence of the radiation-induced off-state leakage and the increase of the DIBL parameter in the STI parasitic transistor after irradiation. Increasing the doping concentration in the whole body region or just near the STI sidewall can increase the threshold voltage of the STI parasitic transistor, and further reduce the radiation-induced off-state leakage. Moreover, we find that the radiation-induced trapped charge in the buried oxide leads to an obvious front-gate threshold voltage shift through the coupling effect. The high doping concentration in the body can effectively suppress the radiation-induced coupling effect.展开更多
Hot carriers injection （HCI） tests for ultra-short channel n-MOSFET devices were studied. The experimental data of short channel devices （75-90 nm）, which does not fit formal degradation power law well, will bring...Hot carriers injection （HCI） tests for ultra-short channel n-MOSFET devices were studied. The experimental data of short channel devices （75-90 nm）, which does not fit formal degradation power law well, will bring severe error in lifetime prediction. This phenomenon usually happens under high drain voltage （Vd） stress condition. A new model was presented to fit the degradation curve better. It was observed that the peak of the substrate current under low drain voltage stress cannot be found in ultra-short channel device. Devices with different channel lengths were studied under different Vd stresses in order to understand the relations between peak of substrate current （/sub） and channel length/stress voltage.展开更多
This paper gives the short channel analytical theory of the bipolar field-effect transistor （BiFET） with the drift and diffusion currents separately computed in the analytical theory. As in the last-month paper whic...This paper gives the short channel analytical theory of the bipolar field-effect transistor （BiFET） with the drift and diffusion currents separately computed in the analytical theory. As in the last-month paper which represented the drift and diffusion current by the single electrochemical （potential-gradient） current, the two-dimensional transistor is partitioned into two sections, the source and drain sections, each can operate as the electron or hole emitter or collector under specific combinations of applied terminal voltages. Analytical solution is then obtained in the source and drain sections by separating the two-dimensional trap-free Shockley Equations into two one-dimensional equations parametrically coupled via the surface-electric-potential and by using electron current continuity and hole current continuity at the boundary between the emitter and collector sections. Total and the drift and diffusion components of the electron-channel and hole-channel currents and output and transfer conductances, and the electrical lengths of the two sections are computed and presented in graphs as a function of the D. C. terminal voltages for the model transistor with two identical and connected metal-oxide-silicon-gates （MOS-gates） on a thin pure-silicon base over practical ranges of thicknesses of the silicon base and gate oxide. Deviations of the two-section short-channel theory from the one-section long-channel theory are described.展开更多
The field-effect transistor is inherently bipolar, having simultaneously electron and hole surface and volume channels and currents. The channels and currents are controlled by one or more externally applied transvers...The field-effect transistor is inherently bipolar, having simultaneously electron and hole surface and volume channels and currents. The channels and currents are controlled by one or more externally applied transverse electric fields. It has been known as the unipolar field-effect transistor for 55-years since Shockley＇s 1952 invention,because the electron-current theory inevitably neglected the hole current from over-specified internal and boundary conditions, such as the electrical neutrality and the constant hole-electrochemical-potential, resulting in erroneous solutions of the internal and terminal electrical characteristics from the electron channel current alone, which are in gross error when the neglected hole current becomes comparable to the electron current, both in subthreshold and strong inversion. This report presents the general theory, that includes both electron and hole channels and currents. The rectangular （ x, y, z） parallelepiped transistors,uniform in the width direction （z-axis）,with one or two MOS gates on thin and thick,and pure and impure base, are used to illustrate the two-dimensional effects and the correct internal and boundary conditions for the electric and the electron and hole electrochemical potentials. Complete analytical equations of the DC current-voltage characteristics of four common MOS transistor structures are derived without over-specification： the 1-gate on semi-infinite-thick impure-base （the traditional bulk transistor）, the 1-gate on thin impure-silicon layer over oxide-insulated silicon bulk （SOI） ,the 1-gate on thin impure-silicon layer deposited on insulating glass （SOI TFT）, and the 2-gates on thin pure-base （FinFETs）.展开更多
N and P-channel groove-gate MOSFETs based on a self-aligned CMOS process have been fabricated and characterized. For the devices with channel length of 140nm, the measured drain induced barrier lowering （DIBL） was 6...N and P-channel groove-gate MOSFETs based on a self-aligned CMOS process have been fabricated and characterized. For the devices with channel length of 140nm, the measured drain induced barrier lowering （DIBL） was 66mV/V for n-MOSFETs and 82mV/V for p-MOSFETs. The substrate current of a groove-gate n-MOSFET was 150 times less than that of a conventional planar n-MOSFET, These results demonstrate that groove-gate MOSFETs have excellent capabilities in suppressing short-channel effects. It is worth emphasizing that our groove-gate MOSFET devices are fabricated by using a simple process flow, with the potential of fabricating devices in the sub-100nm range.展开更多
Using the semi-insulating property and small lattice constant a of wurtzite BGaN alloy, we propose a BGaN buffer with a B-content of 1% to enhance two-dimensional electron gas(2 DEG) confinement in a short-gate AlGaN/...Using the semi-insulating property and small lattice constant a of wurtzite BGaN alloy, we propose a BGaN buffer with a B-content of 1% to enhance two-dimensional electron gas(2 DEG) confinement in a short-gate AlGaN/GaN highelectron mobility transistor(HEMT). Based on the two-dimensional TCAD simulation, the direct current(DC) and radio frequency(RF) characteristics of the AlGaN/GaN/B_(0.01)Ga_(0.99)N structure HEMTs are theoretically studied. Our results show that the BGaN buffer device achieves good pinch-off quality and improves RF performance compared with GaN buffer device. The BGaN buffer device can allow a good immunity to shift of threshold voltage for the aspect ratio(LG/d)down to 6, which is much lower than that the GaN buffer device with L_G/d=11 can reach. Furthermore, due to a similar manner of enhancing 2 DEG confinement, the B_(0.01)Ga_(0.99)N buffer device has similar DC and RF characteristics to those the AlGaN buffer device possesses, and its ability to control short-channel effects(SCEs) is comparable to that of an Al_(0.03)Ga_(0.97)N buffer. Therefore, this BGaN buffer with very small B-content promises to be a new method to suppress SCEs in GaN HEMTs.展开更多
In this work, we use a 3-nm-thick Al0.64In0.36N back-barrier layer in In0.17Al0.83N/GaN high-electron mobility transistor （HEMT） to enhance electron confinement. Based on two-dimensional device simulations, the infl...In this work, we use a 3-nm-thick Al0.64In0.36N back-barrier layer in In0.17Al0.83N/GaN high-electron mobility transistor （HEMT） to enhance electron confinement. Based on two-dimensional device simulations, the influences of Al0.64In0.36N back-barrier on the direct-current （DC） and radio-frequency （RF） characteristics of InAlN/GaN HEMT are investigated, theoretically. It is shown that an effective conduction band discontinuity of approximately 0.5 eV is created by the 3-nm-thick Al0.64In0.36N back-barrier and no parasitic electron channel is formed. Comparing with the conventional InAlN/GaN HEMT, the electron confinement of the back-barrier HEMT is significantly improved, which allows a good immunity to short-channel effect （SCE） for gate length decreasing down to 60 nm （9-nm top barrier）. For a 70-nm gate length, the peak current gain cut-off frequency （fT） and power gain cut-off frequency （fmax） of the back-barrier HEMT are 172 GHz and 217 GHz, respectively, which are higher than those of the conventional HEMT with the same gate length.展开更多
文摘The 1/fγ noise characteristic parameter Sfγ model in an n-MOSFET under DC hot carrier stress is studied. A method characterizing the MOSFET abilities of an anti-hot carrier with noise parameter Sfγ is presented. The hot carrier degradation effect of n-MOSFET in high-,mid-,and low gate stresses and its 1/fγ noise feature are studied. Experimental results agree well with the developed model.
基金This work is funded by the Defense Industrial Technology Development Program(No.JCKY2019603B005)National Natural Science Foundation of China(Nos.52076054,51777045)the Hunan Science and Technology Innovation Project(No.2019RS1102).
文摘In this study,the neutral gas distribution and steady-state discharge under different discharge channel lengths were studied via numerical simulations.The results show that the channel with a length of 22 mm has the advantage of comprehensive discharge performance.At this time,the magnetic field intensity at the anode surface is 10%of the peak magnetic field intensity.Further analysis shows that the high-gas-density zone moves outward due to the shortening of the channel length,which optimizes the matching between the gas flow field and the magnetic field,and thus increases the ionization rate.The outward movement of the main ionization zone also reduces the ion loss on the wall surface.Thus,the propellant utilization efficiency can reach a maximum of 96.8%.Moreover,the plasma potential in the main ionization zone will decrease with the shortening of the channel.The excessively short-channel will greatly reduce the voltage utilization efficiency.The thrust is reduced to a minimum of 46.1 m N.Meanwhile,because the anode surface is excessively close to the main ionization zone,the discharge reliability is also difficult to guarantee.It was proved that the performance of Hall thrusters can be optimized by shortening the discharge channel appropriately,and the specific design scheme of short-channel of HEP-1350 PM was defined,which serves as a reference for the optimization design of Hall thruster with large height–radius ratio.The shortchannel design also helps to reduce the thruster axial dimension,further consolidating the advantages of lightweight and large thrust-to-weight ratio of the Hall thruster with large height–radius ratio.
基金supported by the Opening Project of Science and Technology on Reliability Physics and Application Technology of Electronic Component Laboratory,China(Grant No.ZHD201205)the National Natural Science Foundation of China(Grant No.61106103)
文摘we investigate the effects of 60^Co γ-ray irradiation on the 130 nm partially-depleted silicon-on-isolator （PDSOI） input/output （I/O） n-MOSFETs. A shallow trench isolation （STI） parasitic transistor is responsible for the observed hump in the back-gate transfer characteristic curve. The STI parasitic transistor, in which the trench oxide acts as the gate oxide, is sensitive to the radiation, and it introduces a new way to characterize the total ionizing dose （TID） responses in the STI oxide. A radiation enhanced drain induced barrier lower （DIBL） effect is observed in the STI parasitic transistor. It is manifested as the drain bias dependence of the radiation-induced off-state leakage and the increase of the DIBL parameter in the STI parasitic transistor after irradiation. Increasing the doping concentration in the whole body region or just near the STI sidewall can increase the threshold voltage of the STI parasitic transistor, and further reduce the radiation-induced off-state leakage. Moreover, we find that the radiation-induced trapped charge in the buried oxide leads to an obvious front-gate threshold voltage shift through the coupling effect. The high doping concentration in the body can effectively suppress the radiation-induced coupling effect.
基金Project supported by the National Natural Science Foundation of China （Grant No 60376024）.
文摘Hot carriers injection （HCI） tests for ultra-short channel n-MOSFET devices were studied. The experimental data of short channel devices （75-90 nm）, which does not fit formal degradation power law well, will bring severe error in lifetime prediction. This phenomenon usually happens under high drain voltage （Vd） stress condition. A new model was presented to fit the degradation curve better. It was observed that the peak of the substrate current under low drain voltage stress cannot be found in ultra-short channel device. Devices with different channel lengths were studied under different Vd stresses in order to understand the relations between peak of substrate current （/sub） and channel length/stress voltage.
文摘This paper gives the short channel analytical theory of the bipolar field-effect transistor （BiFET） with the drift and diffusion currents separately computed in the analytical theory. As in the last-month paper which represented the drift and diffusion current by the single electrochemical （potential-gradient） current, the two-dimensional transistor is partitioned into two sections, the source and drain sections, each can operate as the electron or hole emitter or collector under specific combinations of applied terminal voltages. Analytical solution is then obtained in the source and drain sections by separating the two-dimensional trap-free Shockley Equations into two one-dimensional equations parametrically coupled via the surface-electric-potential and by using electron current continuity and hole current continuity at the boundary between the emitter and collector sections. Total and the drift and diffusion components of the electron-channel and hole-channel currents and output and transfer conductances, and the electrical lengths of the two sections are computed and presented in graphs as a function of the D. C. terminal voltages for the model transistor with two identical and connected metal-oxide-silicon-gates （MOS-gates） on a thin pure-silicon base over practical ranges of thicknesses of the silicon base and gate oxide. Deviations of the two-section short-channel theory from the one-section long-channel theory are described.
文摘The field-effect transistor is inherently bipolar, having simultaneously electron and hole surface and volume channels and currents. The channels and currents are controlled by one or more externally applied transverse electric fields. It has been known as the unipolar field-effect transistor for 55-years since Shockley＇s 1952 invention,because the electron-current theory inevitably neglected the hole current from over-specified internal and boundary conditions, such as the electrical neutrality and the constant hole-electrochemical-potential, resulting in erroneous solutions of the internal and terminal electrical characteristics from the electron channel current alone, which are in gross error when the neglected hole current becomes comparable to the electron current, both in subthreshold and strong inversion. This report presents the general theory, that includes both electron and hole channels and currents. The rectangular （ x, y, z） parallelepiped transistors,uniform in the width direction （z-axis）,with one or two MOS gates on thin and thick,and pure and impure base, are used to illustrate the two-dimensional effects and the correct internal and boundary conditions for the electric and the electron and hole electrochemical potentials. Complete analytical equations of the DC current-voltage characteristics of four common MOS transistor structures are derived without over-specification： the 1-gate on semi-infinite-thick impure-base （the traditional bulk transistor）, the 1-gate on thin impure-silicon layer over oxide-insulated silicon bulk （SOI） ,the 1-gate on thin impure-silicon layer deposited on insulating glass （SOI TFT）, and the 2-gates on thin pure-base （FinFETs）.
基金Project supported by the National Natural Science Foundation of China （Grant No 60376024）.
文摘N and P-channel groove-gate MOSFETs based on a self-aligned CMOS process have been fabricated and characterized. For the devices with channel length of 140nm, the measured drain induced barrier lowering （DIBL） was 66mV/V for n-MOSFETs and 82mV/V for p-MOSFETs. The substrate current of a groove-gate n-MOSFET was 150 times less than that of a conventional planar n-MOSFET, These results demonstrate that groove-gate MOSFETs have excellent capabilities in suppressing short-channel effects. It is worth emphasizing that our groove-gate MOSFET devices are fabricated by using a simple process flow, with the potential of fabricating devices in the sub-100nm range.
基金Project supported by the Foundation Project of the Science and Technology on Electro-Optical Information Security Control Laboratory,China(Grant No.614210701041705)
文摘Using the semi-insulating property and small lattice constant a of wurtzite BGaN alloy, we propose a BGaN buffer with a B-content of 1% to enhance two-dimensional electron gas(2 DEG) confinement in a short-gate AlGaN/GaN highelectron mobility transistor(HEMT). Based on the two-dimensional TCAD simulation, the direct current(DC) and radio frequency(RF) characteristics of the AlGaN/GaN/B_(0.01)Ga_(0.99)N structure HEMTs are theoretically studied. Our results show that the BGaN buffer device achieves good pinch-off quality and improves RF performance compared with GaN buffer device. The BGaN buffer device can allow a good immunity to shift of threshold voltage for the aspect ratio(LG/d)down to 6, which is much lower than that the GaN buffer device with L_G/d=11 can reach. Furthermore, due to a similar manner of enhancing 2 DEG confinement, the B_(0.01)Ga_(0.99)N buffer device has similar DC and RF characteristics to those the AlGaN buffer device possesses, and its ability to control short-channel effects(SCEs) is comparable to that of an Al_(0.03)Ga_(0.97)N buffer. Therefore, this BGaN buffer with very small B-content promises to be a new method to suppress SCEs in GaN HEMTs.
基金supported by the Natural Science Foundation of Hebei Province,China(Grant No.F2013202256)
文摘In this work, we use a 3-nm-thick Al0.64In0.36N back-barrier layer in In0.17Al0.83N/GaN high-electron mobility transistor （HEMT） to enhance electron confinement. Based on two-dimensional device simulations, the influences of Al0.64In0.36N back-barrier on the direct-current （DC） and radio-frequency （RF） characteristics of InAlN/GaN HEMT are investigated, theoretically. It is shown that an effective conduction band discontinuity of approximately 0.5 eV is created by the 3-nm-thick Al0.64In0.36N back-barrier and no parasitic electron channel is formed. Comparing with the conventional InAlN/GaN HEMT, the electron confinement of the back-barrier HEMT is significantly improved, which allows a good immunity to short-channel effect （SCE） for gate length decreasing down to 60 nm （9-nm top barrier）. For a 70-nm gate length, the peak current gain cut-off frequency （fT） and power gain cut-off frequency （fmax） of the back-barrier HEMT are 172 GHz and 217 GHz, respectively, which are higher than those of the conventional HEMT with the same gate length.
