Effects of gate-buffer combined with a p-type spacer structure on silicon carbide metal semiconductor field-effect transistors

An improved structure of silicon carbide metal-semiconductor field-effect transistors （MESFET） is proposed for high power microwave applications. Numerical models for the physical and electrical mechanisms of the device are presented, and the static and dynamic electrical performances are analysed. By comparison with the conventional structure, the proposed structure exhibits a superior frequency response while possessing better DC characteristics. A p-type spacer layer, inserted between the oxide and the channel, is shown to suppress the surface trap effect and improve the distribution of the electric field at the gate edge. Meanwhile, a lightly doped n-type buffer layer under the gate reduces depletion in the channel, resulting in an increase in the output current and a reduction in the gate-capacitance. The structural parameter dependences of the device performance are discussed, and an optimized design is obtained. The results show that the maximum saturation current density of 325 mA/mm is yielded, compared with 182 mA/mm for conventional MESFETs under the condition that the breakdown voltage of the proposed MESFET is larger than that of the conventional MESFET, leading to an increase of 79% in the output power density. In addition, improvements of 27% cut-off frequency and 28% maximum oscillation frequency are achieved compared with a conventional MESFET, respectively.

New 4H silicon carbide metal semiconductor field-effect transistor with a buffer layer between the gate and the channel layer

A new 4H silicon carbide metal semiconductor field-effect transistor （4H-SiC MESFET） structure with a buffer layer between the gate and the channel layer is proposed in this paper for high power microwave applications. The physics-based analytical models for calculating the performance of the proposed device are obtained by solving one- and two-dimensional Poisson＇s equations. In the models, we take into account not only two regions under the gate but also a third high field region between the gate and the drain which is usually omitted. The direct-current and the alternating- current performances for the proposed 4H-SiC MESFET with a buffer layer of 0.2 ~tm are calculated. The calculated results are in good agreement with the experimental data. The current is larger than that of the conventional structure. The cutoff frequency （fT） and the maximum oscillation frequency （fmax） are 20.4 GHz and 101.6 GHz, respectively, which are higher than 7.8 GHz and 45.3 GHz of the conventional structure. Therefore, the proposed 4H-SiC MESFET structure has better power and microwave performances than the conventional structure.

Design consideration and fabrication of 1.2-kV 4H-SiC trenched-and-implanted vertical junction field-effect transistors

We present the design consideration and fabrication of 4H-SiC trenched-and-implanted vertical junction field-effect transistors （TI-VJFETs）. Different design factors, including channel width, channel doping, and mesa height, are con- sidered and evaluated by numerical simulations. Based on the simulation result, normally-on and normally-off devices are fabricated. The fabricated device has a 12 μm thick drift layer with 8 × 10^15 cm^-3 N-type doping and 2.6 μm channel length. The normally-on device shows a 1.2 kV blocking capability with a minimum on-state resistance of 2.33 mΩ.cm2, while the normally-off device shows an on-state resistance of 3.85 mΩ.cm2. Both the on-state and the blocking performances of the device are close to the state-of-the-art values in this voltage range.

基于常通型SiC JFET器件的中低压直流固态断路器研究综述

直流固态断路器(SSCB)作为直流配电网中关键的故障保护装置,是快速无弧隔离短路、过电流故障的重要手段。随着宽禁带半导体材料技术的飞速发展,常通型碳化硅(SiC)结型场效应晶体管(JFET)因其具有通态损耗低、零电压开通等优点,已成为SSCB主开关应用的理想器件之一。该文主要论述了直流SSCB的发展现状,针对国内外提出的基于常通型SiC JFET器件的SSCB拓扑结构进行归纳总结。在此基础上,详细论述基于常通型SiC JFET器件的单向、双向低压SSCB在过载、短路保护方面的研究现状及串联、并联型中压SSCB的拓扑结构、工作原理及应用特点,讨论了可应用于SSCB的缓冲电路及其性能特点。最后,展望了基于常通型SiC JFET器件的中低压直流SSCB发展前景。

寄生参数对基于常通型SiC JFET器件的中压直流固态断路器过电压的影响及抑制方法

研究了寄生电感对基于常通型碳化硅(silicon carbide,SiC)结型场效应晶体管(junction field effect transistor,JFET)串联结构的中压直流固态断路器(solid state circuit breaker,SSCB)过电压的影响,并在此基础上提出了一种SSCB的过电压抑制方法。首先介绍了基于常通型SiC JFET器件串联结构的SSCB拓扑及工作原理,建立了考虑完整回路寄生电感的SiC JFET串联结构开关过程的数学模型。其次利用MATLAB软件对数学模型进行解析计算,揭示了SSCB开关过程中寄生电感对SiC JFET器件串联运行时过电压的影响机理,并利用PSPICE仿真结果验证了理论分析的正确性。最后设计了一种适用于SSCB过电压抑制的单栅极驱动及缓冲电路,并通过SSCB实验样机验证了所提方法的有效性。

Experiment and simulation on degradation and burnout mechanisms of SiC MOSFET under heavy ion irradiation

Experiments and simulation studies on 283 MeV I ion induced single event effects of silicon carbide(SiC) metal–oxide–semiconductor field-effect transistors(MOSFETs) were carried out. When the cumulative irradiation fluence of the SiC MOSFET reached 5×10^(6)ion·cm^(-2), the drain–gate channel current increased under 200 V drain voltage, the drain–gate channel current and the drain–source channel current increased under 350 V drain voltage. The device occurred single event burnout under 800 V drain voltage, resulting in a complete loss of breakdown voltage. Combined with emission microscope, scanning electron microscope and focused ion beam analysis, the device with increased drain–gate channel current and drain–source channel current was found to have drain–gate channel current leakage point and local source metal melt, and the device with single event burnout was found to have local melting of its gate, source, epitaxial layer and substrate. Combining with Monte Carlo simulation and TCAD electrothermal simulation, it was found that the initial area of single event burnout might occur at the source–gate corner or the substrate–epitaxial interface, electric field and current density both affected the lattice temperature peak. The excessive lattice temperature during the irradiation process appeared at the local source contact, which led to the drain–source channel damage. And the excessive electric field appeared in the gate oxide layer, resulting in drain–gate channel damage.

Proton induced radiation effect of SiC MOSFET under different bias

Radiation effects of silicon carbide metal–oxide–semiconductor field-effect transistors(SiC MOSFETs)induced by 20 MeV proton under drain bias(V_(D)=800 V,V_(G)=0 V),gate bias(V_(D)=0 V,V_(G)=10 V),turn-on bias(V_(D)=0.5 V,V_(G)=4 V)and static bias(V_(D)=0 V,V_(G)=0 V)are investigated.The drain current of SiC MOSFET under turn-on bias increases linearly with the increase of proton fluence during the proton irradiation.When the cumulative proton fluence reaches 2×10^(11)p·cm^(-2),the threshold voltage of SiC MOSFETs with four bias conditions shifts to the left,and the degradation of electrical characteristics of SiC MOSFETs with gate bias is the most serious.In the deep level transient spectrum test,it is found that the defect energy level of SiC MOSFET is mainly the ON2(E_(c)-1.1 eV)defect center,and the defect concentration and defect capture cross section of SiC MOSFET with proton radiation under gate bias increase most.By comparing the degradation of SiC MOSFET under proton cumulative irradiation,equivalent 1 MeV neutron irradiation and gamma irradiation,and combining with the defect change of SiC MOSFET under gamma irradiation and the non-ionizing energy loss induced by equivalent 1 MeV neutron in SiC MOSFET,the degradation of SiC MOSFET induced by proton is mainly caused by ionizing radiation damage.The results of TCAD analysis show that the ionizing radiation damage of SiC MOSFET is affected by the intensity and direction of the electric field in the oxide layer and epitaxial layer.

碳化硅功率器件技术综述与展望

碳化硅(silicon carbide,Si C)器件作为一种宽禁带半导体器件,具有耐高压、高温,导通电阻低等优点。近20年来,Si C器件是国内外学术界和企业界的一大研究热点,该文对近些年来不同Si C器件的发展进行分类梳理,介绍二极管、结型场效应晶体管、金氧半场效晶体管、绝缘栅双极型晶体管及门极可断晶闸管器件,并对比分析器件结构及参数性能,针对关键问题展开论述。最后,对SiC器件近年的发展进行总结和展望。

SiC JBS二极管和SiC MOSFET的空间辐照效应及机理

基于第六代650 V碳化硅结型肖特基二极管(SiC JBS Diode)和第三代900 V碳化硅场效应晶体管(SiC MOSFET),开展SiC功率器件的单粒子效应、总剂量效应和位移损伤效应研究。20~80 MeV质子单粒子效应实验中,SiC功率器件发生单粒子烧毁(SEB)时伴随着波浪形脉冲电流的产生,辐照后SEB器件的击穿特性完全丧失。SiC功率器件发生SEB时的累积质子注量随偏置电压的增大而减小。利用计算机辅助设计工具(TCAD)开展SiC MOSFET的单粒子效应仿真,结果表明,重离子从源极入射器件时,具有更短的SEB发生时间和更低的SEB阈值电压。栅-源拐角和衬底-外延层交界处为SiC MOSFET的SEB敏感区域,强电场强度和高电流密度的同时存在导致敏感区域产生过高的晶格温度。SiC MOSFET在栅压偏置(U_(GS)=3 V,U_(DS)=0 V)下开展钴源总剂量效应实验,相比于漏压偏置(U_(GS)=0 V,U_(DS)=300 V)和零压偏置(U_(GS)=U_(DS)=0 V),出现更严重的电学性能退化。利用中带电压法分析发现,栅极偏置下氧化层内的垂直电场提升了陷阱电荷的生成率,加剧了阈值电压的退化。中子位移损伤会导致SiC JBS二极管的正向电流和反向电流减小。在漏极偏置下进行中子位移损伤效应实验,SiC MOSFET的电学性能退化最严重。该研究为空间用SiC器件的辐射效应机理及抗辐射加固研究提供了一定的参考和支撑。

SiC MOSFET模块结温监测研究

碳化硅金属氧化物半导体场效应管SiC MOSFET(silicon carbide metal oxide semiconductor field effect tra-nsistor)以其优异的材料特性成为一种很有前景的高功率密度和高效率器件,而结温是其设计和工作的一个重要参数,也是健康状态的重要指标。为了状态监控的需求,提出一种受自热影响较少的基于准阈值电压的结温提取方法。首先,从理论层面证实了阈值电压VTH与温度有良好的线性关系,具有负的温度敏感度。然后,实验观察了外部驱动电阻RGext对VTH的影响。最后,结合智能驱动提出了获取准阈值电压的电路,实验结果证实了所提方法的可行性。

一种基于门极电压阈值检测的SiC MOSFET结温在线监测方法

碳化硅(silicon carbide,SiC)金属–氧化物半导体场效应晶体管(metal-oxide-semiconductorfield-effect transistor,MOSFET)作为第三代功率器件的代表,已被广泛用于小容量高频领域,其可靠性问题备受关注。结温过高是制约SiC MOSFET可靠性的重要因素。然而,碳化硅器件高开关频率增大了动态参数测量的难度和成本。与硅基器件相比,其导通压降和导通电阻等稳态参数对结温的敏感性较低。因此,主流的热敏电参数法无法有效地在线监测结温。已有研究表明:门极阈值电压与结温密切相关,但这种通过门极阈值电压监测结温的方法易受电流震荡影响且测量电路复杂,故监测效果差强人意。为此,文中提出一种新型的基于门极电压阈值检测的SiC MOSFET结温监测方法。首先,理论推导结温与门极阈值电压之间的解析表达式,发现其呈线性关系。其次,提出一种多项式拟合门极阈值电压测量方法,并设计与之匹配的电流采样测量电路。最后,通过基于H桥单相逆变电路的在线监测试验证明该方法的有效性。研究表明:新型结温监测方法具有以下突出优势:1)不易受开关过程震荡的影响,监测精度高;2)测量电路简单可靠,仅用采样电路和滤波器即可,毋需复杂的捕捉电路;3)对采样频率具有一定的容差性。

基于开通di(ds)/dt的SiC MOSFET模块结温提取研究

碳化硅(SiC)金属-氧化物半导体场效应管(MOSFET)以其优良的性能得到广泛关注,结温是一个关键指标,用于健康状况监测。这里基于状态监控的需要,提出一种开通瞬态漏极电流变化率(di_(ds)/dt)结温提取的方法,首先从理论层面分析了di_(ds)/dt温度相关性,并用实验表明了di_(ds)/dt随着器件结温增加而增加,然后又对影响di_(ds)/dt的因素进行了分析,在双脉冲实验中证实了di_(ds)/dt的温度敏感度随负载电流和外部栅极电阻增加而增加,该方法在大驱动电阻下有更好的温度敏感度但也增加了开关损耗,牺牲了开关频率,基于此提出一种智能驱动器的方法,在不增加开关损耗的前提下有效测量SiC MOSFET的结温。