In order to protect the finished structures on the front side during deep silicon wet etching processes, the wax coating for double-sided etching process on the wafer is studied to separate the aforementioned structur...In order to protect the finished structures on the front side during deep silicon wet etching processes, the wax coating for double-sided etching process on the wafer is studied to separate the aforementioned structures from the strong aqueous bases. By way of heating and vacuumization, the air bubbles are expelled from the coating to extend the protection duration. The air pressure in the sealed chamber is 0.026 7 Pa, and the temperature of the heated wafer is 300℃. Two kinds of the wax are used, and the corresponding photos of the etched wafer and the protection times are given. In 75 ℃ 10 % KOH solution, the protection duration is more than 8 h.展开更多
Silicon etching is an essential process in various applications,and a major challenge for etching process is anisotropic high aspect ratio etching characteristics.The etch profile is determined by the plasma parameter...Silicon etching is an essential process in various applications,and a major challenge for etching process is anisotropic high aspect ratio etching characteristics.The etch profile is determined by the plasma parameters and process parameters.In this study,the plasma state with each process parameters were analyzed through the optical emission spectroscopy(OES)plasma diagnostic sensor by both chemical and physical approaches.Electron temperature and electron density were additionally acquired using the corona model with OES data that provides chemical species information,and the etch profile was evaluated through scanning electron microscope measurement data.The results include changes in profile with gas ratio,bias power,and pressure.We figure out that factors like ion energy and ion angular distribution as well as chemical reaction affect the anisotropic profile.展开更多
This paper presents a novel anti-shock bulk silicon etching apparatus for solving a universal problem which occurs when releasing the diaphragm (e.g. SiNx), that the diaphragm tends to be probably cracked by the imp...This paper presents a novel anti-shock bulk silicon etching apparatus for solving a universal problem which occurs when releasing the diaphragm (e.g. SiNx), that the diaphragm tends to be probably cracked by the impact of heatinginduced bubbles, the swirling of heating-induced etchant, dithering of the hand and imbalanced etchant pressure during the wafer being taken out. Through finite element methods, the causes of the diaphragm cracking are analysed. The impact of heating-induced bubbles could be the main factor which results in the failure stress of the SiNx diaphragm and the rupture of it. In order to reduce the four potential effects on the cracking of the released diaphragm, an anti-shock hulk silicon etching apparatus is proposed for using during the last etching process of the diaphragm release. That is, the silicon wafer is first put into the regular constant temperature etching apparatus or ultrasonic plus, and when the residual bulk silicon to be etched reaches near the interface of the silicon and SiNx diaphragm, within a distance of 50-80μm (the exact value is determined by the thickness, surface area and intensity of the released diaphragm), the wafer is taken out carefully and put into the said anti-shock silicon etching apparatus. The wafer's position is at the geometrical centre, also the centre of gravity of the etching vessel. An etchant outlet is built at the bottom. The wafer is etched continuously, and at the same time the etchant flows out of the vessel. Optionally, two symmetrically placed low-power heating resistors are put in the anti-shock silicon etching apparatus to quicken the etching process. The heating resistors' power should be low enough to avoid the swirling of the heating-induced etchant and the impact of the heating-induced bubbles on the released diaphragm. According to the experimental results, the released SiNx diaphragm thus treated is unbroken, which proves the practicality of the said anti-shock bulk silicon etching apparatus.展开更多
Silicon bulk etching is an important part of micro-electro-mechanical system(MEMS) technology. In this work, a novel etching method is proposed based on the vapor from tetramethylammonium hydroxide(TMAH) solution heat...Silicon bulk etching is an important part of micro-electro-mechanical system(MEMS) technology. In this work, a novel etching method is proposed based on the vapor from tetramethylammonium hydroxide(TMAH) solution heated up to boiling point. The monocrystalline silicon wafer is positioned over the solution surface and can be anisotropically etched by the produced vapor. This etching method does not rely on the expensive vacuum equipment used in dry etching. Meanwhile, it presents several advantages like low roughness, high etching rate and high uniformity compared with the conventional wet etching methods. The etching rate and roughness can reach 2.13 μm/min and 1.02 nm, respectively. Furthermore,the diaphragm structure and Al-based pattern on the non-etched side of wafer can maintain intact without any damage during the back-cavity fabrication. Finally, an etching mechanism has been proposed to illustrate the observed experimental phenomenon. It is suggested that there is a water thin film on the etched surface during the solution evaporation. It is in this water layer that the ionization and etching reaction of TMAH proceed, facilitating the desorption of hydrogen bubble and the enhancement of molecular exchange rate. This new etching method is of great significance in the low-cost and high-quality micro-electromechanical system industrial fabrication.展开更多
Dry etching of silicon is an essential process step for the fabrication of Micro electromechancal system (MEMS). The AZ7220 positive photo-resist was used as the etching mask and silicon micro-trenches were fabricated...Dry etching of silicon is an essential process step for the fabrication of Micro electromechancal system (MEMS). The AZ7220 positive photo-resist was used as the etching mask and silicon micro-trenches were fabricated with a multiplexed indu ctively coupled plasma (ICP) etcher. The influence of resist pattern profile, an d etch condition on sidewall roughness were investigated detail. The results sho w that the sidewall roughness of micro-trench depends on profiles of photo-resis t pattern, the initial interface between the resist bottom surface and silicon s urface heavily. The relationship between roughness and process optimization para meters are presented in the paper. The roughness of the sidewall has been decrea sed to a 20-50nm with this experiment.展开更多
WHEN scanning electrochemical microscopy (SECM) with feedback mode is used to etchcertain surface, the etchant molecules generated at a microelectrode diffuse to the surface andreact therein with the surface species, ...WHEN scanning electrochemical microscopy (SECM) with feedback mode is used to etchcertain surface, the etchant molecules generated at a microelectrode diffuse to the surface andreact therein with the surface species, resulting in local etching pattern. It is noted that theetching resolution of SECM is dominantly determined by the size of the microelectrode.However, many experimental results have shown the significant influence of the lateral diffu-sion of etchant on the etching resolution. Therefore, a thin diffusion layer of the展开更多
We demonstrate a method of fabricating through micro-holes and micro-hole arrays in silicon using femtosecond laser irradiation and selective chemical etching. The micro-hole formation mechanism is identified as the c...We demonstrate a method of fabricating through micro-holes and micro-hole arrays in silicon using femtosecond laser irradiation and selective chemical etching. The micro-hole formation mechanism is identified as the chemical reaction of the femtosecond laser-induced structure change zone and hydrofluoric acid solution. The morphologies of the through micro-holes and micro-hole arrays are characterized by using scanning electronic microscopy, The effects of the pulse number on the depth and diameter of the holes are investigated. Honeycomb arrays of through micro-holes fabricated at different laser powers and pulse numbers are demonstrated.展开更多
This paper mainly describes a research of fabrication-technology of silicon magnetic-sensitive transistor (SMST) with rectangle-plank-cubic structure fabricated on silicon wafer by MEMS technique.An experiment researc...This paper mainly describes a research of fabrication-technology of silicon magnetic-sensitive transistor (SMST) with rectangle-plank-cubic structure fabricated on silicon wafer by MEMS technique.An experiment research on basic characteristic of the silicon magnetic-sensitive transistor was done.Anisotropic etching and reliable technique project were provided and applied in order to fabricate SMST with rectangle-plank-cubic construction.This means that a new kind of fabrication technology for silicon magnetic-sensitive transistor was provided.The result shows that the technique can be not only compatible with IC technology but also integrated easily,and has a wide application field.展开更多
This paper proposes to develop a data-driven via's depth estimator of the deep reactive ion etching process based on statistical identification of key variables.Several feature extraction algorithms are presented to ...This paper proposes to develop a data-driven via's depth estimator of the deep reactive ion etching process based on statistical identification of key variables.Several feature extraction algorithms are presented to reduce the high-dimensional data and effectively undertake the subsequent virtual metrology(VM) model building process.With the available on-line VM model,the model-based controller is hence readily applicable to improve the quality of a via's depth.Real operational data taken from a industrial manufacturing process are used to verify the effectiveness of the proposed method.The results demonstrate that the proposed method can decrease the MSE from 2.2×10^(-2) to 9×10^(-4) and has great potential in improving the existing DRIE process.展开更多
This paper presents the design and fabrication of an etched implant junction termination extension(JTE)for high-voltage 4H-SiC PiN diodes. Unlike the conventional JTE structure, the proposed structure utilizes multi...This paper presents the design and fabrication of an etched implant junction termination extension(JTE)for high-voltage 4H-SiC PiN diodes. Unlike the conventional JTE structure, the proposed structure utilizes multiple etching steps to achieve the optimum JTE concentration range. The simulation results show that the etched implant JTE method can improve the blocking voltage of SiC PiN diodes and also provides broad process latitude for parameter variations, such as implantation dose and activation annealing condition. The fabricated SiC PiN diodes with the etched implant JTE exhibit a highest blocking voltage of 4.5 kV and the forward on-state voltage of 4.6 V at room temperature. These results are of interest for understanding the etched implant method in the fabrication of high-voltage power devices.展开更多
文摘In order to protect the finished structures on the front side during deep silicon wet etching processes, the wax coating for double-sided etching process on the wafer is studied to separate the aforementioned structures from the strong aqueous bases. By way of heating and vacuumization, the air bubbles are expelled from the coating to extend the protection duration. The air pressure in the sealed chamber is 0.026 7 Pa, and the temperature of the heated wafer is 300℃. Two kinds of the wax are used, and the corresponding photos of the etched wafer and the protection times are given. In 75 ℃ 10 % KOH solution, the protection duration is more than 8 h.
基金supported by the Koran Ministry of Trade,Industry&Energy(MOTIE:GID:20006499)via KSRC(Korea Semiconductor Research Consortium)support program。
文摘Silicon etching is an essential process in various applications,and a major challenge for etching process is anisotropic high aspect ratio etching characteristics.The etch profile is determined by the plasma parameters and process parameters.In this study,the plasma state with each process parameters were analyzed through the optical emission spectroscopy(OES)plasma diagnostic sensor by both chemical and physical approaches.Electron temperature and electron density were additionally acquired using the corona model with OES data that provides chemical species information,and the etch profile was evaluated through scanning electron microscope measurement data.The results include changes in profile with gas ratio,bias power,and pressure.We figure out that factors like ion energy and ion angular distribution as well as chemical reaction affect the anisotropic profile.
文摘This paper presents a novel anti-shock bulk silicon etching apparatus for solving a universal problem which occurs when releasing the diaphragm (e.g. SiNx), that the diaphragm tends to be probably cracked by the impact of heatinginduced bubbles, the swirling of heating-induced etchant, dithering of the hand and imbalanced etchant pressure during the wafer being taken out. Through finite element methods, the causes of the diaphragm cracking are analysed. The impact of heating-induced bubbles could be the main factor which results in the failure stress of the SiNx diaphragm and the rupture of it. In order to reduce the four potential effects on the cracking of the released diaphragm, an anti-shock hulk silicon etching apparatus is proposed for using during the last etching process of the diaphragm release. That is, the silicon wafer is first put into the regular constant temperature etching apparatus or ultrasonic plus, and when the residual bulk silicon to be etched reaches near the interface of the silicon and SiNx diaphragm, within a distance of 50-80μm (the exact value is determined by the thickness, surface area and intensity of the released diaphragm), the wafer is taken out carefully and put into the said anti-shock silicon etching apparatus. The wafer's position is at the geometrical centre, also the centre of gravity of the etching vessel. An etchant outlet is built at the bottom. The wafer is etched continuously, and at the same time the etchant flows out of the vessel. Optionally, two symmetrically placed low-power heating resistors are put in the anti-shock silicon etching apparatus to quicken the etching process. The heating resistors' power should be low enough to avoid the swirling of the heating-induced etchant and the impact of the heating-induced bubbles on the released diaphragm. According to the experimental results, the released SiNx diaphragm thus treated is unbroken, which proves the practicality of the said anti-shock bulk silicon etching apparatus.
基金supported by the National Natu-ral Science Foundation of China(No.51675493 and No.51975542)the National Key R&D Program of China(No.2018YFF0300605,No.2019YFF0301802,and No.2019YFB2004802)Program for the Outstanding Innovative Teams of Higher Learning Institutions of Shanxi and Shanxi"1331 Project"Key Subject Construction(1331KSC).
文摘Silicon bulk etching is an important part of micro-electro-mechanical system(MEMS) technology. In this work, a novel etching method is proposed based on the vapor from tetramethylammonium hydroxide(TMAH) solution heated up to boiling point. The monocrystalline silicon wafer is positioned over the solution surface and can be anisotropically etched by the produced vapor. This etching method does not rely on the expensive vacuum equipment used in dry etching. Meanwhile, it presents several advantages like low roughness, high etching rate and high uniformity compared with the conventional wet etching methods. The etching rate and roughness can reach 2.13 μm/min and 1.02 nm, respectively. Furthermore,the diaphragm structure and Al-based pattern on the non-etched side of wafer can maintain intact without any damage during the back-cavity fabrication. Finally, an etching mechanism has been proposed to illustrate the observed experimental phenomenon. It is suggested that there is a water thin film on the etched surface during the solution evaporation. It is in this water layer that the ionization and etching reaction of TMAH proceed, facilitating the desorption of hydrogen bubble and the enhancement of molecular exchange rate. This new etching method is of great significance in the low-cost and high-quality micro-electromechanical system industrial fabrication.
文摘Dry etching of silicon is an essential process step for the fabrication of Micro electromechancal system (MEMS). The AZ7220 positive photo-resist was used as the etching mask and silicon micro-trenches were fabricated with a multiplexed indu ctively coupled plasma (ICP) etcher. The influence of resist pattern profile, an d etch condition on sidewall roughness were investigated detail. The results sho w that the sidewall roughness of micro-trench depends on profiles of photo-resis t pattern, the initial interface between the resist bottom surface and silicon s urface heavily. The relationship between roughness and process optimization para meters are presented in the paper. The roughness of the sidewall has been decrea sed to a 20-50nm with this experiment.
文摘WHEN scanning electrochemical microscopy (SECM) with feedback mode is used to etchcertain surface, the etchant molecules generated at a microelectrode diffuse to the surface andreact therein with the surface species, resulting in local etching pattern. It is noted that theetching resolution of SECM is dominantly determined by the size of the microelectrode.However, many experimental results have shown the significant influence of the lateral diffu-sion of etchant on the etching resolution. Therefore, a thin diffusion layer of the
基金Supported by the National Basic Research Program of China under Grant No 2012CB921804the National Natural Science Foundation of China under Grant Nos 11204236 and 61308006the Collaborative Innovation Center of Suzhou Nano Science and Technology
文摘We demonstrate a method of fabricating through micro-holes and micro-hole arrays in silicon using femtosecond laser irradiation and selective chemical etching. The micro-hole formation mechanism is identified as the chemical reaction of the femtosecond laser-induced structure change zone and hydrofluoric acid solution. The morphologies of the through micro-holes and micro-hole arrays are characterized by using scanning electronic microscopy, The effects of the pulse number on the depth and diameter of the holes are investigated. Honeycomb arrays of through micro-holes fabricated at different laser powers and pulse numbers are demonstrated.
文摘This paper mainly describes a research of fabrication-technology of silicon magnetic-sensitive transistor (SMST) with rectangle-plank-cubic structure fabricated on silicon wafer by MEMS technique.An experiment research on basic characteristic of the silicon magnetic-sensitive transistor was done.Anisotropic etching and reliable technique project were provided and applied in order to fabricate SMST with rectangle-plank-cubic construction.This means that a new kind of fabrication technology for silicon magnetic-sensitive transistor was provided.The result shows that the technique can be not only compatible with IC technology but also integrated easily,and has a wide application field.
基金supported by the National Natural Science Foundation of China(No.60904053)the Natural Science Foundation of Jiangsu(No. SBK201123307)the Priority Academic Program Development of Jiangsu Higher Education Institutions(PAPD)
文摘This paper proposes to develop a data-driven via's depth estimator of the deep reactive ion etching process based on statistical identification of key variables.Several feature extraction algorithms are presented to reduce the high-dimensional data and effectively undertake the subsequent virtual metrology(VM) model building process.With the available on-line VM model,the model-based controller is hence readily applicable to improve the quality of a via's depth.Real operational data taken from a industrial manufacturing process are used to verify the effectiveness of the proposed method.The results demonstrate that the proposed method can decrease the MSE from 2.2×10^(-2) to 9×10^(-4) and has great potential in improving the existing DRIE process.
基金Project supported by the Science and Technology Development Foundation of China Academy of Engineering Physics(No.2014A05011)the Special Foundation of President of China Academy of Engineering Physics(No.2014-1-100)
文摘This paper presents the design and fabrication of an etched implant junction termination extension(JTE)for high-voltage 4H-SiC PiN diodes. Unlike the conventional JTE structure, the proposed structure utilizes multiple etching steps to achieve the optimum JTE concentration range. The simulation results show that the etched implant JTE method can improve the blocking voltage of SiC PiN diodes and also provides broad process latitude for parameter variations, such as implantation dose and activation annealing condition. The fabricated SiC PiN diodes with the etched implant JTE exhibit a highest blocking voltage of 4.5 kV and the forward on-state voltage of 4.6 V at room temperature. These results are of interest for understanding the etched implant method in the fabrication of high-voltage power devices.