Development of Integrated Micro Nano-positioning xy-stage based on Bulk Micro-machining

For operation and manipulation with nanometric positioning precision,an integrated micro nano-positioning xy-stage is developed,which is mainly composed of a silicon-based xy-stage,comb-driven actuator and displacement sensor.The high-aspect-ratio comb-driven xy-stage is achieved by deep reactive ion etching (DRIE) in both sides of wafer.The displacement sensor is mainly composed of four vertical sidewall surface piezoresistor connected to form a full Wheatstone bridge.A simple vertical sidewall surface piezoresistor process which improves on the basis of the conventional surface piezoresistor technique is proposed.The experimental results verify the integrated micro nano-positioning xy-stage including the vertical sidewall surface piezoresistor technique.The sensitivity of the fabricated piezoresistive sensors is better than 1.17 mV/μm without amplification and the linearity is better than 0.814%.Under 30 V driving voltage,a ±10 μm single-axis displacement is measured without crosstalk.The displacement resolution of the micro xy-stage is better than 10.8 nm.

Design and simulation of a silicon-based hybrid integrated optical gyroscope system

By combining a silicon-based lithium niobate modulator and a silicon-based Si3N4resonator with silicon-based photonics technology,a highly systematic design of a hybrid integrated optical gyroscope with enhanced reciprocity sensitivity and a dual micro-ring structure is proposed for the first time in this paper.The relationship between the device's structural parameters and optical performance is also analyzed by constructing a complete simulation link,which provides a theoretical design reference to improve the system's sensitivity.When the wavelength is 1550 nm,the conversion frequency of the dual-ring optical path is 50 MHz,the coupling coefficient is 0.2,and the radius R is 1000μm,the quality factor of the silicon-based Si_(3)N_(4)resonator is 2.58×10^(5),which is 1.58 times that of the silicon-on-insulator resonator.Moreover,the effective number of times the light travels around the ring before leaving the micro-ring is 5.93,which is 1.62 times that of the silicon-on-insulator resonator.The work fits the gyro dynamic output diagram,and solves the problem of low sensitivity at low speed by setting the phase offset.This results provide a basis for the further optimization of design and chip processing of the integrated optical gyroscope.

Compact 16-channel integrated charge-sensitive preamplifier module for silicon strip detectors

In this study,a compact 16-channel integrated charge-sensitive preamplifier named the smart preamplifier(SPA)was developed to support the large-scale detector array used in modern nuclear physics experiments.Two types of SPA,namely SPA02 and SPA03(with external field effect transistor),have been manufactured to match silicon detectors with small and large capacitances,respectively.The characteristics of the SPA include fast response of typically less than 6 ns for pulse rising time and low equivalent noise of 1.5 keV at zero input capacitance.The energy sensitivity and pulse decay time can be easily adjusted by changing the feedback capacitance Cfand resistance Rfin various applications.A good energy resolution of 24.4 keV for 5.803-MeV alpha particles from 244 Cm was achieved using a small-sized Si-PIN detector;for the silicon strip detectors in the test with the alpha source,a typical energy resolution of 0.6–0.8%was achieved.The integrated SPA has been employed in several experiments of silicon strip detectors with hundreds of channels,and a good performance has been realized.

Photoic crystal nanobeam cavity devices for on-chip integrated silicon photonics

Integrated circuit(IC)industry has fully considered the fact that the Moore’s Law is slowing down or ending.Alternative solutions are highly and urgently desired to break the physical size limits in the More-than-Moore era.Integrated silicon photonics technology exhibits distinguished potential to achieve faster operation speed,less power dissipation,and lower cost in IC industry,because their COMS compatibility,fast response,and high monolithic integration capability.Particularly,compared with other on-chip resonators(e.g.microrings,2D photonic crystal cavities)silicon-on-insulator(SOI)-based photonic crystal nanobeam cavity(PCNC)has emerged as a promising platform for on-chip integration,due to their attractive properties of ultra-high Q/V,ultra-compact footprints and convenient integration with silicon bus-waveguides.In this paper,we present a comprehensive review on recent progress of on-chip PCNC devices for lasing,modulation,switching/filting and label-free sensing,etc.

Through-silicon-via crosstalk model and optimization design for three-dimensional integrated circuits

Through-silicon-via （TSV） to TSV crosstalk noise is one of the key factors affecting the signal integrity of three- dimensional integrated circuits （3D ICs）. Based on the frequency dependent equivalent electrical parameters for the TSV channel, an analytical crosstalk noise model is established to capture the TSV induced crosstalk noise. The impact of various design parameters including insulation dielectric, via pitch, via height, silicon conductivity, and terminal impedance on the crosstalk noise is analyzed with the proposed model. Two approaches are proposed to alleviate the TSV noise, namely, driver sizing and via shielding, and the SPICE results show 241 rnV and 379 mV reductions in the peak noise voltage, respectively.

Recent advances of heterogeneously integrated Ⅲ–Ⅴ laser on Si

Due to the indirect bandgap nature,the widely used silicon CMOS is very inefficient at light emitting.The integration of silicon lasers is deemed as the‘Mount Everest’for the full take-up of Si photonics.The major challenge has been the materials dissimilarity caused impaired device performance.We present a brief overview of the recent advances of integratedⅢ-Ⅴlaser on Si.We will then focus on the heterogeneous direct/adhesive bonding enabling methods and associated light coupling structures.A selected review of recent representative novel heterogeneously integrated Si lasers for emerging applications like spectroscopy,sensing,metrology and microwave photonics will be presented,including DFB laser array,ultra-dense comb lasers and nanolasers.Finally,the challenges and opportunities of heterogeneous integration approach are discussed.

Reduction of signal reflection along through silicon via channel in high-speed three-dimensional integration circuit

The through silicon via （TSV） technology has proven to be the critical enabler to realize a three-dimensional （3D） gigscale system with higher performance but shorter interconnect length. However, the received digital signal after trans- mission through a TSV channel, composed of redistribution layers （RDLs）, TSVs, and bumps, is degraded at a high data-rate due to the non-idealities of the channel. We propose the Chebyshev multisection transformers to reduce the signal reflec- tion of TSV channel when operating frequency goes up to 20 GHz, by which signal reflection coefficient （$11） and signal transmission coefficient （$21） are improved remarkably by 150% and 73.3%, respectively. Both the time delay and power dissipation are also reduced by 4% and 13.3%, respectively. The resistance-inductance-conductance-capacitance （RLGC） elements of the TSV channel are iterated from scattering （S）-parameters, and the proposed method of weakening the signal reflection is verified using high frequency simulator structure （HFSS） simulation software by Ansoft.

Recent progress in integrated electro-optic frequency comb generation

Optical frequency combs have emerged as an important tool enabling diverse applications from test-and-measurement,including spectroscopy,metrology,precision distance measurement,sensing,as well as optical and microwave waveform synthesis,signal processing,and communications.Several techniques exist to generate optical frequency combs,such as mode-locked lasers,Kerr micro-resonators,and electro-optic modulation.Important characteristics of optical frequency combs include the number of comb lines,their spacing,spectral shape and/or flatness,and intensity noise.While mode-locked lasers and Kerr micro-resonators can be used to obtain a large number of comb lines compared to electro-optic modulation,the latter provides increased flexibility in tuning the comb spacing.For some applications in optical communications and microwave photonics,a high degree of integration may be more desirable over a very large number of comb lines.In this paper,we review recent progress on integrated electro-optic frequency comb generators,including those based on indium phosphide,lithium niobate,and silicon photonics.

Low-loss chip-scale programmable silicon photonic processor

Chip-scale programmable optical signal processors are often used to flexibly manipulate the optical signals for satisfying the demands in various applications,such as lidar,radar,and artificial intelligence.Silicon photonics has unique advantages of ultra-high integration density as well as CMOS compatibility,and thus makes it possible to develop large-scale programmable optical signal processors.The challenge is the high silicon waveguides propagation losses and the high calibration complexity for all tuning elements due to the random phase errors.In this paper,we propose and demonstrate a programmable silicon photonic processor for the first time by introducing low-loss multimode photonic waveguide spirals and low-random-phase-error Mach-Zehnder switches.The present chip-scale programmable silicon photonic processor comprises a 1×4 variable power splitter based on cascaded Mach-Zehnder couplers(MZCs),four Ge/Si photodetectors,four channels of thermally-tunable optical delaylines.Each channel consists of a continuously-tuning phase shifter based on a waveguide spiral with a micro-heater and a digitally-tuning delayline realized with cascaded waveguide-spiral delaylines and MZSs for 5.68 ps time-delay step.Particularly,these waveguide spirals used here are designed to be as wide as 2μm,enabling an ultralow propagation loss of 0.28 dB/cm.Meanwhile,these MZCs and MZSs are designed with 2-μm-wide arm waveguides,and thus the random phase errors in the MZC/MZS arms are negligible,in which case the calibration for these MZSs/MZCs becomes easy and furthermore the power consumption for compensating the phase errors can be reduced greatly.Finally,this programmable silicon photonic processor is demonstrated successfully to verify a number of distinctively different functionalities,including tunable time-delay,microwave photonic beamforming,arbitrary optical signal filtering,and arbitrary waveform generation.

一种基于硅基MEMS三维异构集成技术的T/R组件

基于硅基微电子机械系统(MEMS)三维异构集成工艺,设计并制作了用于相控阵天线系统的三维堆叠式Ku波段双通道T/R组件。该组件由两层硅基结构通过球栅阵列(BGA)植球堆叠而成,上下两层硅基封装均采用5层硅片通过硅通孔(TSV)、晶圆级键合工艺实现。组件集成了六位数控移相、六位数控衰减、串转并、电源调制、逻辑控制等功能,最终组件尺寸仅为15 mm×8 mm×3.8 mm。测试结果表明,在Ku波段内,该组件发射通道饱和输出功率大于24 dBm,单通道发射增益大于20 dB,接收通道增益大于20 dB,噪声系数小于3.0 dB。该组件性能好,质量轻,体积小,加工精确度高,组装效率高。

一种三维集成的Ku波段高功率T/R模块

基于硅基微电子机械系统(MEMS)三维(3D)异构集成工艺,设计并制作了用于相控阵天线系统的三维堆叠式Ku波段四通道高功率收发(T/R)模块。该模块由两层硅基封装堆叠而成,层间采用球栅阵列(BGA)植球堆叠,实现模块小型化;采用高低阻抗匹配建模,保证低损耗输出,采用导热垫加微流道散热板达到了良好的散热效果,实现模块高功率输出;对模块的微波垂直互连结构和散热进行建模和仿真。测试结果表明,在14~18 GHz内发射通道饱和输出功率大于40 dBm,接收通道增益大于21 dB,噪声系数小于3.5 dB,模块尺寸仅为14.0 mm×14.0 mm×3.3 mm。该模块在兼顾高集成度的同时性能指标得到了进一步提升。

X波段Si基片集成脊波导MEMS环行器

基于波导传输理论设计并制备了一款Si基片集成脊波导(RSIW)微电子机械系统(MEMS)环行器,该环形器以高阻硅作为衬底材料,采用高精度三维MEMS加工工艺制备而成。通过在基片集成波导(SIW)结构中添加脊梁结构,形成RSIW传输结构,使传输主模TE10模的截止频率比矩形波导TE10模的低,从而实现相同频率下更小的器件尺寸。同时,通过电磁仿真软件对射频匹配和磁场分布进行了精确的建模仿真,完成了Si基片集成脊波导MEMS环行器的仿真设计。制备了尺寸为6 mm×6 mm的环行器样品并进行了测试,结果验证了仿真设计的准确性,其工作频率为8~12 GHz,回波损耗大于20 dB,隔离度大于18 dB,插入损耗小于0.5 dB。实现优良微波特性的同时,相比于常规的SIW结构环行器尺寸缩小了20%左右。

适用于SiC MOSFET的漏源电压积分自适应快速短路保护电路研究

SiC MOSFET因其高击穿电压、高开关速度、低导通损耗等性能优势而被广泛应用于各类电力电子变换器中。然而,由于其短路耐受时间仅为2~7μs,且随母线电压升高而缩短,快速可靠的短路保护电路已成为其推广应用的关键技术之一。为应对不同母线电压下的Si C MOSFET短路故障,文中提出一种基于漏源电压积分的自适应快速短路保护方法(drain-sourcevoltageintegration-basedadaptivefast short-circuit protection method,DSVI-AFSCPM),研究所提出的DSVI-AFSCPM在硬开关短路(hardswitchingfault,HSF)和负载短路(fault under load,FUL)条件下的保护性能,进而研究不同母线电压对DSVI-AFSCPM的作用机理。同时,探究Si CMOSFET工作温度对其响应速度的影响。最后,搭建实验平台,对所提出的DSVI-AFSCPM在发生硬开关短路和负载短路时不同母线电压、不同工作温度下的保护性能进行实验测试。实验结果表明,所提出的DSVI-AFSCPM在不同母线电压下具有良好的保护速度自适应性,即母线电压越高,短路保护速度越快,并且其响应速度受Si CMOSFET工作温度影响较小,两种短路工况下工作温度从25℃变化到125℃,短路保护时间变化不超过90 ns。因此,该文为Si CMOSFET在不同母线电压下的可靠使用提供一定技术支撑。

Photonic integrated optical phased arrays and their applications[Invited]

In recent years,optical phased arrays(OPAs)have attracted great interest for their potential applications in light detection and ranging(Li DAR),free-space optical communications(FSOs),holography,and so on.Photonic integrated circuits(PICs)provide solutions for further reducing the size,weight,power,and cost of OPAs.In this paper,we review the recent development of photonic integrated OPAs.We summarize the typical architecture of the integrated OPAs and their performance.We analyze the key components of OPAs and evaluate the figure of merit for OPAs.Various applications in Li DAR,FSO,imaging,biomedical sensing,and specialized beam generation are introduced.

用于单片集成传感系统的多晶硅级联自发光器件研究

针对全硅光电生物传感器的硅基单片集成应用需求,提出了基于多晶硅级联自发光器件的单片集成传感器,对其中作为关键部分的多晶硅光源进行了试制,采用标准0.35μm的CMOS工艺对该光源进行了流片验证,并设计了适配的全硅波导检测结构。结果表明,多晶硅光源发光特征峰为635 nm、700 nm和785 nm,该特征峰作为波导入射光源时,设计的全硅波导检测结构能够实现检测目的。

工程化硅微谐振加速度计设计与实现

提出一种基于MEMS敏感结构芯片与专用集成电路芯片(ASIC)集成封装的硅微谐振加速度计设计方案。敏感结构主要包括敏感质量块、一级微杠杆放大结构和双端固定音叉谐振器。整体结构采用左右差分对称布局,实现器件高灵敏度。敏感结构芯片基于全硅晶圆级封装工艺,实现敏感结构芯片的低应力与批量化加工。敏感结构芯片与ASIC芯片采用堆叠式集成封装,实现器件的小型化与低功耗。所设计加速度计的谐振频率约为18.2 kHz,量程为±20 g_(n),标度因数为216 Hz/g_(n),标度因数稳定性为5×10^(-6),零偏稳定性为6.5μg_(n)(1σ,10 s)。所提方案实现了器件的小型化、低功耗与集成化。

X波段MEMS硅腔折叠基片集成波导环行器芯片

通信系统向小型化、高性能、集成化的快速发展对射频组件的体积和电性能提出了苛刻的要求。设计了一种X波段硅腔折叠基片集成波导(FSIW)环行器芯片。当基片集成波导(SIW)工作于主模时,将中央的对称面等效为虚拟磁壁,沿着窄边对电磁场进行多次折叠,形成FSIW。以该技术作为设计思路,提高空间利用率,实现了FSIW整体结构的小型化。将FSIW的优势融入环行器中心结设计,使设计的环行器芯片具有高功率容量、低插入损耗、体积小、质量轻的优点。基于微电子机械系统(MEMS)工艺,以高阻硅为衬底材料,制备了该硅腔FSIW环行器芯片,芯片整体尺寸为6.5 mm×6 mm×2.5 mm,工作频率为8.5~11.5 GHz,回波损耗>18.5 dB,带内插入损耗<0.4 dB,隔离度>20 dB。

硅基三维异构集成射频微系统的多物理场耦合仿真与设计

利用硅基三维异构集成工艺设计一款射频微系统,以满足设备对射频模组高性能、小型化的需求。为了在设计初期充分评估该微系统的潜在可靠性风险,根据工艺特征以及产品在多物理场中的耦合现象,建立一种面向硅基三维异构集成工艺射频微系统的多物理场一体化仿真流程,逐一分析所涉及的电-热耦合和热-力耦合过程,预判产品在工作条件下的热学和力学特性,为设计环节提供针对性的指导,预先规避可靠性风险,从而有效提高一次性设计成功率。

用于FBG解调的AWG芯片的设计、仿真与制备

设计、仿真并制备了一种用于光纤布拉格光栅(FBG)解调的阵列波导光栅(AWG)芯片。该芯片基于SOI衬底进行制备,并在AWG的输入/输出波导、阵列波导与平板波导之间采用双刻蚀结构进行优化。经仿真,该AWG的插入损耗为1.5 dB,串扰小于-20 dB,3 dB带宽为1.5 nm。优化后的AWG芯片采用深紫外光刻技术、电感耦合等离子体等技术制备。经测试,该AWG的插入损耗为3 dB,串扰小于-20 dB,3 dB带宽为2.3 nm。搭建了基于该AWG的解调系统,解调实验结果表明,该系统在0.8 nm范围内的解调精度可达11.26 pm,波长分辨率为6 pm。