An experiment for preparation of SOI films by using the scanning electron beam to modify the polycrystalline silicon on SiO2 is presented. This method takes on the epitaxial lateral growth of liquid phase with the cry...An experiment for preparation of SOI films by using the scanning electron beam to modify the polycrystalline silicon on SiO2 is presented. This method takes on the epitaxial lateral growth of liquid phase with the crystallon to form monocrystalline silicon films. The effects of the beam power density, scanning velocity, temperature of the substrates and the construction of samples on the quality of the monocrystalline silicon films were discussed. A good experimental result has been obtained, the monocrystalline silicon zone is nearly 200×25μm2.展开更多
To overcome the floating-body effect and self-heating effect of SOI devices,the drain and source on insulator (DSOI) structure is fabricated and tested.The low dose developed recently and low energy local SIMOX techno...To overcome the floating-body effect and self-heating effect of SOI devices,the drain and source on insulator (DSOI) structure is fabricated and tested.The low dose developed recently and low energy local SIMOX technology combined with the conventional CMOS technology is used to fabricate this kind of devices.Using this method,DSOI,SOI,and bulk MOSFETs are successfully integrated on a single chip.Test results show that the drain induced barrier lowering effect is suppressed.The breakdown voltage drain-to-source is greatly increased for DSOI devices due to the elimination of the floating-body effect.And the self-heating effect is also reduced and thus the reliability increased.At the same time,the advantage of SOI devices in speed is maintained.The technology makes it possible to integrate low voltage,low power,low speed SOI devices or high voltage,high power,high speed DSOI devices on one chip and it offers option for developing system-on-chip technology.展开更多
An analytical model for a novel triple reduced surface field(RESURF) silicon-on-insulator(SOI) lateral doublediffused metal–oxide–semiconductor(LDMOS) field effect transistor with n-type top(N-top) layer, wh...An analytical model for a novel triple reduced surface field(RESURF) silicon-on-insulator(SOI) lateral doublediffused metal–oxide–semiconductor(LDMOS) field effect transistor with n-type top(N-top) layer, which can obtain a low on-state resistance, is proposed in this paper. The analytical model for surface potential and electric field distributions of the novel triple RESURF SOI LDMOS is presented by solving the two-dimensional(2D) Poisson's equation, which can also be applied to single, double and conventional triple RESURF SOI structures. The breakdown voltage(BV) is formulized to quantify the breakdown characteristic. Besides, the optimal integrated charge of N-top layer(Q_(ntop)) is derived, which can give guidance for doping the N-top layer. All the analytical results are well verified by numerical simulation results,showing the validity of the presented model. Hence, the proposed model can be a good tool for the device designers to provide accurate first-order design schemes and physical insights into the high voltage triple RESURF SOI device with N-top layer.展开更多
This work researched the impact of total dose irradiation on the threshold voltage of N-type metal oxide semiconductor field effect transistors(nMOSFETs) in silicon-on-insulator(SOI) technology.Using the subthreshold ...This work researched the impact of total dose irradiation on the threshold voltage of N-type metal oxide semiconductor field effect transistors(nMOSFETs) in silicon-on-insulator(SOI) technology.Using the subthreshold separation technology,the factor causing the threshold voltage shift was divided into two parts:trapped oxide charges and interface states,the effects of which are presented under irradiation.Furthermore,by analyzing the data,the threshold voltage shows a negative shift at first and then turns to positive shift when irradiation dose is lower.Additionally,the influence of the dose rate effects on threshold voltage is discussed.The research results show that the threshold voltage shift is more significant in low dose rate conditions,even for a low dose of100 krad(Si).The degeneration value of threshold voltage is 23.4%and 58.0%for the front-gate and the back-gate at the low dose rate,respectively.展开更多
Mode matching is the key to improve the performance of micro-machined vibrating ring gyroscopes.Mass and stiffness asymmetries can lend to normal modes badly mismatch for gyroscopes fabricated by single-crystal silico...Mode matching is the key to improve the performance of micro-machined vibrating ring gyroscopes.Mass and stiffness asymmetries can lend to normal modes badly mismatch for gyroscopes fabricated by single-crystal silicon.The mismatch of the normal nodes results in large normal mode frequency split and degraded sensitivity.To address this issue,a Silicon-On-Insulator(SOI) wafer is used to fabricate the sensor chips.Meanwhile,a compensate disk and the backside coated negative photo resist(AZ303) is employed to weaken the Lag and Footing effect during the Deep Reactive Ion Etching(DRIE) process.Test results reveal that frequency split between the normal modes is of less than 10 Hz before the following electronic tuning.Thus,the mode matching of the electromagnetic vibrating ring gyroscope is probable to be realized.展开更多
A novel structure is proposed for doubling the vertical breakdown voltage of silicon-on-insulator(SOI) devices. In this new structure, the conventional buried oxide(BOX) in an SOI device is split into two sections...A novel structure is proposed for doubling the vertical breakdown voltage of silicon-on-insulator(SOI) devices. In this new structure, the conventional buried oxide(BOX) in an SOI device is split into two sections: the source-section BOX and the drain-section BOX. A highly-doped Si layer, referred to as a non-depletion potential-clamped layer(NPCL), is positioned under and close to the two BOX sections. In the split BOXes and the Si region above the BOXes, the blocking voltage(BV) is divided into two parts by the NPCL. The voltage in the NPCL is clamped to be nearly half of the drain voltage. When the drain voltage approaches a breakdown value, the voltage sustained by the source-section BOX and the Si region under the source are nearly the same as the voltage sustained by the drain-section BOX and the Si region under the drain. The vertical BV is therefore almost doubled. The effectiveness of this new structure was verified for a P-channel SOI lateral double-diffused metal-oxide semiconductor(LDMOS) and can be applied to other high-voltage SOI devices. The simulation results show that the BV in an NPCL P-channel SOI LDMOS is improved by 55% and the specific on-resistance(Ron,sp) is reduced by 69% in comparison to the conventional structure.展开更多
Utilizing a high-Q microdisk resonator (MDR) on a single silicon-on-insulator (SOI) chip, a compact microwave photonic filter (MPF) with a continuously tunable central frequency is proposed and experimentally de...Utilizing a high-Q microdisk resonator (MDR) on a single silicon-on-insulator (SOI) chip, a compact microwave photonic filter (MPF) with a continuously tunable central frequency is proposed and experimentally demonstrated. Assisted by the optical single side-band (OSSB) modulation, the optical frequency response of the MDR is mapped to the microwave frequency response to form an MPF with a continuously tunable central frequency and a narrow 3-dB bandwidth. In the experiment, using an MDR with a compact size of 20×20 μm^2 and a high Q factor of 1.07×10^5, we obtain a compact MPF with a high rejection ratio of about 40 dB, a 3-dB bandwidth of about 2 GHz, and a frequency tuning range larger than 12 GHz. Our approach may allow the implementation of very compact, low-cost, low-consumption, and integrated notch MPF in a silicon chip.展开更多
A new analytical model for the surface electric field distribution and breakdown voltage of the silicon oil insulator (SOI) trench lateral double-diffused metal-oxide-semiconductor (LDMOS) is presented. Based on t...A new analytical model for the surface electric field distribution and breakdown voltage of the silicon oil insulator (SOI) trench lateral double-diffused metal-oxide-semiconductor (LDMOS) is presented. Based on the two-dimensional Laplace solution and Poisson solution, the model considers the influence of structure parameters such as the doping concentration of the drift region, and the depth and width of the trench on the surface electric field. Further, a simple analytical expression of the breakdown voltage is obtained, which offers an effective way to gain an optimal high voltage. All the analytical results are in good agreement with the simulation results.展开更多
In this paper, a method to fabricate Silicon-on-Nothing (SON) MOSFETs using H^+ and He^+ co-implantation is presented. The technique is compatible with conventional CMOS technology and its feasibility has been exp...In this paper, a method to fabricate Silicon-on-Nothing (SON) MOSFETs using H^+ and He^+ co-implantation is presented. The technique is compatible with conventional CMOS technology and its feasibility has been experimentally demonstrated. SON MOSFETs with 50nm gate length have been fabricated. Compared with the corresponding bulk MOSFETs, the SON MOSFETs show higher on current, reduced leakage current and lower subthreshold slope.展开更多
The influence of characteristics’ measurement sequence on total ionizing dose effect in partially-depleted SOI nMOSFET is comprehensively studied. We find that measuring the front-gate curves has no influence on tota...The influence of characteristics’ measurement sequence on total ionizing dose effect in partially-depleted SOI nMOSFET is comprehensively studied. We find that measuring the front-gate curves has no influence on total ionizing dose effect.However, the back-gate curves’ measurement has a great influence on total ionizing dose effect due to high electric field in the buried oxide during measuring. In this paper, we analyze their mechanisms and we find that there are three kinds of electrons tunneling mechanisms at the bottom corner of the shallow trench isolation and in the buried oxide during the backgate curves’ measurement, which are: Fowler–Nordheim tunneling, trap-assisted tunneling, and charge-assisted tunneling.The tunneling electrons neutralize the radiation-induced positive trapped charges, which weakens the total ionizing dose effect. As the total ionizing dose level increases, the charge-assisted tunneling is enhanced by the radiation-induced positive trapped charges. Hence, the influence of the back-gate curves’ measurement is enhanced as the total ionizing dose level increases. Different irradiation biases are compared with each other. An appropriate measurement sequence and voltage bias are proposed to eliminate the influence of measurement.展开更多
The effects of back gate bias(BGEs) on radio-frequency(RF) performances in PD SOI n MOSFETs are presented in this paper. Floating body(FB) device, T-gate body-contact(TB) device, and tunnel diode body-contact(TDBC) de...The effects of back gate bias(BGEs) on radio-frequency(RF) performances in PD SOI n MOSFETs are presented in this paper. Floating body(FB) device, T-gate body-contact(TB) device, and tunnel diode body-contact(TDBC) device, of which the supply voltages are all 1.2 V, are compared under different back gate biases by different figures of merit, such as cut-off frequency( fT), maximum frequency of oscillation( fmax), etc. Because of the lack of a back gate conducting channel, the drain conductance(gd) of TDBC transistor shows a smaller degradation than those of the others, and the trans-conductance(gm) of TDBC is almost independent of back gate bias. The values of fT of TDBC are also kept nearly constant under different back gate biases. However, RF performances of FB and TB each show a significant degradation when the back gate bias is larger than ~ 20 V. The results indicate that TDBC structures could effectively improve the back gate bias in RF performance.展开更多
A novel high-order three-dimensional (3-D) discontinuous Galerkin time domain (DGTD) method based on a normalized formulation of Maxwell's equations is developed for modeling and simulating silicon-on-insulator ...A novel high-order three-dimensional (3-D) discontinuous Galerkin time domain (DGTD) method based on a normalized formulation of Maxwell's equations is developed for modeling and simulating silicon-on-insulator (SOD thin-ridge waveguide. The DGTD method employs unstructured meshes and piecewise high-order polynomials for spatial discretization, and Runge-Kutta methods for time integration. It is found that the numerical results of the leakage loss of SOI thin-ridge waveguide agree well with those of analytical solutions, which proves that the proposed method is an ideal tool for the quantitative analysis for SOI thin-ridge waveguide.展开更多
A 10-MHz face shear (FS) square micro- mechanical resonator based on silicon-on-insulator (SO1) technology is presented in this paper. In order to examine the improvement of quality factor as well as motional resi...A 10-MHz face shear (FS) square micro- mechanical resonator based on silicon-on-insulator (SO1) technology is presented in this paper. In order to examine the improvement of quality factor as well as motional resistance Rx in this structure, the center-stem anchor is employed in this study. The benefit of anchoring the square in the center, which is the nodal point, is that the energy losses through the anchor can be minimized. Hence, a quality factor value of 2.0 million and the motional resistance of 8.2 k~ can be obtained with an FS mode resonator via finite element (FE) simulation. The results show the significance of the FS mode in this design, not only in its structure but also in its square-extensional mode and Lame-mode. Additionally, an SOI-based fabrication process is proposed to support the design.展开更多
Total ionizing dose responses of different transistor geometries after being irradiated by ^(60)Co γ-rays, in 0.13-μm partially-depleted silicon-on-insulator(PD SOI) technology are investigated. The negative thr...Total ionizing dose responses of different transistor geometries after being irradiated by ^(60)Co γ-rays, in 0.13-μm partially-depleted silicon-on-insulator(PD SOI) technology are investigated. The negative threshold voltage shift in an n-type metal-oxide semiconductor field effect transistor(nMOSFET) is inversely proportional to the channel width due to radiation-induced charges trapped in trench oxide, which is called the radiation-induced narrow channel effect(RINCE).The analysis based on a charge sharing model and three-dimensional technology computer aided design(TCAD) simulations demonstrate that phenomenon. The radiation-induced leakage currents under different drain biases are also discussed in detail.展开更多
文摘An experiment for preparation of SOI films by using the scanning electron beam to modify the polycrystalline silicon on SiO2 is presented. This method takes on the epitaxial lateral growth of liquid phase with the crystallon to form monocrystalline silicon films. The effects of the beam power density, scanning velocity, temperature of the substrates and the construction of samples on the quality of the monocrystalline silicon films were discussed. A good experimental result has been obtained, the monocrystalline silicon zone is nearly 200×25μm2.
文摘To overcome the floating-body effect and self-heating effect of SOI devices,the drain and source on insulator (DSOI) structure is fabricated and tested.The low dose developed recently and low energy local SIMOX technology combined with the conventional CMOS technology is used to fabricate this kind of devices.Using this method,DSOI,SOI,and bulk MOSFETs are successfully integrated on a single chip.Test results show that the drain induced barrier lowering effect is suppressed.The breakdown voltage drain-to-source is greatly increased for DSOI devices due to the elimination of the floating-body effect.And the self-heating effect is also reduced and thus the reliability increased.At the same time,the advantage of SOI devices in speed is maintained.The technology makes it possible to integrate low voltage,low power,low speed SOI devices or high voltage,high power,high speed DSOI devices on one chip and it offers option for developing system-on-chip technology.
基金Project supported by the National Natural Science Foundation of China(Grant No.61376080)the Natural Science Foundation of Guangdong Province,China(Grant No.2014A030313736)the Fundamental Research Funds for the Central Universities,China(Grant No.ZYGX2013J030)
文摘An analytical model for a novel triple reduced surface field(RESURF) silicon-on-insulator(SOI) lateral doublediffused metal–oxide–semiconductor(LDMOS) field effect transistor with n-type top(N-top) layer, which can obtain a low on-state resistance, is proposed in this paper. The analytical model for surface potential and electric field distributions of the novel triple RESURF SOI LDMOS is presented by solving the two-dimensional(2D) Poisson's equation, which can also be applied to single, double and conventional triple RESURF SOI structures. The breakdown voltage(BV) is formulized to quantify the breakdown characteristic. Besides, the optimal integrated charge of N-top layer(Q_(ntop)) is derived, which can give guidance for doping the N-top layer. All the analytical results are well verified by numerical simulation results,showing the validity of the presented model. Hence, the proposed model can be a good tool for the device designers to provide accurate first-order design schemes and physical insights into the high voltage triple RESURF SOI device with N-top layer.
基金supported by the Project of National Natural Science Foundation of China(Grant Nos.61376099,11235008,61434007)the Specialized Research Fund for the Doctoral Program of High Education(Grant No.20130203130002)
文摘This work researched the impact of total dose irradiation on the threshold voltage of N-type metal oxide semiconductor field effect transistors(nMOSFETs) in silicon-on-insulator(SOI) technology.Using the subthreshold separation technology,the factor causing the threshold voltage shift was divided into two parts:trapped oxide charges and interface states,the effects of which are presented under irradiation.Furthermore,by analyzing the data,the threshold voltage shows a negative shift at first and then turns to positive shift when irradiation dose is lower.Additionally,the influence of the dose rate effects on threshold voltage is discussed.The research results show that the threshold voltage shift is more significant in low dose rate conditions,even for a low dose of100 krad(Si).The degeneration value of threshold voltage is 23.4%and 58.0%for the front-gate and the back-gate at the low dose rate,respectively.
基金Supported by the National Natural Science Foundation of China(No.61072022)
文摘Mode matching is the key to improve the performance of micro-machined vibrating ring gyroscopes.Mass and stiffness asymmetries can lend to normal modes badly mismatch for gyroscopes fabricated by single-crystal silicon.The mismatch of the normal nodes results in large normal mode frequency split and degraded sensitivity.To address this issue,a Silicon-On-Insulator(SOI) wafer is used to fabricate the sensor chips.Meanwhile,a compensate disk and the backside coated negative photo resist(AZ303) is employed to weaken the Lag and Footing effect during the Deep Reactive Ion Etching(DRIE) process.Test results reveal that frequency split between the normal modes is of less than 10 Hz before the following electronic tuning.Thus,the mode matching of the electromagnetic vibrating ring gyroscope is probable to be realized.
基金supported by the National Natural Science Foundation of China(Grant No.61404110)the National Higher-Education Institution General Research and Development Project,China(Grant No.2682014CX097)
文摘A novel structure is proposed for doubling the vertical breakdown voltage of silicon-on-insulator(SOI) devices. In this new structure, the conventional buried oxide(BOX) in an SOI device is split into two sections: the source-section BOX and the drain-section BOX. A highly-doped Si layer, referred to as a non-depletion potential-clamped layer(NPCL), is positioned under and close to the two BOX sections. In the split BOXes and the Si region above the BOXes, the blocking voltage(BV) is divided into two parts by the NPCL. The voltage in the NPCL is clamped to be nearly half of the drain voltage. When the drain voltage approaches a breakdown value, the voltage sustained by the source-section BOX and the Si region under the source are nearly the same as the voltage sustained by the drain-section BOX and the Si region under the drain. The vertical BV is therefore almost doubled. The effectiveness of this new structure was verified for a P-channel SOI lateral double-diffused metal-oxide semiconductor(LDMOS) and can be applied to other high-voltage SOI devices. The simulation results show that the BV in an NPCL P-channel SOI LDMOS is improved by 55% and the specific on-resistance(Ron,sp) is reduced by 69% in comparison to the conventional structure.
基金supported by the National Basic Research Program of China(Grant No.2011CB301704)the Program for New Century Excellent Talents in Ministry of Education of China(Grant No.NCET-11-0168)+1 种基金the Foundation for the Author of National Excellent Doctoral Dissertation of China(Grant No.201139)the National Natural Science Foundation of China(Grant Nos.60901006 and 11174096)
文摘Utilizing a high-Q microdisk resonator (MDR) on a single silicon-on-insulator (SOI) chip, a compact microwave photonic filter (MPF) with a continuously tunable central frequency is proposed and experimentally demonstrated. Assisted by the optical single side-band (OSSB) modulation, the optical frequency response of the MDR is mapped to the microwave frequency response to form an MPF with a continuously tunable central frequency and a narrow 3-dB bandwidth. In the experiment, using an MDR with a compact size of 20×20 μm^2 and a high Q factor of 1.07×10^5, we obtain a compact MPF with a high rejection ratio of about 40 dB, a 3-dB bandwidth of about 2 GHz, and a frequency tuning range larger than 12 GHz. Our approach may allow the implementation of very compact, low-cost, low-consumption, and integrated notch MPF in a silicon chip.
基金Project supported by the National Natural Science Foundation of China (Grant Nos. 61176069 and 60976060)the National Key Laboratory of Analogue Integrated Circuit, China (Grant No. 9140C090304110C0905)
文摘A new analytical model for the surface electric field distribution and breakdown voltage of the silicon oil insulator (SOI) trench lateral double-diffused metal-oxide-semiconductor (LDMOS) is presented. Based on the two-dimensional Laplace solution and Poisson solution, the model considers the influence of structure parameters such as the doping concentration of the drift region, and the depth and width of the trench on the surface electric field. Further, a simple analytical expression of the breakdown voltage is obtained, which offers an effective way to gain an optimal high voltage. All the analytical results are in good agreement with the simulation results.
基金Project supported by National Natural Science Foundation of China (Grant No 90207004) and State Key Fundamental Research Project of China.
文摘In this paper, a method to fabricate Silicon-on-Nothing (SON) MOSFETs using H^+ and He^+ co-implantation is presented. The technique is compatible with conventional CMOS technology and its feasibility has been experimentally demonstrated. SON MOSFETs with 50nm gate length have been fabricated. Compared with the corresponding bulk MOSFETs, the SON MOSFETs show higher on current, reduced leakage current and lower subthreshold slope.
文摘The influence of characteristics’ measurement sequence on total ionizing dose effect in partially-depleted SOI nMOSFET is comprehensively studied. We find that measuring the front-gate curves has no influence on total ionizing dose effect.However, the back-gate curves’ measurement has a great influence on total ionizing dose effect due to high electric field in the buried oxide during measuring. In this paper, we analyze their mechanisms and we find that there are three kinds of electrons tunneling mechanisms at the bottom corner of the shallow trench isolation and in the buried oxide during the backgate curves’ measurement, which are: Fowler–Nordheim tunneling, trap-assisted tunneling, and charge-assisted tunneling.The tunneling electrons neutralize the radiation-induced positive trapped charges, which weakens the total ionizing dose effect. As the total ionizing dose level increases, the charge-assisted tunneling is enhanced by the radiation-induced positive trapped charges. Hence, the influence of the back-gate curves’ measurement is enhanced as the total ionizing dose level increases. Different irradiation biases are compared with each other. An appropriate measurement sequence and voltage bias are proposed to eliminate the influence of measurement.
文摘The effects of back gate bias(BGEs) on radio-frequency(RF) performances in PD SOI n MOSFETs are presented in this paper. Floating body(FB) device, T-gate body-contact(TB) device, and tunnel diode body-contact(TDBC) device, of which the supply voltages are all 1.2 V, are compared under different back gate biases by different figures of merit, such as cut-off frequency( fT), maximum frequency of oscillation( fmax), etc. Because of the lack of a back gate conducting channel, the drain conductance(gd) of TDBC transistor shows a smaller degradation than those of the others, and the trans-conductance(gm) of TDBC is almost independent of back gate bias. The values of fT of TDBC are also kept nearly constant under different back gate biases. However, RF performances of FB and TB each show a significant degradation when the back gate bias is larger than ~ 20 V. The results indicate that TDBC structures could effectively improve the back gate bias in RF performance.
基金Supported by the Priority Academic Program Development of Jiangsu Higher Education Institutions
文摘A novel high-order three-dimensional (3-D) discontinuous Galerkin time domain (DGTD) method based on a normalized formulation of Maxwell's equations is developed for modeling and simulating silicon-on-insulator (SOD thin-ridge waveguide. The DGTD method employs unstructured meshes and piecewise high-order polynomials for spatial discretization, and Runge-Kutta methods for time integration. It is found that the numerical results of the leakage loss of SOI thin-ridge waveguide agree well with those of analytical solutions, which proves that the proposed method is an ideal tool for the quantitative analysis for SOI thin-ridge waveguide.
基金supported by the National Natural Science Foundation of Chinathe China Academy of Engineering Physics under Grand No.11176006
文摘A 10-MHz face shear (FS) square micro- mechanical resonator based on silicon-on-insulator (SO1) technology is presented in this paper. In order to examine the improvement of quality factor as well as motional resistance Rx in this structure, the center-stem anchor is employed in this study. The benefit of anchoring the square in the center, which is the nodal point, is that the energy losses through the anchor can be minimized. Hence, a quality factor value of 2.0 million and the motional resistance of 8.2 k~ can be obtained with an FS mode resonator via finite element (FE) simulation. The results show the significance of the FS mode in this design, not only in its structure but also in its square-extensional mode and Lame-mode. Additionally, an SOI-based fabrication process is proposed to support the design.
基金Project supported by the Weapon Equipment Pre-Research Foundation of China(Grant No.9140A11020114ZK34147)the Shanghai Municipal Natural Science Foundation,China(Grant No.15ZR1447100)
文摘Total ionizing dose responses of different transistor geometries after being irradiated by ^(60)Co γ-rays, in 0.13-μm partially-depleted silicon-on-insulator(PD SOI) technology are investigated. The negative threshold voltage shift in an n-type metal-oxide semiconductor field effect transistor(nMOSFET) is inversely proportional to the channel width due to radiation-induced charges trapped in trench oxide, which is called the radiation-induced narrow channel effect(RINCE).The analysis based on a charge sharing model and three-dimensional technology computer aided design(TCAD) simulations demonstrate that phenomenon. The radiation-induced leakage currents under different drain biases are also discussed in detail.