This paper presents a 4×2 switching matrix implemented in the Win 0.5 μm Ga As pseudomorphic high electron mobility transistor process, it covers the 0.5–3 GHz frequency range. The switch matrix is composed of ...This paper presents a 4×2 switching matrix implemented in the Win 0.5 μm Ga As pseudomorphic high electron mobility transistor process, it covers the 0.5–3 GHz frequency range. The switch matrix is composed of 4 SPDT switch whose two output ports can simultaneously select the input port and a 4 to 8 bit digital decoder,both the radio frequency（RF） part and the digital part are integrated into one single chip. The chip is packaged in a low cost QFN24 plastic package. On chip shunt, capacitors at the input ports are taken to compensate for the bonding wire inductance effect. The designed switch matrix shows a good measured performance： the insertion loss is less than 5.5 dB, the isolation is no worse than 30 dB, the return loss of input ports and output ports is better than –10 dB, the input 1 dB compression point is better than 25.6 dBm, and the OIP3 is better than 37 dBm. The chip size of the switch matrix is only 1.45×1.45 mm^2.展开更多
A broadband monolithic linear single pole, eight throw （SP8T） switch has been fabricated in 180 nm thin film silicon-on-insulator （SOI） CMOS technology with a quad-band GSM harmonic filter in integrated passive de...A broadband monolithic linear single pole, eight throw （SP8T） switch has been fabricated in 180 nm thin film silicon-on-insulator （SOI） CMOS technology with a quad-band GSM harmonic filter in integrated passive devices （IPD） technology, which is developed for cellular applications. The antenna switch module （ASM） features 1.2 dB insertion loss with filter on 2G bands and 0.4 dB insertion loss in 3G bands, less than -45 dB isolation and maximum -103 dB intermodulation distortion for mobile front ends by applying distributed architecture and adaptive supply voltage generator.展开更多
文摘This paper presents a 4×2 switching matrix implemented in the Win 0.5 μm Ga As pseudomorphic high electron mobility transistor process, it covers the 0.5–3 GHz frequency range. The switch matrix is composed of 4 SPDT switch whose two output ports can simultaneously select the input port and a 4 to 8 bit digital decoder,both the radio frequency（RF） part and the digital part are integrated into one single chip. The chip is packaged in a low cost QFN24 plastic package. On chip shunt, capacitors at the input ports are taken to compensate for the bonding wire inductance effect. The designed switch matrix shows a good measured performance： the insertion loss is less than 5.5 dB, the isolation is no worse than 30 dB, the return loss of input ports and output ports is better than –10 dB, the input 1 dB compression point is better than 25.6 dBm, and the OIP3 is better than 37 dBm. The chip size of the switch matrix is only 1.45×1.45 mm^2.
文摘A broadband monolithic linear single pole, eight throw （SP8T） switch has been fabricated in 180 nm thin film silicon-on-insulator （SOI） CMOS technology with a quad-band GSM harmonic filter in integrated passive devices （IPD） technology, which is developed for cellular applications. The antenna switch module （ASM） features 1.2 dB insertion loss with filter on 2G bands and 0.4 dB insertion loss in 3G bands, less than -45 dB isolation and maximum -103 dB intermodulation distortion for mobile front ends by applying distributed architecture and adaptive supply voltage generator.
