Capacitor Pattern H-Bridge Multilevel Inverter (CPHMLI) Using Phase Diposition Pulse Width Modulation for Grid Applications

This work presents an implementation of an innovative single phase multilevel inverter using capacitors with reduced switches. The proposed Capacitor pattern H-bridge Multilevel Inverter (CPHMLI) topology consists of a proper number of Capacitor connected with switches and power sources. The advanced switching control supplied by Pulse Width Modulation (PDPWM) to attain mixed staircase switching state. The charging and discharging mode are achieved by calculating the voltage error at the load. Furthermore, to accomplish the higher voltage levels at the output with less number of semiconductors switches and simple commutation designed using CPHMLI topology. To prove the performance and effectiveness of the proposed approach, a set of experiments performed under various load conditions using MATLAB tool.

Improved VSVPWM Modulation Method for Three-level NPC Inverter in Rural Power Grid

With the acceleration of agricultural electrification,a lot of nonlinear and shock loads appear in the rural power grid,and the resulting harmonic and reactive currents pollute the rural power grid more and more seriously.To solve the above problem,three-level neutral point clamped(NPC)inverters have been widely used,but their development is greatly restricted by the defect of neutral point voltage imbalance.In this paper,an improved virtual space vector pulse width modulation(VSVPWM)was proposed.Firstly,the mathematical models of various space vectors were established,and the influence of various space vectors on neutral point voltage was analyzed.The sum of the vector current at the neutral point was zero and the voltage control at the neutral point was completed by.introducing the time offset into different switching times of the redundant small vector.This method was simple in design and avoided the redundant calculation of the traditional VSVPWM method and tedious switch sequence design.This balancing control strategy could greatly reduce the influence of virtual vectors on neutral point voltage and effectively control the low-frequency oscillation of neutral point voltage.The validity of the method was verified by establishing a matlab simulation model.

Global synchronous discontinuous pulse width modulation method with fast calculation capability for distributed three-phase inverters

When multiple distributed converters are integrated, the high frequency harmonics will randomly accumulate at the point of common coupling(PCC). This paper proposes a new fast global synchronous discontinuous pulse width modulation(GSDPWM) method of threephase inverters to effectively attenuate the high frequency current harmonics at PCC. Firstly, the basic principle and the realization method of GSDPWM for three-phase inverters are explained, which can be employed for different modulation types. Then a fast calculation method,which can equally derive the minimized total harmonic distortion(THD) of total current, is proposed to release the calculation burden. Finally, MATLAB simulations and experimental results are presented to verify the performance of GSDPWM.

Genetic Algorithm Based 7-Level Step-Up Inverter with Reduced Harmonics and Switching Devices

This paper presents a unique voltage-raising topology for a single-phase seven-level inverter with triple output voltage gain using single input source and two switched capacitors.The output voltage has been boosted up to three times the value of input voltage by configuring the switched capacitors in series and parallel combinations which eliminates the use of additional step-up converters and transformers.The selective harmonic elimination(SHE)approach is used to remove the lower-order harmonics.The optimal switching angles for SHE is determined using the genetic algorithm.These switching angles are com-bined with a level-shifted pulse width modulation(PWM)technique for pulse generation,resulting in reduced total harmonic distortion(THD).A detailed com-parison has been made against other relevant seven-level inverter topologies in terms of the number of switches,drivers,diodes,capacitors,and boosting facil-ities to emphasize the benefits of the proposed model.The proposed topology is simulated using MATLAB/SIMULINK and an experimental prototype has been developed to validate the results.The Digital Signal Processing(DSP)TMS320F2812 board is used to generate the switching pulses for the proposed technique and the experimental results concur with the simulated model outputs.

A Sensor-less Surface Mounted PMSM for Electronic Speed Control in Multilevel Inverter

Recent advancements in power electronics technology evolves inverter fed electric motors.Speed signals and rotor position are essential for controlling an electric motor accurately.In this paper,the sensorless speed control of surface-mounted permanent magnet synchronous motor(SPMSM)has been attempted.SPMSM wants a digital inverter for its precise working.Hence,this study incor-poratesfifteen level inverter to the SPMSM.A sliding mode observer(SMO)based sensorless speed control scheme is projected to determine rotor spot and speed of the multilevel inverter(MLI)fed SPMSM.MLI has been operated using a multi carrier pulse width modulation(MCPWM)strategy for generation offif-teen level voltages.The simulation works are executed with MATLAB/SIMU-LINK software.The steadiness and the heftiness of the projected model have been investigated under no loaded and loaded situations of SPMSM.Furthermore,the projected method can be adapted for electric vehicles.

New Approach of Multi-Cell Stacked Cell Inverter for Solar Photovoltaic System

In this paper, a new inverter topology dedicated to isolated or grid-connected PV systems is proposed. This inverter is based on the structures of a stacked multi-cell converter (SMC) and an H-bridge. This new topology has allowed the voltage stresses of the converter to be distributed among several switching cells. Secondly, divide the input voltage into several fractions to reduce the number of power semiconductors to be switched. In this contribution, the general topology of this micro-inverter has been described and the simulation tests developed to validate its operation have been presented. Finally, we discussed the simulation results, the efficiency of this topology and the feasibility of its use in a grid-connected photovoltaic production system.

Ride through Strategy for a Three-Level Dual Z-Source Inverter Using TRIAC

A new ride through strategy is introduced in a three-level dual Z-source inverter, for isolation under semiconductor switching failure condition. Here the output will have no significant decrease in the amplitude and quality. Instead of diodes, the triacs are added to the inverter source ends, as it can perform a bidirectional power transfer also it can operate well in both low and high voltage operating conditions. The faulted part can be isolated by simply altering the firing pulses for turning on/off the triacs using the carrier based SPWM technique and resulting in a boosting output with zero common mode voltage. Consequently, it forms a common floating point or null point with a zero common mode voltage. It is experimentally verified by using MATLAB, and digital oscilloscope.

A Novel Single-Phase Five-Level Transformer-less Photovoltaic (PV) Inverter

Multilevel inverters are preferred solutions for photovoltaic(PV)applications because of lower total harmonic distortion(THD),lower switching stress and lower electromagnetic interference(EMI).In order to reduce the leakage current in the single-phase low-power PV inverters,a five-level transformer-less inverter is proposed in this paper.A total of eleven switches are required,while six of them only withstand a quarter of the dc-bus voltage,so the costs for them are low.Another four switches are turned on or off at the power line cycle,the switching losses for them are ignored.In addition,the flying-capacitors(FCs)voltages are only a quarter of the dc-bus voltage,and they are balanced at the switching frequency,which further reduces the system investment.The experimental results based on a 1 kW prototype show that the proposed modulation strategy can balance the FCs voltages at Vdc/4 very well.And the leakage current can be reduced to about 27 mA under both active and reactive operations,which satisfies the VDE 0126-1-1 standard.

Grid-connected inverter for wind power generation system

In wind power generation system the grid-connected inverter is an important section for energy conversion and transmission, of which the performance has a direct influence on the entire wind power generation system. The mathematical model of the grid-connected inverter is deduced firstly. Then, the space vector pulse width modulation （SVPWM） is analyzed. The power factor can be controlled close to unity, leading or lagging, which is realized based on H-type current controller and grid voltage vector-oriented control. The control strategy is verified by the simulation and experimental results with a good sinusoidal current, a small harmonic component and a fast dynamic response.

A Comparison of Control Methods for Z-Source Inverter

In recent years, Z-source inverters (ZSI) have been proposed as an replacement power conversion concept which it has both voltage buck and boost abilities. In addition, ZSI doesn’t require dead-time to protection short circuit at two switches any of the same phase leg in the inverter bridge and to achieve optimal harmonic of current, voltage. This paper presents two different control methods (CM) for ZSI. The aim of this study to compare between two modulation methods, there are modi?ed space vector pulse width modulation method (MSVM) and the simple boost control (SBC) about the unique harmonic performance features, the total average and peak switching device power of the inverter system. In addition, this paper also analyzes about the ability exceed modulation index in linear region of two CM using MATLAB/Simulink.

Digital close loop control system for current-programmed mode arc welding inverter

A small-signal model of current programmed mode pulse width modulation converter including the equivalent sampling effect is introduced and analyzed. In this model, an addition pole is brought out by the sampling effect in the current loop gain, and it affects dynamic bandwidth and stability of the inner current loop. By selecting the appropriate stability parameter which determines the additional pole and describes the degree of peaking in closed loop transfer function, a control model of current programmed full bridge arc welding inverter with maximum frequency bandwidth and stability can be obtained. Small and large amplitude pulse current outputs are employed in simulations and experiments and results validate the design method.

A New Switching Scheme for Z-source Inverter to Minimize Ripples in the Z-source Elements

This paper presents a modification in pulse width modulation （PWM） scheme with unequal shoot-through distribution for the Z-source inverter （ZSI） which can minimize ripples in the current through the Z-source inductors as well as the voltage across the Z-source capacitors. For the same system parameters, the proposed control technique provides better voltage boost across the Z-source capacitor, DC-link, and also the AC output voltage than the traditional PWM. The ripples in the Z-network elements are found to be reduced by 75 % in the proposed modulation scheme with optimum harmonic profile in the AC output. Since the Zqnetwork requirement will be based on the ripple profile of the elements, the Z-network requirements can be greatly reduced. The effectiveness of the proposed modulation scheme has been simulated in Matlab/Simulink software and the results are validated by the experiment in the laboratory.

Design and Analysis of Cascaded Hybrid-Bridge Multi-Cell Multilevel Inverter with Reduced Total Harmonic Distortion Profile

This multilevel inverter methodology is the center of focus among researchers in recent era.It has been focused due to its advantages over existing topologies,drawbacks and improvement of power quality,Multi-level inverter has the ability to generate nearly sinusoidal waves.This sinusoidal wave can be further improved by increasing the level of output voltage or with the help of filter design,and this manuscript presents single-phase Multi cell Multi-Level Inverter(MLI).It has been considered for reducing component count to get a higher number of output voltage levels and lower Total harmonics distortion profile.It comprises with four symmetric DC input voltage and 10 IGBT switches to produces stepped output of 9 level,and when deploy asymmetric Dc voltage source the same circuit will produce 31 level output with some changes in firing scheme,moreover this circuit is the family of cascaded hybrid bridge inverter so this circuit covered advantage of CHB MLI,This circuit uses lower no.of switch as compared to existing conventional MLIs such as FC-MLI,CHB-MLI,NPC-MLI,This paper also provides one of most pertinent controls and modulation mechanisms for a MLI using a hybrid reference/carrier-oriented sinusoidal PWM mechanism.At last,simulated outcomes are to validate the performance of both architectures in MLI structure as well as verify the concept.

A type of inverter power supply based on harmonic elimination PWM control

In order to output sine wave with small degree of distortion and improve stability,a type of inverter power supply is designed based on harmonic elimination pulse-width modulation(PWM)control.The rectifier and filter are added to input circuit of the inverter.Single-phrase full-bridge inverter performs the function of converting direct current into alternating current(DC/AC).In the control circuit,single chip micyoco(SCM)AT89C2051 is used for main control chip to accomplish the hardware design of the control system.A given value of output frequency of the inverter is input in the way of coding.According to the output frequency code which is read,SCM AT89C2051 defined harmonic elimination PWM control data which will be selected.Through internal timing control,the switches are switched under this provision of PWM control data.Then the driving signals of the switches in the inverter are output from I/O of SCM AT89C2051 to realize harmonic elimination PWM control.The results show that adding Newton homotopic algorithm of harmonic elimination PWM control to corresponding software of the control system can make the quality of output voltage of the inverter higher and it will have broad application prospects.

Asymmetric Three-Phase Cascading Trinary-DC Source Multilevel Inverter Topologies for Variable Frequency PWM

Asymmetric three-phase cascading Trinary-DC source Multilevel Inverter which can achieve reduced harmonics and superior root mean square (RMS) values of the output voltage is proposed. This topology can achieve cascaded full bridge inverter operation with dissimilar (unequal) DC Source and it is fired by using variable frequency pulse with modulation technique as a switching strategy. This pulse width modulation switching strategy has a newly adopted multicarrier single reference technique. The performance parameter factors like Form Factor (FF), Crest Factor (CF), Total Harmonic Distortion (THD) and fundamental RMS output voltage (VRMS) are estimated by using proposed asymmetrical three-phase cascading multilevel inverter for several modulation indices (0.8 - 1). The research study carries with MATLAB/SIMULINK based simulation and experimental results obtained using appropriate prototype (test board) to prove the viability of the proposed concept.

A Novel Multilevel Inverter Employing Additive and Subtractive Topology

As the demand for high voltage, high power inverters are increasing and there is a problem of connecting a power semiconductor switch directly to a high voltage network. As a part of this the multilevel inverters had been introduced. As a part of this, several researches had been done for the development of multilevel inverters. The commercially available and extensively studied topologies for multilevel voltage output are Neutral Point Clamped (NPC), Cascaded Half Bridge (CHB) and Flying Capacitor (FC) converters. However, with these existing topologies, there is a significant increase in the number of power switches and passive components. Thus it leads to more complex control circuitry and overall cost of the system increase with increase in the output levels. In this paper, a novel multilevel inverter is proposed in which it employs additive and subtractive topology to get higher output levels. This approach significantly reduces the number of power switches needed as compared to existing topology. The present developed multilevel inverter can generate only five voltage levels. With this proposed topology the multilevel inverter can be modified to nine-level inverter. Moreover modified hybrid multicarrier Pulse Width Modulation (PWM) technique can be implemented in the proposed multilevel inverter in order to obtain uniform switch utilization and lower THD. An appropriate modulation scheme is presented and also the proposed concept is analyzed through simulation studies.

State Space Modeling and Implementation of a New Transformer Based Multilevel Inverter Topology with Reduced Switch Count

This paper presents a new transformer based multilevel inverter, with a novel pulse width modulation scheme to achieve seven-level inverter output voltage. The proposed inverter switching pattern consists of three fundamental frequency sinusoidal reference signals with an offset value, and one high frequency triangular carrier signal. This switching scheme has been implemented using an 8-bit Xilinx SPARTAN-3E field programmable gate array based controller. In addition, the state space model of the proposed inverter is developed. The significant features of the proposed topology are: reduction of the power switch count and the gate drive power supply unit, the provision of a galvanic isolation between load and sources by a centre tap transformer. An exhaustive comparison has been made of the existing multilevel inverter topologies and the proposed topology. The performances of the proposed topology with resistive, resistive-inductive loads are simulated in a MATLAB environment and validated experimentally on a laboratory prototype.

Reduction of THD in Thirteen-Level Hybrid PV Inverter with Less Number of Switches

Multilevel inverter (MLI) is one of the most efficient power converters which are especially suited for high power applications with reduced harmonics. MLI not only achieves high output power and is also used in renewable energy sources such as photovoltaic, wind and fuel cells. Among various topologies of MLI, this paper mainly focuses on cascaded MLI with three unequal DC sources called asymmetric cascaded MLI which reduces the number of power switches. Various modulation techniques are also reviewed in literature [1]. In this paper we focus on sinusoidal (or) multicarrier pulse width modulation (SPWM) which improves the output voltage at lower modulation index for obtaining lower Total Harmonic Distortion (THD) level. The gating signal for the 13-level hybrid inverter using SPWM technique is generated using Field Programmable Gate Array (FPGA) processor. The proposed modulation technique results in reduced percentage of THD, but lower order harmonics are not eliminated. So a new technique called Selective Harmonic Elimination (SHE) is also implemented in order to reduce the lower order harmonics. The optimum switching angles are determined for obtaining minimum THD. The performance evaluation of the proposed PWM inverter is verified using an experimental model of 13-level cascaded hybrid MLI and compared with MATLAB/SIMULINK model.

T型三电平逆变器中点电位平衡电路及控制

直流母线电压中点电位不平衡是T型三电平逆变器的拓扑结构造成的固有问题。这里从T型三电平逆变器的拓扑结构出发,分析了空间矢量脉宽调制(SVPWM)中大、中和小矢量对中点电位不平衡的影响,针对中点电位不平衡,在电源侧并联一个半桥模块且中点与母线中点串联电感的平衡电路,然后对平衡电路被控对象进行建模与分析,推导出中点电压平衡控制框图,通过对上、下电容进行充放电控制,控制中点电位达到平衡,最后,搭建了T型三电平逆变器实验平台,进行了仿真和实验验证,实验结果验证了所提平衡电路和控制的有效性和可行性。