Research on sinusoid modulated pulse MIG welding methodology

This article proposed a new methodology and the principle of sinusoid modulated pulse MIG welding, and systematically established the universal mathematical model of computation of the parameters of the sinusoid modulation pulse, achieving that the welding energy input can be effectively controlled and precisely regulated, the transition of pulse change is smooth and the welding process is stable and reliable. With the characteristics of sinusoidal waveform, such as infinite derivative continuity, eternal periodicity and limited control parameters, this article established the theoretical foundation for choiceness, unification and optimization of the parameters during the new sinusoid modulated pulse MIG welding. Bead-on-plate overlay welding is carried out on the pure aluminum sheet test sample for the test. The result indicated that during the welding process, the real-time current waveform is stable and clear; both the corresponding voltage and the instant welding energy waveform are very stable; the repeatability of the U-I graph plotted is high; its family of lines is clear, neat, and its distribution is concentrated showing that the welding process is stable and the neat and high quality ripple weld seam may be produced.

Comparison of performance between bipolar and unipolar double-frequency sinusoidal pulse width modulation in a digitally controlled H-bridge inverter system

By deriving the discrete-time models of a digitally controlled H-bridge inverter system modulated by bipolar sinu- soidal pulse width modulation （BSPWM） and unipolar double-frequency sinusoidal pulse width modulation （UDFSPWM） respectively, the performances of the two modulation strategies are analyzed in detail. The circuit parameters, used in this paper, are fixed. When the systems, modulated by BSPWM and UDFSPWM, have the same switching frequency, the stabil- ity boundaries of the two systems are the same. However, when the equivalent switching frequencies of the two systems are the same, the BSPWM modulated system is more stable than the UDFSPWM modulated system. In addition, a convenient method of establishing the discrete-time model of piecewise smooth system is presented. Finally, the analytical results are confirmed by circuit simulations and experimental measurements.

Ride through Strategy for a Three-Level Dual Z-Source Inverter Using TRIAC

A new ride through strategy is introduced in a three-level dual Z-source inverter, for isolation under semiconductor switching failure condition. Here the output will have no significant decrease in the amplitude and quality. Instead of diodes, the triacs are added to the inverter source ends, as it can perform a bidirectional power transfer also it can operate well in both low and high voltage operating conditions. The faulted part can be isolated by simply altering the firing pulses for turning on/off the triacs using the carrier based SPWM technique and resulting in a boosting output with zero common mode voltage. Consequently, it forms a common floating point or null point with a zero common mode voltage. It is experimentally verified by using MATLAB, and digital oscilloscope.

Implementation of FPGA Based Hybrid Power Generator for PV and Wind Grid Applications

This paper deals with implementation of Sinusoidal Pulse-Width-Modulation (SPWM) for a single-phase hybrid power filter generator for Photovoltaic (PV) and wind grid applications. Using policy iteration algorithm, an improved variable step-size perturbation and observation algorithm is contrived and it is implemented proficiently using a hard-ware description language (VHDL) (Very High Speed Integrated Circuit Hardware Description Language). Subsequently, the new generated grid source supplements the existing grid power in rural houses during its cut off or restricted supply period. The software is used for generating SPWM modulation integrated with a solar-power & wind power grid system which is implemented on the Spartan 3 FPGA. The proposed algorithm performs as a conventional controller in terms of tracking speed and mitigating fluctuation output power in steady state operation which is shown in the experimental results with a commercial PV array and HPW (Height Weight Proportional) show. Simulation results demonstrate the validity with load of the proposed algorithm.

Reduction of THD in Thirteen-Level Hybrid PV Inverter with Less Number of Switches

Multilevel inverter (MLI) is one of the most efficient power converters which are especially suited for high power applications with reduced harmonics. MLI not only achieves high output power and is also used in renewable energy sources such as photovoltaic, wind and fuel cells. Among various topologies of MLI, this paper mainly focuses on cascaded MLI with three unequal DC sources called asymmetric cascaded MLI which reduces the number of power switches. Various modulation techniques are also reviewed in literature [1]. In this paper we focus on sinusoidal (or) multicarrier pulse width modulation (SPWM) which improves the output voltage at lower modulation index for obtaining lower Total Harmonic Distortion (THD) level. The gating signal for the 13-level hybrid inverter using SPWM technique is generated using Field Programmable Gate Array (FPGA) processor. The proposed modulation technique results in reduced percentage of THD, but lower order harmonics are not eliminated. So a new technique called Selective Harmonic Elimination (SHE) is also implemented in order to reduce the lower order harmonics. The optimum switching angles are determined for obtaining minimum THD. The performance evaluation of the proposed PWM inverter is verified using an experimental model of 13-level cascaded hybrid MLI and compared with MATLAB/SIMULINK model.

High-Precision Dead-Time Intellectual Property Core and Its Compensation for Inverters

In the inverter circuit,there exists a specific on-off time in each power transistor.As such,to prevent a short circuit of the two switch devices on the upper and lower bridge arms,a specific dead time must be set in the pulse width modulation(PWM)and the sinusoidal pulse width modulation(SPWM)signals.In this paper,an intellectual property(IP)core that can introduce a high-precision dead time of arbitrary length into PWM or SPWM signals of the inverter is designed to increase the precision,convenience and generalization of dead time control,resulting in a boosted control accuracy of up to 10 ns.Moreover,the added Avalon bus enables IP cores to be accessed by the field programmable gate array(FPGA)processor in a standard manner and multiple IP cores of the same class can be easily incorporated.In addition,an application for setting and compensating for dead time in a three-phase inverter based on system on programmable chip(SOPC)technology is presented.With the Nios II CPU as its core,the system adopts the mean voltage compensation method to calculate the compensation voltage,and performs dead-time compensation in a feed-forward manner.The three dead-time IP cores are controlled by Avalon bus.These allow the dead time of three groups of power transistors to be accurately controlled and flexibly adjusted.The system also features the master computer communication function while boasting the advantages of flexible control,high precision and low cost.

Sliding mode approach applied to sensorless direct torque control of cage asynchronous motor via multi-level inverter

To improve the robustness and performance of the dynamic response of a cage asynchronous motor,a direct torque control(DTC)based on sliding mode control(SMC)is adopted to replace traditional proportional-integral(PI)and hysteresis comparators.The combination of the proposed strategy with sinusoidal pulse width modulation(SPWM)applied to a three-level neutral point clamped(NPC)inverter brings many advantages such as a reduction in harmonics,and precise and rapid tracking of the references.Simulations are performed for a three-level inverter with SM-DTC,a two-level inverter with SM-DTC and the three-level inverter with PI-DTC-SPWM.The results show that the SM-DTC method achieves better performance in terms of reference tracking,while adoption of the threelevel inverter topology can effectively reduce the ripples.Applying the SM-DTC to the three-level inverter presents the best solution for achieving efficient and robust control.In addition,the use of a sliding mode speed estimator eliminates the mechanical sensor and this increases the reliability of the system.

New method for estimating flying capacitor voltages in stacked multicell and flying capacitor multicell converters

Multicell converters are an interesting alternative for medium voltage and high power applications,because of the increased number of output voltage levels and apparent frequency.The two most significant types of multicell converter are the flying capacitor multicell (FCM) converter and its derivative,stacked multicell (SM) converter.Balancing flying capacitor voltages is an important constraint to the proper performance of FCM and SM converters.Thus,observation of the flying capacitor voltages used in active control is valuable,but using voltage sensors for observation increases cost and size of the converter.This paper deals with a new strategy to estimate the flying capacitor voltages of both FCM and SM converters.The proposed strategy is based on a discrete time model of the converter and uses only a load current sensor.The circuit was simulated using PSCAD/EMTDC software and simulation results were presented to validate the effectiveness of the proposed estimation strategy in observing the flying capacitor voltages.Simplicity is the most significant advantage of the proposed strategy,its performance being based on simple equations.