In radio receivers,complete implementation of the software defined radio(SDR) concept is mainly limited by frontend.Based on bandpass sampling(BPS) theory,a flexible digital frontend(DFE) platform for SDR receiver is ...In radio receivers,complete implementation of the software defined radio(SDR) concept is mainly limited by frontend.Based on bandpass sampling(BPS) theory,a flexible digital frontend(DFE) platform for SDR receiver is designed.In order to increase the processing speed,Gigabit Ethernet was applied in the platform at speed of 5×10~8 bit/s.By appropriate design of interpolant according to the position of input RF signals,multi-band receiving can be realized in the platform with suppression more than 35 d B without changing hardware.展开更多
Software Defined Radio (SDR) architecture allows us to integrate different mobile technologies using common hardware but with different software modules. To achieve this, we need to keep the signal in digital form for...Software Defined Radio (SDR) architecture allows us to integrate different mobile technologies using common hardware but with different software modules. To achieve this, we need to keep the signal in digital form for as much portion of the circuitry as possible, so that the implementation could be carried out by programmable digital processors. For this purpose, the incoming radio frequency (RF) signal is down converted to baseband spectrum using band pass sampling method. Research works carried out so far in this field have developed a few algorithms for band pass sampling. But, these algorithms are not much useful for most of the mobile communication systems and they use complex methodology for computing the sampling frequency values. In order to use the SDR platform to integrate all current wireless technologies, an efficient, cost effective and less complex algorithm that can be labelled as universal band pass sampling algorithm is developed in this paper for multiple mobile systems. This algorithm is based on a novel idea of inserting guard bands between the signals which reduces the design complexities of perfect ADC and sharp cut off filters. Using this algorithm, valid sampling frequency ranges and corresponding IF values are calculated for down converting RF signals. The algorithm is tested for six RF signals of different wireless technologies which are integrated and simultaneously down converted using SDR based front end receiver and thus the system multiplies the base station capacity by a factor of six. The simulation results are obtained and shown in this paper which proves that the algorithm developed works well for most of the wireless technologies.展开更多
Wireless local area network(WLAN) is an indivisible part of the next generation wireless system. In this paper, an open Wi-Fi platform is designed and developed with special consideration of real-time signal processin...Wireless local area network(WLAN) is an indivisible part of the next generation wireless system. In this paper, an open Wi-Fi platform is designed and developed with special consideration of real-time signal processing. Such system can help accelerate research and development of future wireless network, especially in the case of cellular/Wi-Fi co-existing networks. This platform is based on the Intel general-purpose processor and the universal software radio peripheral(USRP) radio front end. The design including the physical layer implementations is purely software and is optimized for real-time signal processing on the general purpose processor. In the lab experiment, this platform supports baseband rate up to 700 Mbps with 2 transmitters in 80 MHz bandwidth. A cellular-Wi-Fi signaling interface between the Wi-Fi access point(AP) and the 5G core network is also developed and validated as an example for wireless resource allocation.展开更多
This paper reviews the requirements for Software Defi ned Radio (SDR) systems for high-speed wireless applications and compares how well the different technology choices available-from ASICs, FPGAs to digital signal p...This paper reviews the requirements for Software Defi ned Radio (SDR) systems for high-speed wireless applications and compares how well the different technology choices available-from ASICs, FPGAs to digital signal processors (DSPs) and general purpose processors (GPPs) - meet them.展开更多
The fifth generation (5G) New Radio (NR) has been developed to provide significant improvements in scalability, flexibility, and efficiency in terms of power usage and spectrum as well. To meet the 5G vision, service ...The fifth generation (5G) New Radio (NR) has been developed to provide significant improvements in scalability, flexibility, and efficiency in terms of power usage and spectrum as well. To meet the 5G vision, service and performance requirements, various candidate technologies have been proposed in 5G new radio;some are extensions of 4G and, some are developed explicitly for 5G. These candidate technologies include non-Orthogonal Multiple Access (NOMA), and Low Density Parity Check (LDPC) channel coding. In addition, deploying software defined radio (SDR) instead of traditional hardware modules. In this paper we build an open source SDR-based platform to realize the transceiver of the physical downlink shared channel (PDSCH) of 5G NR according to Third Generation Partnership Project (3GPP) standard. We provide a prototype for pairing between two 5G users using NOMA technique. In addition, a suitable design for LDPC channel coding is performed. The intermediate stage of segmentation, rate matching and interleaving are also carried out in order to realize a standard NR frame. Finally, experiments are carried out in both simulation and real time scenario on the designed 5G NR for the purpose of system performance evaluation, and to demonstrate its potential in meeting future 5G mobile network challenges.展开更多
General purpose processer （GPP） based software-defined radio （SDR） platforms provide wireless communication system engineers with maximal architecture flexibility and versatility to construct a wideband wireless c...General purpose processer （GPP） based software-defined radio （SDR） platforms provide wireless communication system engineers with maximal architecture flexibility and versatility to construct a wideband wireless communication system. Nevertheless, the lack of hardware real-time timing control makes it difficult to achieve time synchronization between the base station and the terminals. In this paper, a software-based time synchronization （STS） method is proposed to realize the time synchronization of time division multiple access （TDMA） based wireless communication systems. A high precision software clock source is firstly constructed to measure the elapse of processing time. The Round-Trip Delay （RTD） algorithm is then presented to calculate timing advance values and achieve time synchronization. An example TDMA system is implemented on Microsoft Sora platforms to evaluate is effective to enable time synchronization for wideband the performance. Experiments show that the proposed mechanism wireless communication systems on GPP-based SDR platforms.展开更多
This paper proposes a new low power structure to improve the trade-off between the bandwidth and the power consumption of a programmable gain amplifier（PGA）.The PGA consists of three-stage amplifiers, which includes...This paper proposes a new low power structure to improve the trade-off between the bandwidth and the power consumption of a programmable gain amplifier（PGA）.The PGA consists of three-stage amplifiers, which includes a variable gain amplifier and DC offset cancellation circuits.The cutoff frequency of the DC offset cancellation circuits can be changed from 4 to 80 kHz.The chip was fabricated in 0.13μm CMOS technology. Measurement results showed that the gain of the PGA can be programmed from -5 to 60 dB.At the gain setting of 60 dB,the bandwidth can be tuned from 1 to 10 MHz,while the power consumption can be programmed from 850μA to 3.2 mA at a supply voltage of 1.2 V.Its in-band OIP3 result is at 14 dBm.展开更多
This paper presents a 4th-order reconfigurable analog baseband filter for software-defined radios.The design exploits an active-RC low pass filter（LPF） structure with digital assistant,which is flexible for tunabili...This paper presents a 4th-order reconfigurable analog baseband filter for software-defined radios.The design exploits an active-RC low pass filter（LPF） structure with digital assistant,which is flexible for tunability of filter characteristics,such as cut-off frequency,selectivity,type,noise,gain and power.A novel reconfigurable operational amplifier is proposed to realize the optimization of noise and scalability of power dissipation.The chip was fabricated in an SMIC 0.13μm CMOS process.The main filter and frequency calibration circuit occupy 1.8×0.8 mm;and 0.48×0.25 mm;areas,respectively.The measurement results indicate that the filter provides Butterworth and Chebyshev responses with a wide frequency tuning range from 280 kHz to 15 MHz and a gain range from 0 to 18 dB.An IIP3 of 29 dBm is achieved under a 1.2 V power supply.The input inferred noise density varies from 41 to 133 nV/（Hz）;according to a given standard,and the power consumptions are 5.46 mW for low band（from 280 kHz to 3 MHz） and 8.74 mW for high band（from 3 to 15 MHz） mode.展开更多
基金Project(2013QNA49)supported by the Fundamental Research Funds for the Central Universities,China
文摘In radio receivers,complete implementation of the software defined radio(SDR) concept is mainly limited by frontend.Based on bandpass sampling(BPS) theory,a flexible digital frontend(DFE) platform for SDR receiver is designed.In order to increase the processing speed,Gigabit Ethernet was applied in the platform at speed of 5×10~8 bit/s.By appropriate design of interpolant according to the position of input RF signals,multi-band receiving can be realized in the platform with suppression more than 35 d B without changing hardware.
文摘Software Defined Radio (SDR) architecture allows us to integrate different mobile technologies using common hardware but with different software modules. To achieve this, we need to keep the signal in digital form for as much portion of the circuitry as possible, so that the implementation could be carried out by programmable digital processors. For this purpose, the incoming radio frequency (RF) signal is down converted to baseband spectrum using band pass sampling method. Research works carried out so far in this field have developed a few algorithms for band pass sampling. But, these algorithms are not much useful for most of the mobile communication systems and they use complex methodology for computing the sampling frequency values. In order to use the SDR platform to integrate all current wireless technologies, an efficient, cost effective and less complex algorithm that can be labelled as universal band pass sampling algorithm is developed in this paper for multiple mobile systems. This algorithm is based on a novel idea of inserting guard bands between the signals which reduces the design complexities of perfect ADC and sharp cut off filters. Using this algorithm, valid sampling frequency ranges and corresponding IF values are calculated for down converting RF signals. The algorithm is tested for six RF signals of different wireless technologies which are integrated and simultaneously down converted using SDR based front end receiver and thus the system multiplies the base station capacity by a factor of six. The simulation results are obtained and shown in this paper which proves that the algorithm developed works well for most of the wireless technologies.
基金Acknowledgements This work was supported in part by the U.S. National Science Foundation （NSF） under grants CNS-1405670 and CN5-1658972. However, any opinions, findings, and conclusions or recommendations expressed in this material are those of the author and do not necessarily reflect the views of the NSE
基金supported in part by the National Natural Science Foundation of China under Grant No. 61671436the Science and Technology Commission Foundation of Shanghai under Grant No. 15511102602, 16511104204
文摘Wireless local area network(WLAN) is an indivisible part of the next generation wireless system. In this paper, an open Wi-Fi platform is designed and developed with special consideration of real-time signal processing. Such system can help accelerate research and development of future wireless network, especially in the case of cellular/Wi-Fi co-existing networks. This platform is based on the Intel general-purpose processor and the universal software radio peripheral(USRP) radio front end. The design including the physical layer implementations is purely software and is optimized for real-time signal processing on the general purpose processor. In the lab experiment, this platform supports baseband rate up to 700 Mbps with 2 transmitters in 80 MHz bandwidth. A cellular-Wi-Fi signaling interface between the Wi-Fi access point(AP) and the 5G core network is also developed and validated as an example for wireless resource allocation.
文摘This paper reviews the requirements for Software Defi ned Radio (SDR) systems for high-speed wireless applications and compares how well the different technology choices available-from ASICs, FPGAs to digital signal processors (DSPs) and general purpose processors (GPPs) - meet them.
文摘The fifth generation (5G) New Radio (NR) has been developed to provide significant improvements in scalability, flexibility, and efficiency in terms of power usage and spectrum as well. To meet the 5G vision, service and performance requirements, various candidate technologies have been proposed in 5G new radio;some are extensions of 4G and, some are developed explicitly for 5G. These candidate technologies include non-Orthogonal Multiple Access (NOMA), and Low Density Parity Check (LDPC) channel coding. In addition, deploying software defined radio (SDR) instead of traditional hardware modules. In this paper we build an open source SDR-based platform to realize the transceiver of the physical downlink shared channel (PDSCH) of 5G NR according to Third Generation Partnership Project (3GPP) standard. We provide a prototype for pairing between two 5G users using NOMA technique. In addition, a suitable design for LDPC channel coding is performed. The intermediate stage of segmentation, rate matching and interleaving are also carried out in order to realize a standard NR frame. Finally, experiments are carried out in both simulation and real time scenario on the designed 5G NR for the purpose of system performance evaluation, and to demonstrate its potential in meeting future 5G mobile network challenges.
基金Supported by the Major Project of Beijing Municipal Natural Science Foundation of China under Grant No. 4110001
文摘General purpose processer （GPP） based software-defined radio （SDR） platforms provide wireless communication system engineers with maximal architecture flexibility and versatility to construct a wideband wireless communication system. Nevertheless, the lack of hardware real-time timing control makes it difficult to achieve time synchronization between the base station and the terminals. In this paper, a software-based time synchronization （STS） method is proposed to realize the time synchronization of time division multiple access （TDMA） based wireless communication systems. A high precision software clock source is firstly constructed to measure the elapse of processing time. The Round-Trip Delay （RTD） algorithm is then presented to calculate timing advance values and achieve time synchronization. An example TDMA system is implemented on Microsoft Sora platforms to evaluate is effective to enable time synchronization for wideband the performance. Experiments show that the proposed mechanism wireless communication systems on GPP-based SDR platforms.
基金Project supported by the National High-Tech Research and Development Program of China(No.2009AA011606)the National Natural Science Foundation of China(No.60976023)
文摘This paper proposes a new low power structure to improve the trade-off between the bandwidth and the power consumption of a programmable gain amplifier（PGA）.The PGA consists of three-stage amplifiers, which includes a variable gain amplifier and DC offset cancellation circuits.The cutoff frequency of the DC offset cancellation circuits can be changed from 4 to 80 kHz.The chip was fabricated in 0.13μm CMOS technology. Measurement results showed that the gain of the PGA can be programmed from -5 to 60 dB.At the gain setting of 60 dB,the bandwidth can be tuned from 1 to 10 MHz,while the power consumption can be programmed from 850μA to 3.2 mA at a supply voltage of 1.2 V.Its in-band OIP3 result is at 14 dBm.
基金Project supported by the Important National Science and Technology Specific Projects of China(No2009ZX01031-003-002)the National High Technology Research and Development Program of China(No2009AA011605)the National Natural Science Foundation of China(No61076028)
文摘This paper presents a 4th-order reconfigurable analog baseband filter for software-defined radios.The design exploits an active-RC low pass filter（LPF） structure with digital assistant,which is flexible for tunability of filter characteristics,such as cut-off frequency,selectivity,type,noise,gain and power.A novel reconfigurable operational amplifier is proposed to realize the optimization of noise and scalability of power dissipation.The chip was fabricated in an SMIC 0.13μm CMOS process.The main filter and frequency calibration circuit occupy 1.8×0.8 mm;and 0.48×0.25 mm;areas,respectively.The measurement results indicate that the filter provides Butterworth and Chebyshev responses with a wide frequency tuning range from 280 kHz to 15 MHz and a gain range from 0 to 18 dB.An IIP3 of 29 dBm is achieved under a 1.2 V power supply.The input inferred noise density varies from 41 to 133 nV/（Hz）;according to a given standard,and the power consumptions are 5.46 mW for low band（from 280 kHz to 3 MHz） and 8.74 mW for high band（from 3 to 15 MHz） mode.
