Hardware/software co-verification platform for EOS design

Ethernet over SDH/SONET (EOS) is a hotspot in today's data transmission technology for it combines the merits of both Ethernet and SDH/SONET. However, implementing an EOS system on a chip is complex and needs full verifications. This paper introduces our design of Hardware/Software co-verification platform for EOS design. The hardware platform contains a microprocessor board and an FPGA (Field Programmable Gate Array)-based verification board, and the corresponding software includes test benches running in FPGAs, controlling programs for the microprocessor and a console program with GUI (Graphical User Interface) interface for configuration, management and supervision. The design is cost-effective and has been successfully employed to verify several IP (Intellectual Property) blocks of our EOS chip. Moreover, it is flexible and can be applied as a general-purpose verification platform.

Scheduling Algorithm Based on Storage Capacity of Communication in Hardware/Software Integrated System

In this paper, the storage capacity of communication among cores and processors is taken into account and a maximum D-value-first algorithm is proposed. By improving the hardware parallelism in the task execution process, the maximum storage requirements for communication are minimized. Experimental results with various directed acyclic graph models showed that compared with the earliest-task-first algorithm, the storage requirements for communication were reduced by 22.46%, on average, while the average of makespan only increased by 0.82%,.

Hardware/software partitioning based on dynamic combination of maximum entropy and chaos optimization algorithm

This paper presents an algorithm that combines the chaos optimization algorithm with the maximum entropy ( COA-ME) by using entropy model based on chaos algorithm,in which the maximum entropy is used as the second method of searching the excellent solution. The search direction is improved by chaos optimization algorithm and realizes the selective acceptance of wrong solution. The experimental result shows that the presented algorithm can be used in the partitioning of hardware/software of reconfigurable system. It effectively reduces the local extremum problem,and search speed as well as performance of partitioning is improved.

A hardware/software co-optimization approach for embedded software of MP3 decoder

In order to improve the efficiency of embedded software running on processor core, this paper proposes a hard-ware/software co-optimization approach for embedded software from the system point of view. The proposed stepwise methods aim at exploiting the structure and the resources of the processor as much as possible for software algorithm optimization. To achieve low memory usage and low frequency need for the same performance, this co-optimization approach was used to optimize embedded software of MP3 decoder based on a 16-bit fixed-point DSP core. After the optimization, the results of decoding 128 kbps, 44.1 kHz stereo MP3 on DSP evaluation platform need 45.9 MIPS and 20.4 kbytes memory space. The optimization rate achieves 65.6% for memory and 49.6% for frequency respectively compared with the results by compiler using floating-point computation. The experimental result indicates the availability of the hardware/software co-optimization approach depending on the algorithm and architecture.

New Approach for Hardware/Software Embedded System Conception Based on the Use of Design Patterns

This paper deals with a new hardware/software embedded system design methodology based on design pattern approach by development of a new design tool called smartcell. Three main constraints of embedded systems design process are investigated: the complexity, the partitioning between hardware and software aspects and the reusability. Two intermediate models are carried out in order to solve the complexity problem. The partitioning problem deals with the proposed hardware/software partitioning algorithm based on Ant Colony Optimisation. The reusability problem is resolved by synthesis of intellectual property blocks. Specification and integration of an intelligent controller on heterogeneous platform are considered to illustrate the proposed approach.

TikTak: A Scalable Simulator of Wireless Sensor Networks Including Hardware/Software Interaction

We present a simulation framework for wireless sensor networks developed to allow the design exploration and the complete microprocessor-instruction-level debug of network formation, data congestion, nodes interaction, all in one simulation environment. A specifically innovative feature is the co-emulation of selected nodes at clock-cycle-accurate hardware processing level, allowing code debug and exact execution latency evaluation (considering both protocol stack and application), together with other nodes at abstract protocol level, meeting a designer’s needs of simulation speed, scalability and reliability. The simulator is centered on the Zigbee protocol and can be retargeted for different node micro-architectures.

SHEsis,a powerful software platform for analyses of linkage disequi-librium,haplotype construction,and genetic association at polymor-phism loci

The authors want to changed the web link of the software platform in this Briefing.Page 97,section 'INTRODUCTION',the web link of SHEsis is changed from http://www.nhgg.org/analysis tohttp://analysis.bio-x.

A Hardware Platform Framework for an Intelligent Vehicle Based on a Driving Brain

The type, model, quantity, and location of sensors installed on the intelligent vehicle test platform are different, resulting in different sensor information processing modules, The driving map used in intelligent vehicle test platform has no uniform standard, which leads to different granularity of driving map information, The sensor information processing module is directly associated with the driving map information and decision-making module, which leads to the interface of intelligent driving system software module has no uniform standard, Based on the software and hardware architecture of intelligent vehicle, the sensor information and driving map information are processed by using the formal language of driving cognition to form a driving situation graph cluster and output to a decision-making module, and the out- put result of the decision-making module is shown as a cognitive arrow cluster, so that the whole process of intelligent driving from perception to decision-making is completed, The formalization of driving cognition reduces the influence of sensor type, model, quantity, and location on the whole software architec- ture, which makes the software architecture portable on different intelligent driving hardware platforms.

SPACECRAFT DOCKING SIMULATION USING HARDWARE-IN-THE-LOOP SIMULATOR WITH STEWART PLATFORM

A ground-based hardware-in-the-loop （HIL） simulation system with hydraulically driven Stewart platform for spacecraft docking simulation is presented. The system is used for simulating docking process of the on-orbit spacecraft. Principle and structure of the six-degree-of-freedom simulation system are introduced. The docking process dynamic of the vehicles is modeled. Experiment results and mathematical simulation data are compared to validating the simulation system. The comparisons of the results prove that the simulation system proposed can effectively simulate the on-orbit docking process of the spacecraft.

FPGA based hardware platform for trapped-ion-based multi-level quantum systems

We report a design and implementation of a field-programmable-gate-arrays(FPGA)based hardware platform,which is used to realize control and signal readout of trapped-ion-based multi-level quantum systems.This platform integrates a four-channel 2.8 Gsps@14 bits arbitrary waveform generator,a 16-channel 1 Gsps@14 bits direct-digital-synthesisbased radio-frequency generator,a 16-channel 8 ns resolution pulse generator,a 10-channel 16 bits digital-to-analogconverter module,and a 2-channel proportion integration differentiation controller.The hardware platform can be applied in the trapped-ion-based multi-level quantum systems,enabling quantum control of multi-level quantum system and highdimensional quantum simulation.The platform is scalable and more channels for control and signal readout can be implemented by utilizing more parallel duplications of the hardware.The hardware platform also has a bright future to be applied in scaled trapped-ion-based quantum systems.

DPOI: Distributed Software System Development Platform for Ocean Information Service

Ocean information management is of great importance as it has been employed in many areas of ocean science and technology. However, the developments of Ocean Information Systems(OISs) often suffer from low efficiency because of repetitive work and continuous modifications caused by dynamic requirements. In this paper, the basic requirements of OISs are analyzed first, and then a novel platform DPOI is proposed to improve development efficiency and enhance software quality of OISs by providing off-the-shelf resources. In the platform, the OIS is decomposed hierarchically into a set of modules, which can be reused in different system developments. These modules include the acquisition middleware and data loader that collect data from instruments and files respectively, the database that stores data consistently, the components that support fast application generation, the web services that make the data from distributed sources syntactical by use of predefined schemas and the configuration toolkit that enables software customization. With the assistance of the development platform, the software development needs no programming and the development procedure is thus accelerated greatly. We have applied the development platform in practical developments and evaluated its efficiency in several development practices and different development approaches. The results show that DPOI significantly improves development efficiency and software quality.

Study of Software Radio Receiver Development Platform

The Paper introduces an IF software radio receiver development Platform based on high-speed monolithic A/D Converter AD6640, Progranunable Digital Down-converter AD6620 and high-speed DSP chip TMSC320C6701. The implementation method is described as well as AD6620 parameter setting analysis. It also presents a flow chart of the on-line programming with the help of PC. The algorithm for demodulation AM signal is discussed.

Telecom-Oriented Embedded Software Support Platform

This paper presents an embedded software platform used in the telecom field.The platform consists of the Virtual Operating System (VOS)layer,core layer, protection layer and module layer.It supports and simplifies upper application software of telecom systems.In addition to basic modules and functions, its instance scheduling model and distributed process communication are detailed in the paper.

Analysis and Design of Quality Management Platform for the Entire Process of Characteristic Software Talent Training

At the end of 2021 to create a new model of characteristic software talent training for independent and controllable key software fields,the Ministry of Education and the Ministry of Industry and Information Technology jointly approved the establishment of the first batch of 33 Characteristic Pilot Schools of software.As a member of characteristic software schools,the HIT School of Software has been approved and will focus on the construction of 2 characteristic directions,which are large-scale industrial software and industrial professional application software.In order to achieve the goal,it is urgent to develop a comprehensive management platform to control the entire process of talent training,so that we can standardize,modelling,and digitized the entire process of characteristic software talent training.By relating all aspects of student training with and implementing the ability-index mechanisms,we will continuously collect big-data of the entire process of student growth,and generate multidimensional student ability portraits for evaluating the effect of talent training,and adjust as well as optimizing the growth path for students themselves during their studying.Employers will be able to identify talents accurately and provide effective reference for colleges to adjust training plans.This paper will analyze the needs of the platform,provide demand analysis of the platform,extract the correlation model between training,conclude the relations between ability-index activities and ability indicators,and give a reasonable overall system design scheme.

Research on the Computer Software Testing Method Based on Multiple Platforms

Informationization plays an important role in modern life and production.And various software is one of the bases for it.Before it goes into service,software needs to go through many steps,including software development,design,etc.In software development,test is the key to identify and control bugs and errors in the software.Therefore,software companies often test the software to ensure that it is qualified.In recent years,more attention has been paid to a multi-platform computer software testing method,which can make up for defects in traditional testing methods to improve test accuracy.Firstly,this paper illustrates the connotation and features of software testing.Secondly,common software testing platforms and their requirements are analyzed.Finally,this paper proposes software testing method based on multiple platforms.

Research on Software Radio Fuze

The functions and characteristics of software radio are discussed. Using techniques and method of software radio, the concept and advantages of a new kind of radio fuze, software radio fuze, are analysed. Several kinds of hardware platform structures of the software radio fuze are studied and the key techniques are analysed. The software radio fuze will become the most promising radio fuze techniques in 21st century.

Domain-Oriented Software Defined Computing Architecture

With the introduction of software defined hardware by DARPA Electronics Resurgence Initiative,software definition will be the basic attribute of information system.Benefiting from boundary certainty and algorithm aggregation of domain applications,domain-oriented computing architecture has become the technical direction that considers the high flexibility and efficiency of information system.Aiming at the characteristics of data-intensive computing in different scenarios such as Internet of Things(IoT),big data,artificial intelligence(AI),this paper presents a domain-oriented software defined computing architecture,discusses the hierarchical interconnection structure,hybrid granularity computing element and its computational kernel extraction method,finally proves the flexibility and high efficiency of this architecture by experimental comparison.

Hardware Implementation of STM32 Microcontroller-Based Indoor Environment Monitoring System

Microcontroller is widely used in the intelligent life of modern society. Intelligent development based on Microcontroller to solve the actual needs of people’s life, work, study and other fields is the core of Microcontroller application. Therefore, it is a task for researchers to understand the structure and performance of microcontroller, develop software, and be familiar with the method and process of intelligent development based on microcontroller. And with that in mind, this paper designs and produces a physical hardware system for indoor environment detection based on STM32 microcontroller. The system can detect the light intensity, temperature and humidity, and CO gas concentration in the indoor environment;and the data is integrated and processed by the STM32 microcontroller to display the current parameter values of each quantity in the indoor environment on a 3.5-inch resistive screen;at the same time, the PC can also log in to the OneNET cloud platform through the web page, and display the light intensity, temperature and humidity, and CO gas concentration values in the indoor environment in real time in the device created by OneNET for real-time viewing. The system can also display the light intensity, temperature and humidity, and CO gas concentration values in the indoor environment in real time. The hardware system has been tested and tested to achieve its function.

The Software Industry Promotes All-round Cooperation

Software can be seen almost everywhere and is now defining the world.Software has transitioned from an affiliate of hardware,to a network service that is present in every corner of our social lives.

System-on-a-Chip (SoC) Based Hardware Acceleration for Video Codec

Nowadays, from home monitoring to large airport security, a lot of digital video surveillance systems have been used. Digital surveillance system usually requires streaming video processing abilities. As an advanced video coding method, H.264 is introduced to reduce the large video data dramatically (usually by 70X or more). However, computational overhead occurs when coding and decoding H.264 video. In this paper, a System-on-a-Chip (SoC) based hardware acceleration solution for video codec is proposed, which can also be used for other software applications. The characteristics of the video codec are analyzed by using the profiling tool. The Hadamard function, which is the bottleneck of H.264, is identified not only by execution time but also another two attributes, such as cycle per loop and loop round. The Co-processor approach is applied to accelerate the Hadamard function by transforming it to hardware. Performance improvement, resource costs and energy consumption are compared and analyzed. Experimental results indicate that 76.5% energy deduction and 8.09X speedup can be reached after balancing these three key factors.