深空测控通信中需在大带宽内对多个目标信号同时进行无误码解调,且极端应用场景中大信号与极微弱信号同时存在。要实现多目标强弱信号全频谱同时采集,要求模拟数字转换器(Analog to Digital Converter,ADC)的无杂散动态范围(Spurious Fr...深空测控通信中需在大带宽内对多个目标信号同时进行无误码解调,且极端应用场景中大信号与极微弱信号同时存在。要实现多目标强弱信号全频谱同时采集,要求模拟数字转换器(Analog to Digital Converter,ADC)的无杂散动态范围(Spurious Free Dynamic Range,SFDR)性能尽可能的高。提升SFDR性能需要从系统各个层面进行优化设计,采取关键技术手段,才可达到预期的结果。该文分析了影响ADC的SFDR性能各个因素,并采取频谱规划设计、功率规划设计、电源优化设计、时钟电路优化设计、差分驱动电路优化等综合设计手段,从而实现最佳采样。展开更多
This paper proposes a method to improve the spu-rious-free dynamic ranges(SFDRs)of 1-bit sampled signals greatly,which is very beneficial to multi-tone signals detection.Firstly,the relationship between the fundamenta...This paper proposes a method to improve the spu-rious-free dynamic ranges(SFDRs)of 1-bit sampled signals greatly,which is very beneficial to multi-tone signals detection.Firstly,the relationship between the fundamental component and the third harmonic component of 1-bit sampled signals is analyzed for determining four contiguous special frequency bands,which do not contain any third harmonics inside and co-ver 77.8%of the whole Nyquist sampling frequency band.Then,we present a special 4-channel monobit receiver model,where appropriate filter banks are used to obtain four desired pass bands before 1-bit quantization and each channel can sample and process sampled data independently to achieve a good in-stantaneous dynamic range without sacrificing the real-time per-formance or computing resources.The simulation results show that the proposed method effectively eliminates the effect of the most harmonics on SFDRs and the mean SFDR is increased to to 20 dB.Besides,the multi-signals simulation results indicate that the maximum amplitude separation(dynamic range)of two signals in each channel is 12 dB while the proposed monobit re-ceiver can deal with up to eight simultaneous arrival signals.In general,the designing method proposed in this paper has a po-tential engineering value.展开更多
针对目前常用的基于参数化非线性模型(Parameterized Nonlinear Model,PNM)的补偿算法存在易陷入局部最小值,导致补偿性能不稳的问题,该文提出了基于最小二乘支持向量机(Least Squares Support Vector Machine,LS-SVM)的宽带接收前端非...针对目前常用的基于参数化非线性模型(Parameterized Nonlinear Model,PNM)的补偿算法存在易陷入局部最小值,导致补偿性能不稳的问题,该文提出了基于最小二乘支持向量机(Least Squares Support Vector Machine,LS-SVM)的宽带接收前端非线性补偿算法.该算法基于减谱-时频变换法(Spectrum Reduction Algorithm based on Time-Frequency Conversion,SRA-TFC)盲分离接收前端输出信号中的大功率基波信号和其他小功率信号,并以此作为LS-SVM逆模型的训练输入-输出样本对.引入最小二乘支持向量回归(Least Squares Support Vector Regression,LS-SVR)算法高精度拟合接收前端非线性逆模型.通过以宽带接收前端的输出信号为测试样本消除其非线性失真分量.仿真与实测结果表明:该算法可使宽带接收前端的无杂散失真动态范围(Spurs-Free-Dynamic-Range,SFDR)提高约20 dB,较基于PNM的补偿算法提高了约5 dB.展开更多
从理论上分析了时钟抖动(clock jitter)对模数变换器(analog to digital con verter,ADC)的信噪比和无伪波动态范围(spurious free dynamic range,SFDR)等指标的影响.使用Labview在计算机上建立ADC仿真系统,并用 Analog Devices公司的AD...从理论上分析了时钟抖动(clock jitter)对模数变换器(analog to digital con verter,ADC)的信噪比和无伪波动态范围(spurious free dynamic range,SFDR)等指标的影响.使用Labview在计算机上建立ADC仿真系统,并用 Analog Devices公司的AD6644设计了两套电路,对采样时钟抖动不同的 AD6644 的变换性能进行实际测量,分析了实测结果,还进行了对比仿真实验,并和理论分析互相验证.结果显示时钟抖动严重影响ADC的 SNR, 采样频率越高,影响越大,但会改善 SFDR.理论分析、仿真和实际测量的结果为高速、高精度 ADC电路的设计和芯片选型提供了很好的参考.展开更多
分析了目前分段电流舵数模转换器（DAC）在动态性能提升和芯片面积缩小等方面的局限性。提出了动态元件匹配（DEM）译码技术。设计了16 bit DAC中的DEM译码电路结构,分析了DEM译码技术的原理。对该16 bit DAC的动态性能等进行了详细仿真...分析了目前分段电流舵数模转换器（DAC）在动态性能提升和芯片面积缩小等方面的局限性。提出了动态元件匹配（DEM）译码技术。设计了16 bit DAC中的DEM译码电路结构,分析了DEM译码技术的原理。对该16 bit DAC的动态性能等进行了详细仿真,并完成了整体版图设计。该DAC核心部分芯片面积仅为2. 2 mm^2。采用0. 18μm CMOS工艺完成了该DAC的加工和性能参数测试。在1 GHz采样率和100 MHz输入信号频率条件下,该DAC的无杂散动态范围约为67 dB,三阶互调失真约为76 dB,整体性能优于目前同类研究成果。展开更多
文摘深空测控通信中需在大带宽内对多个目标信号同时进行无误码解调,且极端应用场景中大信号与极微弱信号同时存在。要实现多目标强弱信号全频谱同时采集,要求模拟数字转换器(Analog to Digital Converter,ADC)的无杂散动态范围(Spurious Free Dynamic Range,SFDR)性能尽可能的高。提升SFDR性能需要从系统各个层面进行优化设计,采取关键技术手段,才可达到预期的结果。该文分析了影响ADC的SFDR性能各个因素,并采取频谱规划设计、功率规划设计、电源优化设计、时钟电路优化设计、差分驱动电路优化等综合设计手段,从而实现最佳采样。
文摘This paper proposes a method to improve the spu-rious-free dynamic ranges(SFDRs)of 1-bit sampled signals greatly,which is very beneficial to multi-tone signals detection.Firstly,the relationship between the fundamental component and the third harmonic component of 1-bit sampled signals is analyzed for determining four contiguous special frequency bands,which do not contain any third harmonics inside and co-ver 77.8%of the whole Nyquist sampling frequency band.Then,we present a special 4-channel monobit receiver model,where appropriate filter banks are used to obtain four desired pass bands before 1-bit quantization and each channel can sample and process sampled data independently to achieve a good in-stantaneous dynamic range without sacrificing the real-time per-formance or computing resources.The simulation results show that the proposed method effectively eliminates the effect of the most harmonics on SFDRs and the mean SFDR is increased to to 20 dB.Besides,the multi-signals simulation results indicate that the maximum amplitude separation(dynamic range)of two signals in each channel is 12 dB while the proposed monobit re-ceiver can deal with up to eight simultaneous arrival signals.In general,the designing method proposed in this paper has a po-tential engineering value.
文摘针对目前常用的基于参数化非线性模型(Parameterized Nonlinear Model,PNM)的补偿算法存在易陷入局部最小值,导致补偿性能不稳的问题,该文提出了基于最小二乘支持向量机(Least Squares Support Vector Machine,LS-SVM)的宽带接收前端非线性补偿算法.该算法基于减谱-时频变换法(Spectrum Reduction Algorithm based on Time-Frequency Conversion,SRA-TFC)盲分离接收前端输出信号中的大功率基波信号和其他小功率信号,并以此作为LS-SVM逆模型的训练输入-输出样本对.引入最小二乘支持向量回归(Least Squares Support Vector Regression,LS-SVR)算法高精度拟合接收前端非线性逆模型.通过以宽带接收前端的输出信号为测试样本消除其非线性失真分量.仿真与实测结果表明:该算法可使宽带接收前端的无杂散失真动态范围(Spurs-Free-Dynamic-Range,SFDR)提高约20 dB,较基于PNM的补偿算法提高了约5 dB.
文摘从理论上分析了时钟抖动(clock jitter)对模数变换器(analog to digital con verter,ADC)的信噪比和无伪波动态范围(spurious free dynamic range,SFDR)等指标的影响.使用Labview在计算机上建立ADC仿真系统,并用 Analog Devices公司的AD6644设计了两套电路,对采样时钟抖动不同的 AD6644 的变换性能进行实际测量,分析了实测结果,还进行了对比仿真实验,并和理论分析互相验证.结果显示时钟抖动严重影响ADC的 SNR, 采样频率越高,影响越大,但会改善 SFDR.理论分析、仿真和实际测量的结果为高速、高精度 ADC电路的设计和芯片选型提供了很好的参考.
