A new SOI (Silicon On Insulator) high voltage device with Step Unmovable Surface Charges (SUSC) of buried oxide layer and its analytical breakdown model are proposed in the paper. The unmovable charges are implemented...A new SOI (Silicon On Insulator) high voltage device with Step Unmovable Surface Charges (SUSC) of buried oxide layer and its analytical breakdown model are proposed in the paper. The unmovable charges are implemented into the upper surface of buried oxide layer to increase the vertical electric field and uniform the lateral one. The 2-D Poisson's equation is solved to demonstrate the modulation effect of the immobile interface charges and analyze the electric field and breakdown voltage with the various geometric parameters and step numbers. A new RESURF (REduce SURface Field) condition of the SOI device considering the interface charges and buried oxide is derived to maximize breakdown voltage. The analytical results are in good agreement with the numerical analysis obtained by the 2-D semiconductor devices simulator MEDICI. As a result, an 1200V breakdown voltage is firstly obtained in 3μm-thick top Si layer, 2μm-thick buried oxide layer and 70μum-length drift region using a linear doping profile of unmovable buried oxide charges.展开更多
This paper presents a new silicon-on-insulator(SOI) lateral-double-diffused metal-oxide-semiconductor transistor(LDMOST) device with alternated high-k dielectric and step doped silicon pillars(HKSD device). Due to the...This paper presents a new silicon-on-insulator(SOI) lateral-double-diffused metal-oxide-semiconductor transistor(LDMOST) device with alternated high-k dielectric and step doped silicon pillars(HKSD device). Due to the modulation of step doping technology and high-k dielectric on the electric field and doped profile of each zone, the HKSD device shows a greater performance. The analytical models of the potential, electric field, optimal breakdown voltage, and optimal doped profile are derived. The analytical results and the simulated results are basically consistent, which confirms the proposed model suitable for the HKSD device. The potential and electric field modulation mechanism are investigated based on the simulation and analytical models. Furthermore, the influence of the parameters on the breakdown voltage(BV) and specific on-resistance(R_(on,sp)) are obtained. The results indicate that the HKSD device has a higher BV and lower R_(on,sp) compared to the SD device and HK device.展开更多
A silicon-on-insulator （SOI） high performance lateral double-diffusion metal oxide semiconductor （LDMOS） on a compound buried layer （CBL） with a step buried oxide （SBO CBL SOI） is proposed. The step buried oxi...A silicon-on-insulator （SOI） high performance lateral double-diffusion metal oxide semiconductor （LDMOS） on a compound buried layer （CBL） with a step buried oxide （SBO CBL SOI） is proposed. The step buried oxide locates holes in the top interface of the upper buried oxide （UBO） layer. Furthermore, holes with high density are collected in the interface between the polysilicon layer and the lower buried oxide （LBO） layer. Consequently, the electric fields in both the thin LBO and the thick UBO are enhanced by these holes, leading to an improved breakdown voltage. The breakdown voltage of the SBO CBL SOI LDMOS increases to 847 V from the 477 V of a conventional SOI with the same thicknesses of SOI layer and the buried oxide layer. Moreover, SBO CBL SOI can also reduce the self-heating effect.展开更多
准垂直GaN肖特基势垒二极管(SBD)因其低成本和高电流传输能力而备受关注.但其主要问题在于无法很好地估计器件的反向特性,从而影响二极管的设计.本文考虑了GaN材料的缺陷以及多种漏电机制,建立了复合漏电模型,对准垂直Ga N SBD的特性进...准垂直GaN肖特基势垒二极管(SBD)因其低成本和高电流传输能力而备受关注.但其主要问题在于无法很好地估计器件的反向特性,从而影响二极管的设计.本文考虑了GaN材料的缺陷以及多种漏电机制,建立了复合漏电模型,对准垂直Ga N SBD的特性进行了模拟,仿真结果与实验结果吻合.基于此所提模型设计出具有高击穿电压的阶梯型场板结构准垂直GaN SBD.根据漏电流、温度和电场在反向电压下的相关性,分析了漏电机制和器件耐压特性,设计的阶梯型场板结构准垂直GaN SBD的Baliga优值BFOM达到73.81 MW/cm^(2).展开更多
基于国际上Liang Y C提出的侧氧调制思想,提出了一种具有阶梯槽型氧化边VDMOS新结构.新结构通过阶梯侧氧调制了VDMOS高阻漂移区的电场分布,并增强了电荷补偿效应.在低于300V击穿电压条件下这种结构使VDMOS具有超低的比导通电阻.分析结...基于国际上Liang Y C提出的侧氧调制思想,提出了一种具有阶梯槽型氧化边VDMOS新结构.新结构通过阶梯侧氧调制了VDMOS高阻漂移区的电场分布,并增强了电荷补偿效应.在低于300V击穿电压条件下这种结构使VDMOS具有超低的比导通电阻.分析结果表明：较Liang Y C提出的一般槽型氧化边结构,器件击穿电压提高不小于20%的同时,比导通电阻降低40%-60%.展开更多
基金Supported by the National Natural Science Foundation of China (No.60276040).
文摘A new SOI (Silicon On Insulator) high voltage device with Step Unmovable Surface Charges (SUSC) of buried oxide layer and its analytical breakdown model are proposed in the paper. The unmovable charges are implemented into the upper surface of buried oxide layer to increase the vertical electric field and uniform the lateral one. The 2-D Poisson's equation is solved to demonstrate the modulation effect of the immobile interface charges and analyze the electric field and breakdown voltage with the various geometric parameters and step numbers. A new RESURF (REduce SURface Field) condition of the SOI device considering the interface charges and buried oxide is derived to maximize breakdown voltage. The analytical results are in good agreement with the numerical analysis obtained by the 2-D semiconductor devices simulator MEDICI. As a result, an 1200V breakdown voltage is firstly obtained in 3μm-thick top Si layer, 2μm-thick buried oxide layer and 70μum-length drift region using a linear doping profile of unmovable buried oxide charges.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61704084 and 61874059)。
文摘This paper presents a new silicon-on-insulator(SOI) lateral-double-diffused metal-oxide-semiconductor transistor(LDMOST) device with alternated high-k dielectric and step doped silicon pillars(HKSD device). Due to the modulation of step doping technology and high-k dielectric on the electric field and doped profile of each zone, the HKSD device shows a greater performance. The analytical models of the potential, electric field, optimal breakdown voltage, and optimal doped profile are derived. The analytical results and the simulated results are basically consistent, which confirms the proposed model suitable for the HKSD device. The potential and electric field modulation mechanism are investigated based on the simulation and analytical models. Furthermore, the influence of the parameters on the breakdown voltage(BV) and specific on-resistance(R_(on,sp)) are obtained. The results indicate that the HKSD device has a higher BV and lower R_(on,sp) compared to the SD device and HK device.
基金Project supported by the National Natural Science Foundation of China (Grant Nos.60806025 and 60976060)in part by the State Key Laboratory of Electronic Thin Films and Integrated Devices,China (Grant No.CXJJ201004)
文摘A silicon-on-insulator （SOI） high performance lateral double-diffusion metal oxide semiconductor （LDMOS） on a compound buried layer （CBL） with a step buried oxide （SBO CBL SOI） is proposed. The step buried oxide locates holes in the top interface of the upper buried oxide （UBO） layer. Furthermore, holes with high density are collected in the interface between the polysilicon layer and the lower buried oxide （LBO） layer. Consequently, the electric fields in both the thin LBO and the thick UBO are enhanced by these holes, leading to an improved breakdown voltage. The breakdown voltage of the SBO CBL SOI LDMOS increases to 847 V from the 477 V of a conventional SOI with the same thicknesses of SOI layer and the buried oxide layer. Moreover, SBO CBL SOI can also reduce the self-heating effect.
文摘基于国际上Liang Y C提出的侧氧调制思想,提出了一种具有阶梯槽型氧化边VDMOS新结构.新结构通过阶梯侧氧调制了VDMOS高阻漂移区的电场分布,并增强了电荷补偿效应.在低于300V击穿电压条件下这种结构使VDMOS具有超低的比导通电阻.分析结果表明：较Liang Y C提出的一般槽型氧化边结构,器件击穿电压提高不小于20%的同时,比导通电阻降低40%-60%.
