This paper presents the design and implementation of a Stepper Motor using Nexys2 circuit board based on a Xilinx Spartan 3E Field Programmable Gate Array (FPGA) device with VHDL code. The algorithm implemented on FPG...This paper presents the design and implementation of a Stepper Motor using Nexys2 circuit board based on a Xilinx Spartan 3E Field Programmable Gate Array (FPGA) device with VHDL code. The algorithm implemented on FPGA allows a substantial decrease of the equivalent processing time developed by different velocity controllers. The Stepper Speed control is achieved using VHDL code, and the hardware digital circuit is designed for a programmable rotational stepper motor using VHDL as a tool and FPGA as a target technology. The 50 MHZ provided by the starter kit is divided to obtain the necessary delay time between the motor phases that ranges between 2 - 10 m seconds. Though output selections, the direction of rotation of the stepper motor besides the magnitude of the angle of movement and the rotation speed can be controlled. The major advantage of using reconfigurable hardware (FPGA) in implementing the Stepper Motor instead of a discrete digital component is that it makes modifications to the design easy and quick and also, the total design hence represents an embedded system (works without computer). The total programmable hardware design that controlled on the stepper motor movement, occupied an area that did not exceed 12% of the chip resources.展开更多
为解决步进电动机加减速控制问题,给出了基于抛物线算法的FPGA实现方案,并在一片常用的可编程门阵列Cyclone I FPGA得到了具体验证。该方案综合运用FPGA可编程的逻辑功能,针对步进电动机控制特点,采样HDL硬件描述语言实现了SPI通讯模块...为解决步进电动机加减速控制问题,给出了基于抛物线算法的FPGA实现方案,并在一片常用的可编程门阵列Cyclone I FPGA得到了具体验证。该方案综合运用FPGA可编程的逻辑功能,针对步进电动机控制特点,采样HDL硬件描述语言实现了SPI通讯模块、计数模块、ROM模块等功能。整个控制系统精度高、调节快,运行效果表明,在加减速过程中加速度与速度的平稳性有了较大的改善,并且占用很少的逻辑单元。展开更多
文摘This paper presents the design and implementation of a Stepper Motor using Nexys2 circuit board based on a Xilinx Spartan 3E Field Programmable Gate Array (FPGA) device with VHDL code. The algorithm implemented on FPGA allows a substantial decrease of the equivalent processing time developed by different velocity controllers. The Stepper Speed control is achieved using VHDL code, and the hardware digital circuit is designed for a programmable rotational stepper motor using VHDL as a tool and FPGA as a target technology. The 50 MHZ provided by the starter kit is divided to obtain the necessary delay time between the motor phases that ranges between 2 - 10 m seconds. Though output selections, the direction of rotation of the stepper motor besides the magnitude of the angle of movement and the rotation speed can be controlled. The major advantage of using reconfigurable hardware (FPGA) in implementing the Stepper Motor instead of a discrete digital component is that it makes modifications to the design easy and quick and also, the total design hence represents an embedded system (works without computer). The total programmable hardware design that controlled on the stepper motor movement, occupied an area that did not exceed 12% of the chip resources.
文摘为解决步进电动机加减速控制问题,给出了基于抛物线算法的FPGA实现方案,并在一片常用的可编程门阵列Cyclone I FPGA得到了具体验证。该方案综合运用FPGA可编程的逻辑功能,针对步进电动机控制特点,采样HDL硬件描述语言实现了SPI通讯模块、计数模块、ROM模块等功能。整个控制系统精度高、调节快,运行效果表明,在加减速过程中加速度与速度的平稳性有了较大的改善,并且占用很少的逻辑单元。
