The dissipation phenomenon in the heavy-ion reaction at incident energy near the Fermi energy is studied by simulating the reaction ^129Xe＋^129Sn with the isospin-dependent quantum molecular dynamics model. The calcu...The dissipation phenomenon in the heavy-ion reaction at incident energy near the Fermi energy is studied by simulating the reaction ^129Xe＋^129Sn with the isospin-dependent quantum molecular dynamics model. The calculations involving a proper prescription of implementing the Pauli exclusion principle show that the isotropy ratio measured by free protons emitted in the reaction at energy slightly higher than the Fermi energy is in agreement with the experimental data recently released by the INDRA collaboration. A feasible value of the Pauli-blocking factor is estimated by comparing the theoretical results with the experimental data for the energy range considered here.展开更多
Digital low-density parity-check(LDPC) decoders can hardly meet the power-limits brought by the new application scenarios. The analog LDPC decoder, which is an application of the analog computation technology, is cons...Digital low-density parity-check(LDPC) decoders can hardly meet the power-limits brought by the new application scenarios. The analog LDPC decoder, which is an application of the analog computation technology, is considered to have the potential to address this issue to some extent. However, due to the lack of automation tools and analog stopping criteria, the analog LDPC decoders suffer from costly handcraft design and additional decoding delay, and are not feasible to practical applications. To address these issues, a decoder architecture using reusable building blocks is designed to lower the handcraft design, and a probability stopping criterion that is specially designed for analog decoder is further planned and implemented to reduce the decoding delay. Then, a(480,240) CMOS analog LDPC decoder is designed and fabricated in a 0.35-μm CMOS technology. Experimental results show that the decoder prototype can achieve 50 Mbps throughput when the power consumption is about 86.3m W, and the decoding delay can be reduced by at most 93% compared with using the preset maximum decoding delay in existing works.展开更多
基金Supported by the National Natural Science Foundation Of China under Grant Nos 11265013,11175074,11264033 and 11464040
文摘The dissipation phenomenon in the heavy-ion reaction at incident energy near the Fermi energy is studied by simulating the reaction ^129Xe＋^129Sn with the isospin-dependent quantum molecular dynamics model. The calculations involving a proper prescription of implementing the Pauli exclusion principle show that the isotropy ratio measured by free protons emitted in the reaction at energy slightly higher than the Fermi energy is in agreement with the experimental data recently released by the INDRA collaboration. A feasible value of the Pauli-blocking factor is estimated by comparing the theoretical results with the experimental data for the energy range considered here.
基金supported in part by the National Natural Science Foundation of China(No.61601027)the Opening Fund of the Space Objective Measure Key Laboratory(No.2016011)
文摘Digital low-density parity-check(LDPC) decoders can hardly meet the power-limits brought by the new application scenarios. The analog LDPC decoder, which is an application of the analog computation technology, is considered to have the potential to address this issue to some extent. However, due to the lack of automation tools and analog stopping criteria, the analog LDPC decoders suffer from costly handcraft design and additional decoding delay, and are not feasible to practical applications. To address these issues, a decoder architecture using reusable building blocks is designed to lower the handcraft design, and a probability stopping criterion that is specially designed for analog decoder is further planned and implemented to reduce the decoding delay. Then, a(480,240) CMOS analog LDPC decoder is designed and fabricated in a 0.35-μm CMOS technology. Experimental results show that the decoder prototype can achieve 50 Mbps throughput when the power consumption is about 86.3m W, and the decoding delay can be reduced by at most 93% compared with using the preset maximum decoding delay in existing works.
