The feature of conduction band (CB) of Tensile-Strained Si(TS-Si) on a relaxed Si1-xGex substrate is systematically investigated, including the number of equivalent CB edge energy extrema, CB energy minima, the po...The feature of conduction band (CB) of Tensile-Strained Si(TS-Si) on a relaxed Si1-xGex substrate is systematically investigated, including the number of equivalent CB edge energy extrema, CB energy minima, the position of the extremal point, and effective mass. Based on an analysis of symmetry under strain, the number of equivalent CB edge energy extrema is presented; Using the K.P method with the help of perturbation theory, dispersion relation near minima of CB bottom energy, derived from the linear deformation potential theory, is determined, from which the parameters, namely, the position of the extremal point, and the longitudinal and transverse masses (m1^* and mt^*)are obtained.展开更多
A novel vertical stack heterostructure CMOSFET is investigated, which is structured by strained SiGe/Si with a hole quantum well channel in the compressively strained Sil-xGex layer for p-MOSFET and an electron quantu...A novel vertical stack heterostructure CMOSFET is investigated, which is structured by strained SiGe/Si with a hole quantum well channel in the compressively strained Sil-xGex layer for p-MOSFET and an electron quantum well channel in the tensile strained Si layer for n-MOSFET. The device possesses several advantages including: 1) the integration of electron quantum well channel with hole quantum well channel into the same vertical layer structure; 2) the gate work function modifiability due to the introduction of poly-SiGe as a gate material; 3) better transistor matching; and 4) flexibility of layout design of CMOSFET by adopting exactly the same material lays for both n-channel and p-channel. The MEDICI simulation result shows that p-MOSFET and n-MOSFET have approximately the same matching threshold voltages. Nice performances are displayed in transfer characteristic, transconductance and cut-off frequency. In addition, its operation as an inverter confirms the CMOSFET structured device to be normal and effective in function.展开更多
Based on the exact resultant solution of two-dimensional Poisson's equation in strained Si and Si1-xCex layer, a simple and accurate two-dimensional.analytical model including surface channel potential, surface chann...Based on the exact resultant solution of two-dimensional Poisson's equation in strained Si and Si1-xCex layer, a simple and accurate two-dimensional.analytical model including surface channel potential, surface channel electric field, threshold voltage and subthreshold swing for fully depleted gate stack strained Si on silicon-germanium-on-insulator (SGOI) MOSFETs has been developed. The results show that this novel structure can suppress the short channel effects (SCE), the drain-induced barrier-lowering (DIBL) and improve the subthreshold performance in nanoelectronics application. The model is verified by numerical simulation. The model provides the basic designing guidance of gate stack strained Si on SGOI MOSFETs.展开更多
The two-dimensional models for symmetrical double-material double-gate (DM-DG) strained Si (s-Si) metal-oxide semiconductor field effect transistors (MOSFETs) are presented. The surface potential and the surface...The two-dimensional models for symmetrical double-material double-gate (DM-DG) strained Si (s-Si) metal-oxide semiconductor field effect transistors (MOSFETs) are presented. The surface potential and the surface electric field ex- pressions have been obtained by solving Poisson's equation. The models of threshold voltage and subthreshold current are obtained based on the surface potential expression. The surface potential and the surface electric field are compared with those of single-material double-gate (SM-DG) MOSFETs. The effects of different device parameters on the threshold voltage and the subthreshold current are demonstrated. The analytical models give deep insight into the device parameters design. The analytical results obtained from the proposed models show good matching with the simulation results using DESSIS.展开更多
Strained Si is recognized as a necessary technology booster for modem integrated circuit technology. However, the thermal oxidation behaviors of strained Si substrates are not well understood yet despite their importa...Strained Si is recognized as a necessary technology booster for modem integrated circuit technology. However, the thermal oxidation behaviors of strained Si substrates are not well understood yet despite their importance. In this study, we for the first time experimentally find that all types of strained Si substrates (uniaxial tensile, uniaxial compressive, biaxial tensile, and biaxial compressive) show smaller thermal oxidation rates than an unstrained Si substrate. The possible mechanisms for these retarded thermal oxidation rates in strained Si substrates are also discussed.展开更多
After constructing a stress and strain model, the valence bands of in-plane biaxial tensile strained Si is calculated by k·p method. In the paper we calculate the accurate anisotropy valance bands and the splitti...After constructing a stress and strain model, the valence bands of in-plane biaxial tensile strained Si is calculated by k·p method. In the paper we calculate the accurate anisotropy valance bands and the splitting energy between light and heavy hole bands. The results show that the valance bands are highly distorted, and the anisotropy is more obvious. To obtain the density of states (DOS) effective mass, which is a very important parameter for device modeling, a DOS effective mass model of biaxial tensile strained Si is constructed based on the valance band calculation. This model can be directly used in the device model of metal-oxide semiconductor field effect transistor (MOSFET). It also a provides valuable reference for biaxial tensile strained silicon MOSFET design.展开更多
Strain-relaxed SiGe virtual substrates are of great importance for fabricating strained Si materials. Instead of using graded buffer method to obtain fully relaxed SiGe film, in this study a new method to obtain relax...Strain-relaxed SiGe virtual substrates are of great importance for fabricating strained Si materials. Instead of using graded buffer method to obtain fully relaxed SiGe film, in this study a new method to obtain relaxed SiGe film and strained Si film with much thinner SiGe film was proposed. Almost fully relaxed thin SiGe buffer layer was obtained by Si/SiGe/Si multi-structure oxidation and the SiO2 layer removing before SiGe regrowth. Raman spectroscopy analysis indicates that the regrown SiGe film has a strain relaxation ratio of about 93% while the Si cap layer has a strain of 0.63%. AFM shows good surface roughness. This new method is proved to be a useful approach to fabricate thin relaxed epilayers and strain Si films.展开更多
A fully standard CMOS integrated strained Si-channel NMOSFET has been demonstrated. By adjusting the thickness of graded SiGe, modifying the channel doping concentration, changing the Ge fraction of the relaxed SiGe l...A fully standard CMOS integrated strained Si-channel NMOSFET has been demonstrated. By adjusting the thickness of graded SiGe, modifying the channel doping concentration, changing the Ge fraction of the relaxed SiGe layer and forming a p-well by multiple implantation technology, a surface strained Si-channel NMOSFET was fabricated, of which the low field mobility was enhanced by 140%, compared with the bulk-Si control device. Strained NMOSFET and PMOSFET were used to fabricate a strained CMOS inverter based on a SiGe virtual substrate. Test results indicated that the strained CMOS converter had a drain leakage current much lower than the Si devices, and the device exhibited wonderful on/off-state voltage transmission characteristics.展开更多
In this manuscript we analyze a unique approach to improve the performance of the bipolar charge plasma transistor(BCPT) by introducing a strained Si/SiGe1-x layer as the active device region. For charge plasma realiz...In this manuscript we analyze a unique approach to improve the performance of the bipolar charge plasma transistor(BCPT) by introducing a strained Si/SiGe1-x layer as the active device region. For charge plasma realization different metal work-function electrodes are used to induce n+ and p+ regions on undoped strained silicon-on-insulator(sSOI or SiGe) to realize emitter, base, and collector regions of the BCPT. Here,by using a calibrated 2-D TCAD simulation the impact of a Si mole fraction x(in SiGe) on device performance metrics is investigated. The analysis demonstrates the band gap lowering with decreasing Si content or effective strain on the Si layer, and its subsequent advantages. This work reports a significant improvement in current gain, cutoff frequency, and lower collector breakdown voltage(BVCEO) for the proposed structure over the conventional device. The effect of varying temperature on the strained Si layer and its implications on the device performance is also investigated. The analysis demonstrates a fair device-level understanding and exhibits the immense potential of the SiGematerial as the device layer. In addition to this, using extensive 2-D mixed-mode TCAD simulation, a considerable improvement in switching transient times are also observed compared to its conventional counterpart.展开更多
Calculations were performed on the band edge levels of (111)-biaxially strained Si on relaxed Si1-xGex alloy using the k.p perturbation method coupled with deformation potential theory. The results show that the con...Calculations were performed on the band edge levels of (111)-biaxially strained Si on relaxed Si1-xGex alloy using the k.p perturbation method coupled with deformation potential theory. The results show that the conduction band (CB) edge is characterized by six identicalvalleys, that the valence band (VB) edge degeneracies are partially lifted, and that both the CB and VB edge levels move up in electron energy as the Ge fraction (x) increases. In addition, the dependence of the indirect bandgap and the VB edge splitting energy on x was obtained. Quantitative data from the results supply valuable references for Si-based strained device design.展开更多
Inter valley scattering has a great impact on carrier mobility of strained Si materials,so based on Fermi's golden rule and the theory of Boltzmann collision term approximation,inter valley phonon scattering mechanis...Inter valley scattering has a great impact on carrier mobility of strained Si materials,so based on Fermi's golden rule and the theory of Boltzmann collision term approximation,inter valley phonon scattering mechanism of electrons in nano scale strained Si(101) materials is established under the influence of both energy and stress. It shows that inter valley phonon f_2,f_3,g_3 scattering rates decrease markedly in nano scale strained Si(101) materials with increasing stress.The quantized models can provide valuable references to the understanding of strained Si materials and the research on electron carrier mobility.展开更多
Based on the analysis of vertical electric potential distribution across the dual-channel strained p-type Si/strained Si1-xGex/relaxd Si1-yGey(s-Si/s-SiGe/Si1-yGey) metal-oxide-semiconductor field-effect transistor ...Based on the analysis of vertical electric potential distribution across the dual-channel strained p-type Si/strained Si1-xGex/relaxd Si1-yGey(s-Si/s-SiGe/Si1-yGey) metal-oxide-semiconductor field-effect transistor (PMOSFET), analytical expressions of the threshold voltages for buried channel and surface channel are presented. And the maximum allowed thickness of s-Si is given, which can ensure that the strong inversion appears earlier in the buried channel (compressive strained SiGe) than in the surface channel (tensile strained Si), because the hole mobility in the buried channel is higher than that in the surface channel. Thus they offer a good accuracy as compared with the results of device simulator ISE. With this model, the variations of threshold voltage and maximum allowed thickness of s-Si with design parameters can be predicted, such as Ge fraction, layer thickness, and doping concentration. This model can serve as a useful tool for p-channel s-Si/s-SiGe/Si1-yGey metal-oxide-semiconductor field-effect transistor (MOSFET) designs.展开更多
CaN films with an AlxGa1-xN/AlyGa1-xN superlattice (SL) buffer layer are grown on Si(111) substrates by metal-organic chemical vapor deposition (MOCVD). The structure and strain properties of the samples are stu...CaN films with an AlxGa1-xN/AlyGa1-xN superlattice (SL) buffer layer are grown on Si(111) substrates by metal-organic chemical vapor deposition (MOCVD). The structure and strain properties of the samples are studied by optical microscopy, Raman spectroscopy, x-ray diffractometry and atomic force microscopy. The results show that the strain status and crystalline quality of the CaN layers are strongly dependent on the difference of the Al composition between AlxCa1-xN barriers and AlyCa1-yN wells in the SLs. With a large Al composition difference, the CaN film tends to generate cracks on the surface due to the severe relaxation of the SLs. Otherwise, when using a small Al composition difference, the crystalline quality of the CaN layer degrades due to the poor function of the SLs in filtering dislocations. Under an optimized condition that the Al composition difference equals 0.1, the crack-free and compressive strained CaN film with an improved crystalline quality is achieved. Therefore, the AlxGa1-xN/AlyGal-yN SL buffer layer is a promising buffer structure for growing thick CaN films on Si substrates without crack generation.展开更多
The strain technology is an effective way to improve hole mobility and CMOS device performance. Tetragonal strain leading to hole mobility enhancement in strained Si (001) has been verified by two aspects of theories ...The strain technology is an effective way to improve hole mobility and CMOS device performance. Tetragonal strain leading to hole mobility enhancement in strained Si (001) has been verified by two aspects of theories and experiments. In this paper, we aim to study rhombohedral strain effect on the hole mobility of Si, which results from growing on the (111) oriented relaxed Si1 xGex substrate. It is found that structure transformation of Si from cubic to trigonal system occurs under the biaxial tensile stress imposed by the (111) substrate and that its corresponding averaged hole mobility increases about one time at most in comparison with one of unstrained Si. The results can provide valuable reference to the understanding of the strained Si material physics and its design.展开更多
High quality strain-relaxed thin SiGe virtual substrates have been achieved by combining the misfit strain technique and the point defect technique. The point defects were first injected into the coherently strained S...High quality strain-relaxed thin SiGe virtual substrates have been achieved by combining the misfit strain technique and the point defect technique. The point defects were first injected into the coherently strained SiGe layer through the "inserted Si layer" by argon ion implantation. After thermal annealing, an in- termediate SiGe layer was grown with a strained Si cap layer. The inserted Si layer in the SiGe film serves as the source of the misfit strain and prevents the threading dislocations from propagating into the next epitaxial layer. A strained-SilSiGelinserted-SilSiGe heterostructure was achieved with a threading dislocation density of 1×10^4 cm-2 and a root mean square surface roughness of 0.87 nm. This combined method can effectively fabricate device-quality SiGe virtual substrates with a low threading dislocation density and a smooth surface.展开更多
文摘The feature of conduction band (CB) of Tensile-Strained Si(TS-Si) on a relaxed Si1-xGex substrate is systematically investigated, including the number of equivalent CB edge energy extrema, CB energy minima, the position of the extremal point, and effective mass. Based on an analysis of symmetry under strain, the number of equivalent CB edge energy extrema is presented; Using the K.P method with the help of perturbation theory, dispersion relation near minima of CB bottom energy, derived from the linear deformation potential theory, is determined, from which the parameters, namely, the position of the extremal point, and the longitudinal and transverse masses (m1^* and mt^*)are obtained.
文摘A novel vertical stack heterostructure CMOSFET is investigated, which is structured by strained SiGe/Si with a hole quantum well channel in the compressively strained Sil-xGex layer for p-MOSFET and an electron quantum well channel in the tensile strained Si layer for n-MOSFET. The device possesses several advantages including: 1) the integration of electron quantum well channel with hole quantum well channel into the same vertical layer structure; 2) the gate work function modifiability due to the introduction of poly-SiGe as a gate material; 3) better transistor matching; and 4) flexibility of layout design of CMOSFET by adopting exactly the same material lays for both n-channel and p-channel. The MEDICI simulation result shows that p-MOSFET and n-MOSFET have approximately the same matching threshold voltages. Nice performances are displayed in transfer characteristic, transconductance and cut-off frequency. In addition, its operation as an inverter confirms the CMOSFET structured device to be normal and effective in function.
基金Project supported by the National Natural Science Foundation of China (Grant Nos. 60976068 and 60936005)the Cultivation Fund of the Key Scientific and Technical Innovation Project, Ministry of Education of China (Grant No. 708083)the Specialized Research Fund for the Doctoral Program of Higher Education of China (Grant No. 200807010010)
文摘Based on the exact resultant solution of two-dimensional Poisson's equation in strained Si and Si1-xCex layer, a simple and accurate two-dimensional.analytical model including surface channel potential, surface channel electric field, threshold voltage and subthreshold swing for fully depleted gate stack strained Si on silicon-germanium-on-insulator (SGOI) MOSFETs has been developed. The results show that this novel structure can suppress the short channel effects (SCE), the drain-induced barrier-lowering (DIBL) and improve the subthreshold performance in nanoelectronics application. The model is verified by numerical simulation. The model provides the basic designing guidance of gate stack strained Si on SGOI MOSFETs.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61376099,11235008,and 61205003)
文摘The two-dimensional models for symmetrical double-material double-gate (DM-DG) strained Si (s-Si) metal-oxide semiconductor field effect transistors (MOSFETs) are presented. The surface potential and the surface electric field ex- pressions have been obtained by solving Poisson's equation. The models of threshold voltage and subthreshold current are obtained based on the surface potential expression. The surface potential and the surface electric field are compared with those of single-material double-gate (SM-DG) MOSFETs. The effects of different device parameters on the threshold voltage and the subthreshold current are demonstrated. The analytical models give deep insight into the device parameters design. The analytical results obtained from the proposed models show good matching with the simulation results using DESSIS.
基金supported by the National Key Basic Research Project of China(Grant No.2011CBA00607)the National Natural Science Foundation of China(Grant Nos.61106089 and 61376097)the Program B for Outstanding Ph.D.Candidate of Nanjing University,China(Grant No.201301B005)
文摘Strained Si is recognized as a necessary technology booster for modem integrated circuit technology. However, the thermal oxidation behaviors of strained Si substrates are not well understood yet despite their importance. In this study, we for the first time experimentally find that all types of strained Si substrates (uniaxial tensile, uniaxial compressive, biaxial tensile, and biaxial compressive) show smaller thermal oxidation rates than an unstrained Si substrate. The possible mechanisms for these retarded thermal oxidation rates in strained Si substrates are also discussed.
基金supported by the National Natural Science Foundation of China (Grant Nos. 60976068 and 60936005)the Cultivation Fund of the Key Scientific and Technical Innovation Project,Ministry of Education of China (Grant No. 78083)
文摘After constructing a stress and strain model, the valence bands of in-plane biaxial tensile strained Si is calculated by k·p method. In the paper we calculate the accurate anisotropy valance bands and the splitting energy between light and heavy hole bands. The results show that the valance bands are highly distorted, and the anisotropy is more obvious. To obtain the density of states (DOS) effective mass, which is a very important parameter for device modeling, a DOS effective mass model of biaxial tensile strained Si is constructed based on the valance band calculation. This model can be directly used in the device model of metal-oxide semiconductor field effect transistor (MOSFET). It also a provides valuable reference for biaxial tensile strained silicon MOSFET design.
基金This project was financially supported by the National Natural Science Foundation of China(No.60476017).
文摘Strain-relaxed SiGe virtual substrates are of great importance for fabricating strained Si materials. Instead of using graded buffer method to obtain fully relaxed SiGe film, in this study a new method to obtain relaxed SiGe film and strained Si film with much thinner SiGe film was proposed. Almost fully relaxed thin SiGe buffer layer was obtained by Si/SiGe/Si multi-structure oxidation and the SiO2 layer removing before SiGe regrowth. Raman spectroscopy analysis indicates that the regrown SiGe film has a strain relaxation ratio of about 93% while the Si cap layer has a strain of 0.63%. AFM shows good surface roughness. This new method is proved to be a useful approach to fabricate thin relaxed epilayers and strain Si films.
基金supposed by the National Basic Research Program of Chinasupposed by the State Key Laboratory of Electronic Thin Films and Integrated Devices,UESTCthe Science and Technology on Analog Integrated Circuit Laboratory,CETC
文摘A fully standard CMOS integrated strained Si-channel NMOSFET has been demonstrated. By adjusting the thickness of graded SiGe, modifying the channel doping concentration, changing the Ge fraction of the relaxed SiGe layer and forming a p-well by multiple implantation technology, a surface strained Si-channel NMOSFET was fabricated, of which the low field mobility was enhanced by 140%, compared with the bulk-Si control device. Strained NMOSFET and PMOSFET were used to fabricate a strained CMOS inverter based on a SiGe virtual substrate. Test results indicated that the strained CMOS converter had a drain leakage current much lower than the Si devices, and the device exhibited wonderful on/off-state voltage transmission characteristics.
文摘In this manuscript we analyze a unique approach to improve the performance of the bipolar charge plasma transistor(BCPT) by introducing a strained Si/SiGe1-x layer as the active device region. For charge plasma realization different metal work-function electrodes are used to induce n+ and p+ regions on undoped strained silicon-on-insulator(sSOI or SiGe) to realize emitter, base, and collector regions of the BCPT. Here,by using a calibrated 2-D TCAD simulation the impact of a Si mole fraction x(in SiGe) on device performance metrics is investigated. The analysis demonstrates the band gap lowering with decreasing Si content or effective strain on the Si layer, and its subsequent advantages. This work reports a significant improvement in current gain, cutoff frequency, and lower collector breakdown voltage(BVCEO) for the proposed structure over the conventional device. The effect of varying temperature on the strained Si layer and its implications on the device performance is also investigated. The analysis demonstrates a fair device-level understanding and exhibits the immense potential of the SiGematerial as the device layer. In addition to this, using extensive 2-D mixed-mode TCAD simulation, a considerable improvement in switching transient times are also observed compared to its conventional counterpart.
基金supported by the Foundation from the National Ministries and Commissions(Nos.51308040203,6139801).
文摘Calculations were performed on the band edge levels of (111)-biaxially strained Si on relaxed Si1-xGex alloy using the k.p perturbation method coupled with deformation potential theory. The results show that the conduction band (CB) edge is characterized by six identicalvalleys, that the valence band (VB) edge degeneracies are partially lifted, and that both the CB and VB edge levels move up in electron energy as the Ge fraction (x) increases. In addition, the dependence of the indirect bandgap and the VB edge splitting energy on x was obtained. Quantitative data from the results supply valuable references for Si-based strained device design.
基金Project supported by the National Natural Science Foundation of China(Nos.51277012,61162025)the Fundamental Research Funds for the Central Universities of China(Nos.2013G1240120,CHD2011ZD004,CHD2013JC120)
文摘Inter valley scattering has a great impact on carrier mobility of strained Si materials,so based on Fermi's golden rule and the theory of Boltzmann collision term approximation,inter valley phonon scattering mechanism of electrons in nano scale strained Si(101) materials is established under the influence of both energy and stress. It shows that inter valley phonon f_2,f_3,g_3 scattering rates decrease markedly in nano scale strained Si(101) materials with increasing stress.The quantized models can provide valuable references to the understanding of strained Si materials and the research on electron carrier mobility.
基金Project supported by the National Defence Pre-research Foundation of China (Grant Nos. 51308040203,9140A08060407DZ0103,and 6139801)
文摘Based on the analysis of vertical electric potential distribution across the dual-channel strained p-type Si/strained Si1-xGex/relaxd Si1-yGey(s-Si/s-SiGe/Si1-yGey) metal-oxide-semiconductor field-effect transistor (PMOSFET), analytical expressions of the threshold voltages for buried channel and surface channel are presented. And the maximum allowed thickness of s-Si is given, which can ensure that the strong inversion appears earlier in the buried channel (compressive strained SiGe) than in the surface channel (tensile strained Si), because the hole mobility in the buried channel is higher than that in the surface channel. Thus they offer a good accuracy as compared with the results of device simulator ISE. With this model, the variations of threshold voltage and maximum allowed thickness of s-Si with design parameters can be predicted, such as Ge fraction, layer thickness, and doping concentration. This model can serve as a useful tool for p-channel s-Si/s-SiGe/Si1-yGey metal-oxide-semiconductor field-effect transistor (MOSFET) designs.
基金Supported by the National Natural Science Foundation of China under Grant Nos 61076120 and 61106130the Natural Science Foundation and Scientific Support Plan of Jiangsu Province under Grant Nos BK2012516,BK20131072,and BE2012007
文摘CaN films with an AlxGa1-xN/AlyGa1-xN superlattice (SL) buffer layer are grown on Si(111) substrates by metal-organic chemical vapor deposition (MOCVD). The structure and strain properties of the samples are studied by optical microscopy, Raman spectroscopy, x-ray diffractometry and atomic force microscopy. The results show that the strain status and crystalline quality of the CaN layers are strongly dependent on the difference of the Al composition between AlxCa1-xN barriers and AlyCa1-yN wells in the SLs. With a large Al composition difference, the CaN film tends to generate cracks on the surface due to the severe relaxation of the SLs. Otherwise, when using a small Al composition difference, the crystalline quality of the CaN layer degrades due to the poor function of the SLs in filtering dislocations. Under an optimized condition that the Al composition difference equals 0.1, the crack-free and compressive strained CaN film with an improved crystalline quality is achieved. Therefore, the AlxGa1-xN/AlyGal-yN SL buffer layer is a promising buffer structure for growing thick CaN films on Si substrates without crack generation.
基金supported by the Fundamental Research Funds for the Central Universities (Grant Nos. 72105499 and 72104089)the Natural Science Basic Research Plan in Shaanxi Province of China (Grant No.2010JQ8008)
文摘The strain technology is an effective way to improve hole mobility and CMOS device performance. Tetragonal strain leading to hole mobility enhancement in strained Si (001) has been verified by two aspects of theories and experiments. In this paper, we aim to study rhombohedral strain effect on the hole mobility of Si, which results from growing on the (111) oriented relaxed Si1 xGex substrate. It is found that structure transformation of Si from cubic to trigonal system occurs under the biaxial tensile stress imposed by the (111) substrate and that its corresponding averaged hole mobility increases about one time at most in comparison with one of unstrained Si. The results can provide valuable reference to the understanding of the strained Si material physics and its design.
基金Supported by the National Natural Science Foundation of China(Nos. 60476017 and 60636010)the Basic Research Foundation of Tsinghua National Laboratory for Information Science andTechnology (TNList)
文摘High quality strain-relaxed thin SiGe virtual substrates have been achieved by combining the misfit strain technique and the point defect technique. The point defects were first injected into the coherently strained SiGe layer through the "inserted Si layer" by argon ion implantation. After thermal annealing, an in- termediate SiGe layer was grown with a strained Si cap layer. The inserted Si layer in the SiGe film serves as the source of the misfit strain and prevents the threading dislocations from propagating into the next epitaxial layer. A strained-SilSiGelinserted-SilSiGe heterostructure was achieved with a threading dislocation density of 1×10^4 cm-2 and a root mean square surface roughness of 0.87 nm. This combined method can effectively fabricate device-quality SiGe virtual substrates with a low threading dislocation density and a smooth surface.