The reverse generation current under high-gate-voltage stress condition in LDD nMOSFET's is studied. We find that the generation current peak decreases as the stress time increases. We ascribe this finding to the dom...The reverse generation current under high-gate-voltage stress condition in LDD nMOSFET's is studied. We find that the generation current peak decreases as the stress time increases. We ascribe this finding to the dominating oxide trapped electrons that reduce the effective drain bias, lowering the maximal generation rate. The density of the effective trapped electrons affecting the effective drain bias is calculated with our model.展开更多
The low voltage substrate current (Ib) has been studied based on generation kinetics and used as a monitor of interface states (Nit) generation for ultra-thin oxide n-MOSFETs under constant voltage stress. It is f...The low voltage substrate current (Ib) has been studied based on generation kinetics and used as a monitor of interface states (Nit) generation for ultra-thin oxide n-MOSFETs under constant voltage stress. It is found that the low voltage Ib is formed by electrons tunnelling through interface states, and the variations of Ib(△Ib) are proportional to variations of Nit (△Nit). The Nit energy distributions were determined by differentiating Nit(Vg). The results have been compared with that measured by using gate diode technique.展开更多
A two-input boost converter with voltage multiplier cell is proposed in this paper. Then a family of two-input converters with and without voltage multiplier cell are derived and their results are compared to achieve ...A two-input boost converter with voltage multiplier cell is proposed in this paper. Then a family of two-input converters with and without voltage multiplier cell are derived and their results are compared to achieve high voltage gain, low duty cycle, and reduced voltage stress. From the analysis of different topologies, a modified two-input converter with two-stage voltage multiplier cell has good operating characteristics. The switch voltage stress and duty cycle of the modified converter is significantly very less than that of the other converter topologies. The modified DC-DC converter with 50% duty cycle achieves a voltage gain of 10 and the results are verified by using MATLAB/Simulink software.展开更多
The design, simulation and implementation of modified diode assisted extended boost q-ZSI (MDAEB q-ZSI) for photovoltaic application are proposed in this paper. It is the most efficient topology that provide...The design, simulation and implementation of modified diode assisted extended boost q-ZSI (MDAEB q-ZSI) for photovoltaic application are proposed in this paper. It is the most efficient topology that provides a single stage conversion for PV systems by providing high input voltage gain, reduced number of components count, increased voltage boost property, reduced voltage ratings, reduced voltage stress across the switches and simplified control strategies. Its unique capability in single stage conversion with improved voltage gain is used for voltage buck and boost function. The operating modes and the steady state theoretical analysis of voltage boost, control methods and a system design guide for the proposed topology are investigated in this paper. A simulation model of the PV system based on MDAEB q-ZSI has been built in MATLAB/ SIMULINK. Performance parameters such as Total harmonic distortion (THD), voltage gain, voltage stress and boost factor are computed and compared with the conventional quasi z-source inverter. The prototype model for MDAEB q-ZSI is developed and the results are validated.展开更多
A family of coat circuits for SEPIC converters to improve their boost capability is presented.The present coat circuit does not contain any active switches,so the voltage conversion ratio of the presented converters c...A family of coat circuits for SEPIC converters to improve their boost capability is presented.The present coat circuit does not contain any active switches,so the voltage conversion ratio of the presented converters can be enhanced without complicating its gate driver and control circuits.Meanwhile,because of the expansibility of the coat circuit,the number of its basic cells can be adjusted regarding the actual application requirements.Moreover,in comparison with a conventional SEPIC converter,voltage stress on power switch and diodes of the presented topology is lower at the same output voltage,and thus semiconductor components with low on-resistance are chosen to improve conversion efficiency of converter.The operational principle and steady state analysis of the SEPIC converter with one of the proposed coat circuits have been discussed in detail,and a 300W laboratory prototype is implemented to prove the theoretical analysis of presented converter.展开更多
A non-isolated high gain step-up DC-DC converter for low power applications is suggested in this study.In the designed transformerless converter,the main switch current and voltage stress is reduced while maintaining ...A non-isolated high gain step-up DC-DC converter for low power applications is suggested in this study.In the designed transformerless converter,the main switch current and voltage stress is reduced while maintaining high voltage gain.For instance,with a duty cycle of 0.5 a voltage gain equal to 5 is achieved while the normalized switch voltage stress is 0.4.Also,it decreases power losses of active and passive elements.In the proposed converter design,the switched-capacitor(SC)technique is used to obtain maximum voltage transfer gain using only one switch.The three modes of operation,i.e.,continuous conduction mode(CCM),boundary conduction mode(BCM),and discontinuous conduction mode(DCM),are studied in detail.The small signal analysis(SSA)of the designed converter is investigated,and its steady-state model is examined under CCM.Performance of the proposed converter proposed in this study is assessed and tested using a prototype.Efficiency of the converter is recorded above 94%in a wide range of output powers.Overall,compared to the other converters,the results suggest satisfactory performance of the designed converter.An issue of the proposed converter is that its input current is not smooth due to using the switched-capacitor cell in its structure.This issue is alleviated by using input filters.展开更多
In this paper, different electrical measurement and operation methods of resistive random access memory (RRAM) have been summarized, including voltage sweeping mode (VSM), current sweeping mode (CSM), co lstant ...In this paper, different electrical measurement and operation methods of resistive random access memory (RRAM) have been summarized, including voltage sweeping mode (VSM), current sweeping mode (CSM), co lstant current stress (CCS), constant voltage stress (CVS), rectangular pulse mode (RPM), and triangle pulse mode (TPM). Meanwhile, the effects of these meas- urement methods on the forming, set, reset and read operation as well as endurance performance have been compared. Finally, their respective controllability of various resistive switching parameters have been summar zeal and analyzed.展开更多
文摘The reverse generation current under high-gate-voltage stress condition in LDD nMOSFET's is studied. We find that the generation current peak decreases as the stress time increases. We ascribe this finding to the dominating oxide trapped electrons that reduce the effective drain bias, lowering the maximal generation rate. The density of the effective trapped electrons affecting the effective drain bias is calculated with our model.
文摘The low voltage substrate current (Ib) has been studied based on generation kinetics and used as a monitor of interface states (Nit) generation for ultra-thin oxide n-MOSFETs under constant voltage stress. It is found that the low voltage Ib is formed by electrons tunnelling through interface states, and the variations of Ib(△Ib) are proportional to variations of Nit (△Nit). The Nit energy distributions were determined by differentiating Nit(Vg). The results have been compared with that measured by using gate diode technique.
文摘A two-input boost converter with voltage multiplier cell is proposed in this paper. Then a family of two-input converters with and without voltage multiplier cell are derived and their results are compared to achieve high voltage gain, low duty cycle, and reduced voltage stress. From the analysis of different topologies, a modified two-input converter with two-stage voltage multiplier cell has good operating characteristics. The switch voltage stress and duty cycle of the modified converter is significantly very less than that of the other converter topologies. The modified DC-DC converter with 50% duty cycle achieves a voltage gain of 10 and the results are verified by using MATLAB/Simulink software.
文摘The design, simulation and implementation of modified diode assisted extended boost q-ZSI (MDAEB q-ZSI) for photovoltaic application are proposed in this paper. It is the most efficient topology that provides a single stage conversion for PV systems by providing high input voltage gain, reduced number of components count, increased voltage boost property, reduced voltage ratings, reduced voltage stress across the switches and simplified control strategies. Its unique capability in single stage conversion with improved voltage gain is used for voltage buck and boost function. The operating modes and the steady state theoretical analysis of voltage boost, control methods and a system design guide for the proposed topology are investigated in this paper. A simulation model of the PV system based on MDAEB q-ZSI has been built in MATLAB/ SIMULINK. Performance parameters such as Total harmonic distortion (THD), voltage gain, voltage stress and boost factor are computed and compared with the conventional quasi z-source inverter. The prototype model for MDAEB q-ZSI is developed and the results are validated.
基金supported in part by the National Natural Science Foundation of China(51707103)in part by Guangxi Key Research and Development Program(2022AB05028).
文摘A family of coat circuits for SEPIC converters to improve their boost capability is presented.The present coat circuit does not contain any active switches,so the voltage conversion ratio of the presented converters can be enhanced without complicating its gate driver and control circuits.Meanwhile,because of the expansibility of the coat circuit,the number of its basic cells can be adjusted regarding the actual application requirements.Moreover,in comparison with a conventional SEPIC converter,voltage stress on power switch and diodes of the presented topology is lower at the same output voltage,and thus semiconductor components with low on-resistance are chosen to improve conversion efficiency of converter.The operational principle and steady state analysis of the SEPIC converter with one of the proposed coat circuits have been discussed in detail,and a 300W laboratory prototype is implemented to prove the theoretical analysis of presented converter.
文摘A non-isolated high gain step-up DC-DC converter for low power applications is suggested in this study.In the designed transformerless converter,the main switch current and voltage stress is reduced while maintaining high voltage gain.For instance,with a duty cycle of 0.5 a voltage gain equal to 5 is achieved while the normalized switch voltage stress is 0.4.Also,it decreases power losses of active and passive elements.In the proposed converter design,the switched-capacitor(SC)technique is used to obtain maximum voltage transfer gain using only one switch.The three modes of operation,i.e.,continuous conduction mode(CCM),boundary conduction mode(BCM),and discontinuous conduction mode(DCM),are studied in detail.The small signal analysis(SSA)of the designed converter is investigated,and its steady-state model is examined under CCM.Performance of the proposed converter proposed in this study is assessed and tested using a prototype.Efficiency of the converter is recorded above 94%in a wide range of output powers.Overall,compared to the other converters,the results suggest satisfactory performance of the designed converter.An issue of the proposed converter is that its input current is not smooth due to using the switched-capacitor cell in its structure.This issue is alleviated by using input filters.
基金supported by the National Natural Science Foundation of China(Grant Nos.61322408,61221004,61422407,61334007,61474136,61274091,61376112,61306117,61106119,and 61106082)National Basic Research Program of China(Grant No.2011CBA00602)National High Technology Research and Development Program of China(Grant Nos.2014AA032900,2013AA030801,2011AA010401 and 2011AA-010402)
文摘In this paper, different electrical measurement and operation methods of resistive random access memory (RRAM) have been summarized, including voltage sweeping mode (VSM), current sweeping mode (CSM), co lstant current stress (CCS), constant voltage stress (CVS), rectangular pulse mode (RPM), and triangle pulse mode (TPM). Meanwhile, the effects of these meas- urement methods on the forming, set, reset and read operation as well as endurance performance have been compared. Finally, their respective controllability of various resistive switching parameters have been summar zeal and analyzed.