Based on the definition of a logic structure feature to relate logically functional requirements to geometric representation independent upon detailed geometric representation, this paper presents an idea of logical s...Based on the definition of a logic structure feature to relate logically functional requirements to geometric representation independent upon detailed geometric representation, this paper presents an idea of logical structure modeling for computer aided conceptual design and makes attempt to establish a representation formalism of logic structure modeling. The definition and representation of logical structure feature are given and an assembly module definition for supporting top down conceptual design is also proposed. The proposed scheme contributes to several aspects of conceptual design research, especially to provide elementarily a formal methodology for computer aided conceptual design system development and operation.展开更多
μ-synthesis is a practical design approach and has been applied successfully to achieve a nominal and robust performance objectives. However, this design method suffers from the complexity of its practical implementa...μ-synthesis is a practical design approach and has been applied successfully to achieve a nominal and robust performance objectives. However, this design method suffers from the complexity of its practical implementation and high computational demand due to its high order dynamics. To overcome this problem, the interaction between fuzzy logic control which is a part of intelligence control theory and p-synthesis controller is carried out. This is called integrated fuzzy robust controller in this paper. It is obtained by coupling fuzzy pd with p-synthesis controller through the outer loop. Using this design strategy, we can keep the system performance and robustness even a high order p-synthesis controller is reduced into second order model. In order to test the effectiveness of this design method, the linear simulation results for a launch vehicle＇s attitude control motion are presented at the end of this paper.展开更多
自动电压控制(Automatic Voltage Control,AVC)是现代电力系统控制的重要功能,厂站端母线电压自动调节功能对电网的安全与稳定有着重要影响。本文介绍了AVC系统基本原理和自动电压控制技术理论依据,根据现场AVC工程技术经验总结,对AVC...自动电压控制(Automatic Voltage Control,AVC)是现代电力系统控制的重要功能,厂站端母线电压自动调节功能对电网的安全与稳定有着重要影响。本文介绍了AVC系统基本原理和自动电压控制技术理论依据,根据现场AVC工程技术经验总结,对AVC系统结构与通信、AVC子站系统信号与数据流向进行了总结与分析设计,提出了厂站端AVC投退与安全逻辑、增减磁控制逻辑的设计方案,并结合华东电网某抽水蓄能电站现场调试工程应用对所提厂站端AVC系统逻辑设计方案进行了验证,在工程上对AVC逻辑设计与应用具有指导意义。展开更多
为解决里所(Reed-solomon,RS)编码的低功耗设计,从系统架构、RTL级、门级等不同设计层级进行分析,并在专用集成电路(Application specific integrated circuit,ASIC)设计中加以实践。基于低功耗设计将前端RTL级设计与后端IC设计结合起来...为解决里所(Reed-solomon,RS)编码的低功耗设计,从系统架构、RTL级、门级等不同设计层级进行分析,并在专用集成电路(Application specific integrated circuit,ASIC)设计中加以实践。基于低功耗设计将前端RTL级设计与后端IC设计结合起来,研究能实现RS编码功能的芯片。在系统架构层,针对RS编码算法中伽罗华域的乘法运算在硬件实现时存在数据运算量大、消耗功耗大等问题,提出基于乘法器因子矩阵的方法对RS编码算法进行优化,通过将乘法运算转化为减法运算等方式减少数据运算量,从而降低功耗。在RTL级和门级层面,分别在逻辑综合和后端实现中加以约束来实现低功耗设计,总体功耗可以降低60%左右。解决了因IC芯片功耗过高导致芯片性能下降,从而影响芯片正常工作等问题,为集成电路工艺提供了新的发展方向。展开更多
为促进芯片国产化进程,解决低密度奇偶校验(Low density parity check,LDPC)码译码效率低下的问题,以空间数据咨询委员会(The consultative committee for space data systems,CCSDS)标准下的、应用于近地空间(8176,7154)的LDPC码为研...为促进芯片国产化进程,解决低密度奇偶校验(Low density parity check,LDPC)码译码效率低下的问题,以空间数据咨询委员会(The consultative committee for space data systems,CCSDS)标准下的、应用于近地空间(8176,7154)的LDPC码为研究对象,根据归一化最小和译码(Normalized minimum sum,NMS)算法理论,设计了一种尺度因子可改变的LDPC译码器。首先,利用Vivado软件编写寄存器传输级(Register-transfer level,RTL)代码并进行功能仿真。其次,利用Design Compiler工具完成RTL级代码的综合,以生成物理设计需要的门级网表,并通过Innovus工具完成对的芯片后端自动布线(Auto placement route,APR)阶段的设计。在利用Prime Time和Calibre软件分别进行时序检查和物理验证时发现,存在时序违例1132条,设计规则违例647条。以不断迭代的方式进行修复,最终消除了违例,时序和物理设计均满足要求,并生成了GDS II文件。该设计可为芯片国产化生产提供新的思路。展开更多
文摘Based on the definition of a logic structure feature to relate logically functional requirements to geometric representation independent upon detailed geometric representation, this paper presents an idea of logical structure modeling for computer aided conceptual design and makes attempt to establish a representation formalism of logic structure modeling. The definition and representation of logical structure feature are given and an assembly module definition for supporting top down conceptual design is also proposed. The proposed scheme contributes to several aspects of conceptual design research, especially to provide elementarily a formal methodology for computer aided conceptual design system development and operation.
文摘μ-synthesis is a practical design approach and has been applied successfully to achieve a nominal and robust performance objectives. However, this design method suffers from the complexity of its practical implementation and high computational demand due to its high order dynamics. To overcome this problem, the interaction between fuzzy logic control which is a part of intelligence control theory and p-synthesis controller is carried out. This is called integrated fuzzy robust controller in this paper. It is obtained by coupling fuzzy pd with p-synthesis controller through the outer loop. Using this design strategy, we can keep the system performance and robustness even a high order p-synthesis controller is reduced into second order model. In order to test the effectiveness of this design method, the linear simulation results for a launch vehicle＇s attitude control motion are presented at the end of this paper.
文摘自动电压控制(Automatic Voltage Control,AVC)是现代电力系统控制的重要功能,厂站端母线电压自动调节功能对电网的安全与稳定有着重要影响。本文介绍了AVC系统基本原理和自动电压控制技术理论依据,根据现场AVC工程技术经验总结,对AVC系统结构与通信、AVC子站系统信号与数据流向进行了总结与分析设计,提出了厂站端AVC投退与安全逻辑、增减磁控制逻辑的设计方案,并结合华东电网某抽水蓄能电站现场调试工程应用对所提厂站端AVC系统逻辑设计方案进行了验证,在工程上对AVC逻辑设计与应用具有指导意义。
文摘为解决里所(Reed-solomon,RS)编码的低功耗设计,从系统架构、RTL级、门级等不同设计层级进行分析,并在专用集成电路(Application specific integrated circuit,ASIC)设计中加以实践。基于低功耗设计将前端RTL级设计与后端IC设计结合起来,研究能实现RS编码功能的芯片。在系统架构层,针对RS编码算法中伽罗华域的乘法运算在硬件实现时存在数据运算量大、消耗功耗大等问题,提出基于乘法器因子矩阵的方法对RS编码算法进行优化,通过将乘法运算转化为减法运算等方式减少数据运算量,从而降低功耗。在RTL级和门级层面,分别在逻辑综合和后端实现中加以约束来实现低功耗设计,总体功耗可以降低60%左右。解决了因IC芯片功耗过高导致芯片性能下降,从而影响芯片正常工作等问题,为集成电路工艺提供了新的发展方向。
文摘为促进芯片国产化进程,解决低密度奇偶校验(Low density parity check,LDPC)码译码效率低下的问题,以空间数据咨询委员会(The consultative committee for space data systems,CCSDS)标准下的、应用于近地空间(8176,7154)的LDPC码为研究对象,根据归一化最小和译码(Normalized minimum sum,NMS)算法理论,设计了一种尺度因子可改变的LDPC译码器。首先,利用Vivado软件编写寄存器传输级(Register-transfer level,RTL)代码并进行功能仿真。其次,利用Design Compiler工具完成RTL级代码的综合,以生成物理设计需要的门级网表,并通过Innovus工具完成对的芯片后端自动布线(Auto placement route,APR)阶段的设计。在利用Prime Time和Calibre软件分别进行时序检查和物理验证时发现,存在时序违例1132条,设计规则违例647条。以不断迭代的方式进行修复,最终消除了违例,时序和物理设计均满足要求,并生成了GDS II文件。该设计可为芯片国产化生产提供新的思路。
