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An 11-bit 200 MS/s subrange SAR ADC with low-cost integrated reference buffer 被引量:1
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作者 Xiuju He Xian Gu +3 位作者 Weitao Li Hanjun Jiang Fule Li Zhihua Wang 《Journal of Semiconductors》 EI CAS CSCD 2017年第10期84-89,共6页
This paper presents an 11-bit 200MS/s subrange S AR ADC with an integrated reference buffer in 65nm CMOS.The proposed ADC employs a 3.5-bit flash ADC for coarse conversion,and a compact timing scheme at the flash/SAR ... This paper presents an 11-bit 200MS/s subrange S AR ADC with an integrated reference buffer in 65nm CMOS.The proposed ADC employs a 3.5-bit flash ADC for coarse conversion,and a compact timing scheme at the flash/SAR boundary to speed up the conversion.The flash decision is used to control charge compensating for the reference voltage to reduce its input-dependent fluctuation.Measurement results show that the fabricated ADC has achieved significant improvement by applying the reference charge compensation.In addition,the ADC achieves a maximum signal-to-noise-and-distortion ratio of 59.3dB at 200MS/s.It consumes 3.91mW from a 1.2V supply,including the reference buffer. 展开更多
关键词 subrange SAR ADC charge compensation unit(CCU) reference buffer
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A1V 186-μW 50-MS/s 10-bit subrange SAR ADC in 130-nm CMOS process
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作者 余明元 李婷 +3 位作者 杨家琪 张双双 林福江 贺林 《Journal of Semiconductors》 EI CAS CSCD 2016年第7期124-130,共7页
This paper presents a 10-bit 50-MS/s subrange successive-approximation register (SAR) analog-to- digital converter (ADC) composed of a 4-bit SAR coarse ADC and a 6-bit SAR fine ADC. In the coarse ADC, multi- compa... This paper presents a 10-bit 50-MS/s subrange successive-approximation register (SAR) analog-to- digital converter (ADC) composed of a 4-bit SAR coarse ADC and a 6-bit SAR fine ADC. In the coarse ADC, multi- comparator SAR architecture is used to reduce the digital logic propagation delay, and a traditional asynchronous SAR ADC with monotonic switching method is used as the fine ADC. With that combination, power dissipation also can be much reduced. Meanwhile, a modified SAR control logic is adopted in the fine ADC to speed up the conversion and other techniques, such as splitting capacitors array, are borrowed to reduce the power consumption. Fabricated with 1PSM 130-nm CMOS technology, the proposed SAR ADC achieves 51.6-dB signal to noise and distortion ratio (SNDR) and consumes 186μW at 50 MS/s with a 1-V supply, resulting in a figure of merit (FOM) of 12 fJ/conversion-step. The core area is only 0.045 mm2. 展开更多
关键词 SAR ADC low power high speed subrange modified SAR logic
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AN EXPERIMENTAL RESEARCH ON THE INSTABILITY OF NATURAL CONVECTION BOUNDARY LAYER AROUND A VERTICAL HEATED FLAT PLATE 被引量:6
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作者 颜大椿 陶建军 《Acta Mechanica Sinica》 SCIE EI CAS CSCD 1999年第1期1-7,共7页
Experimental results on the instability of the isothermal natural-convection boundary layer around a vertical heated flat plate are presented. It is demonstrated that the characteristics of the instability wave in the... Experimental results on the instability of the isothermal natural-convection boundary layer around a vertical heated flat plate are presented. It is demonstrated that the characteristics of the instability wave in the outer layer is consistent with the calculation of Brewster & Gebhart. Aft;er an initial growth of its low frequency components at the downstream side of the turning point of the neutral curve (Gr approximate to 120) its comparatively higher frequency components develop and become turbulent subsequently with a buoyancy subrange in its power spectra. Simultaneously, in the measurement at the inner layer near the wail a viscous instability signal the same as the Tollmien-Schlichting waves in ordinary boundary layer and its subharmonics in a much higher frequency domain is discovered and an inertial subrange can be observed in the spectra at Gr approximate to 378.6. 展开更多
关键词 natural-convection boundary layer instability transition buoyancy subrange
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A 1-GHz, 7-mW, 8-Bit Subranging ADC without Resistor Ladder Using Built-In Threshold Calibration
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作者 Kenichi Ohhata Wataru Yoshimura +2 位作者 Daiki Tabira Futoshi Shimozono Masataro Iwamoto 《Circuits and Systems》 2014年第4期76-88,共13页
A subranging analog-to-digital converter (ADC) features high-speed and relatively low-power. The limiting factors of power reduction in subranging ADCs are the resistor ladder and the comparator. We propose an ADC arc... A subranging analog-to-digital converter (ADC) features high-speed and relatively low-power. The limiting factors of power reduction in subranging ADCs are the resistor ladder and the comparator. We propose an ADC architecture combining a capacitive digital-to-analog convertor and built-in threshold calibration to eliminate the resistor ladder, resulting in a low-power subranging ADC. We also propose a calibration technique comprising of metal-oxide-metal capacitor, MOS switch, and scaling capacitor to reduce the power consumption of the comparator and an offset drift compensation technique to enable precise foreground calibration. We designed an 8-bit, 1-GHz subranging ADC by applying these techniques, and post-layout simulation results demonstrated a power consumption of 7 mW and figure of merit of 51 fJ/conv.-step. 展开更多
关键词 Analog-to-Digital Convertor Subranging Architecture RESISTOR LADDER Foreground CALIBRATION OFFSET DRIFT
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Experimental study on the local similarity scaling of the turbulence spectrum in the turbulent boundary layer 被引量:1
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作者 XIA ZhenYan JIANG Nan +1 位作者 TIAN Yan WANG YuChun 《Science China(Physics,Mechanics & Astronomy)》 SCIE EI CAS 2009年第6期900-908,共9页
The streamwise fluctuating velocity in the turbulent boundary layer is measured under approximately medium Reynolds Number by hot wire in order to investigate the scaling properties of the overlapped turbulent spectru... The streamwise fluctuating velocity in the turbulent boundary layer is measured under approximately medium Reynolds Number by hot wire in order to investigate the scaling properties of the overlapped turbulent spectrum among energy-containing area, inertial subrange and dissipation range based on FFT analysis. The experiment indicates that the high Reynolds flow reported before is not indispensable to produce -1 scaling. So far as the measured position is provided with much higher spatial resolution and enough closing to the wall, -1 scaling is determinate to exist when approaching medium Reynolds. The scaling ranges are supposed to begin at inner scale and end in outer scale, which reveals the local similarity of the energy spectrum over the energy-containing eddies near the wall. In the logarithmic area (y+ > 130), -5/3 scaling occurs in the energy spectrum, while moving away from the wall with Reynolds numbers increasing, the inertial subrange extends to the lower wavenumbers. On the condition k1η 0.1, the curves of the turbulence spectrum in the logarithmic layer are superposed, which expresses the similarity of turbulence energy distributed in Komogorov scaling area and exhibits local isotropy characteristics by virtue of the viscous dissipation. 展开更多
关键词 turbulent boundary layer -1 spectrum -5/3 spectrum energy-containing eddy inertial subrange local isotropy
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