Substrate bias effects on collector resistance in SiGe heterojunction bipolar transistors on thin film silicon-on-insulator

An analytical expression for the co/lector resistance of a novel vertical SiGe heterojunction bipolar transistor （HBT） on thin film silicon-on-insulator （SOI） is obtained with the substrate bias effects being considered. The resistance is found to decrease slowly and then quickly and to have kinks with the increase of the substrate-collector bias, which is quite different from that of a conventional bulk HBT. The model is consistent with the simulation result and the reported data and is useful to the frequency characteristic design of 0.13 μtm millimeter-wave SiGe SOI BiCMOS devices.

Effect of substrate bias on negative bias temperature instability of ultra-deep sub-micro p-channel metal-oxide-semiconductor field-effect transistors

The effect of substrate bias on the degradation during applying a negative bias temperature （NBT） stress is studied in this paper. With a smaller gate voltage stress applied, the degradation of negative bias temperature instability （NBTI） is enhanced, and there comes forth an inflexion point. The degradation pace turns larger when the substrate bias is higher than the inflexion point. The substrate hot holes can be injected into oxide and generate additional oxide traps, inducing an inflexion phenomenon. When a constant substrate bias stress is applied, as the gate voltage stress increases, an inflexion comes into being also. The higher gate voltage causes the electrons to tunnel into the substrate from the poly, thereby generating the electro,hole pairs by impact ionization. The holes generated by impact ionization and the holes from the substrate all can be accelerated to high energies by the substrate bias. More additional oxide traps can be produced, and correspondingly, the degradation is strengthened by the substrate bias. The results of the alternate stress experiment show that the interface traps generated by the hot holes cannot be annealed, which is different from those generated by common holes.

Influence of substrate bias voltage on the microstructure of nc-SiO_x:H film

Amorphous silicon oxide containing nanocrystalline silicon grain（nc-SiOx：H） films are prepared by a plasmaenhanced chemical vapor deposition technique at different negative substrate bias voltages.The influence of the bias voltage applied to the substrate on the microstructure is investigated.The analysis of x-ray diffraction spectra evidences the in situ growth of nanocrystalline Si.The grain size can be well controlled by varying the substrate bias voltage,and the largest size is obtained at 60 V.Fourier transform infrared spectra studies on the microstructure evolutions of the nc-SiOx：H films suggest that the absorption peak intensities,which are related to the defect densities,can be well controlled.It can be attributed to the fact that the negative bias voltage provides a useful way to change the energies of the particles in the deposition process,which can provide sufficient driving force for the diffusion and movement for the species on the growing surface and effectively passivate the dangling bonds.Also the larger grain size and lower band gap,which will result in better photosensitivity,can also be obtained with a moderate substrate bias voltage of 60 V.

Effect of Frequency and Power of Bias Applied to Substrate on Plasma Property of Very-High-Frequency Magnetron Sputtering

The effect of the frequency and power of the bias applied to the substrate on plasma properties in 60 MHz（VHF） magnetron sputtering was investigated.The plasma properties include the ion velocity distribution function（IVDF）,electron energy probability function（EEPF）,electron density ne,ion flux Γi,and effective electron temperature Teff.These parameters were measured by a retarding field energy analyzer and a Langmuir probe in the 60 MHz magnetron sputtering,assisted with 13.56 MHz or 27.12 MHz substrate bias.The 13.56 MHz substrate bias led to broadening and multi-peaks IVDFs,Maxwellian EEPFs,as well as high electron density,ion flux,and low electron temperature.The 27.12 MHz substrate bias led to a further increase of electron density and ion flux,but made the IVDFs narrow.Therefore,the frequency of the substrate bias was a possible way to control the plasma properties in VHF magnetron sputtering.

A Study on the Tuned Bias of Substrate in an Inductively-coupled Plasma Source

in an inductively-coupled plasma (ICP), the dependence of radio-frequency (rf) tuned self-DC bias of substrate on the discharge parameters such as rf source power, gas pressure, gas now rate and electric connection of upper cover with ground have been studied. Experimental results show that the tuned bias of substrate can be generated and independently controlled in an inductively- coupled plasma without a rf bias source, and the advantage of this technique together with inductively-coupled plasma can find potential applications in plasma-enhanced chemical vapor deposition.

Influence of dc bias on amorphous carbon deposited by pulse laser ablation

Amorphous carbon films were deposited on single-crystalline silicon and K9glass by pulse laser ablation using different negative substrate bias. Scanning electron microscope(SEM) was used to observe morphology of the surface. Thickness and refractive index of the filmdeposited on K9 glass were measured by ellipsometry. Micro-hardness of films was measured relativelyto single crystal silicon. All films deposited on silicon were analyzed by Raman spectra. Allspectra were deconvoluted to three peaks. Line-width ratios varied similarly with bias voltage whenthe laser energy was kept invariant.

Influence of Substrate Negative Bias on Structure and Properties of TiN Coatings Prepared by Hybrid HIPIMS Method

TiN coatings were deposited using a hybrid home-made high power impulse magnetron sputtering(HIPIMS)technique at room temperature.The effects of substrate negative bias voltage on the deposition rate,composition,crystal structure,surface morphology,microstructure and mechanical properties were investigated.The results revealed that with the increase in bias voltage from-50 to-400 V,TiN coatings exhibited a trend of densification and the crystal structure gradually evolved from(111) orientation to(200)orientation.The growth rate decreased from about 12.2 nm to 7.8 nm per minute with the coating densification.When the bias voltage was-300 V,the minimum surface roughness value of 10.1 nm was obtained,and the hardness and Young’s modulus of TiN coatings reached the maximum value of 17.4 GPa and 263.8 GPa,respectively.Meanwhile,the highest adhesion of 59 N was obtained between coating and substrate.

Three-dimensional Monte Carlo simulation of bulk fin field effect transistor

In this paper, we investigate the performance of the bulk fin field effect transistor （FinFET） through a three- dimensional （3D） full band Monte Carlo simulator with quantum correction. Several scattering mechanisms, such as the acoustic and optical phonon scattering, the ionized impurity scattering, the impact ionization scattering and the surface roughness scattering are considered in our simulator. The effects of the substrate bias and the surface roughness scattering near the Si/SiO2 interface on the performance of bulk FinFET are mainly discussed in our work. Our results show that the on-current of bulk FinFET is sensitive to the surface roughness and that we can reduce the substrate leakage current by modulating the substrate bias voltage.

Substrate-bias effect on the breakdown characteristic in a new silicon high-voltage device structure

A novel silicon double-RESURF LDMOS structure with an improved breakdown characteristic by substrate bias technology（SB） is reported.The P-type epitaxial layer is embedded between an N-type drift region and an N-type substrate to block the conduction path in the off-state and change the distributions of the bulk electric field.The substrate bias strengthens the charge share effect of the drift region near the source,and the vertical electric field peak under the drain is decreased,which is especially helpful in improving the vertical breakdown voltage in a lateral power device with a thin drift region.The numerical results by MEDICI indicate that the breakdown voltage of the proposed device is increased by 97%compared with a conventional LDMOS,while maintaining a low on-resistance.

Tribological properties of multilayer tetrahedral amorphous carbon coatings deposited by filtered cathodic vacuum arc deposition

Tetrahedral amorphous carbon(ta‐C)has emerged as an excellent coating material for improving the reliability of application components under high normal loads.Herein,we present the results of our investigations regarding the mechanical and tribological properties of a 2‐μm‐thick multilayer ta‐C coating on high‐speed steel substrates.Multilayers composed of alternating soft and hard layers are fabricated using filtered a cathodic vacuum arc with alternating substrate bias voltages(0 and 100 V or 0 and 150 V).The thickness ratio is discovered to be 1:3 for the sp2‐rich and sp3‐rich layers.The results show that the hardness and elastic modulus of the multilayer ta‐C coatings increase with the sp3 content of the hard layer.The hardness reached approximately 37 GPa,whereas an improved toughness and a higher adhesion strength(>29 N)are obtained.The friction performance(μ=0.07)of the multilayer coating is similar to that of the single layer ta‐C thick coating,but the wear rate(0.13×10^(–6) mm^(3)/(N∙m))improved under a high load of 30 N.We further demonstrate the importance of the multilayer structure in suppressing crack propagation and increasing the resistance to plastic deformation(H3/E2)ratio.