Low specific on-resistance GaN-based vertical heterostructure field effect transistors with nonuniform doping superjunctions

A novel Ga N-based vertical heterostructure field effect transistor（HFET） with nonuniform doping superjunctions（non-SJ HFET） is proposed and studied by Silvaco-ATLAS,for minimizing the specific on-resistance（RonA） at no expense of breakdown voltage（BV）.The feature of non-SJ HFET lies in the nonuniform doping concentration from top to bottom in the n-and p-pillars,which is different from that of the conventional Ga N-based vertical HFET with uniform doping superjunctions（un-SJ HFET）.A physically intrinsic mechanism for the nonuniform doping superjunction（non-SJ） to further reduce RonA at no expense of BV is investigated and revealed in detail.The design,related to the structure parameters of non-SJ,is optimized to minimize the RonA on the basis of the same BV as that of un-SJ HFET.Optimized simulation results show that the reduction in RonA depends on the doping concentrations and thickness values of the light and heavy doping parts in non-SJ.The maximum reduction of more than 51% in RonA could be achieved with a BV of 1890 V.These results could demonstrate the superiority of non-SJ HFET in minimizing RonA and provide a useful reference for further developing the Ga N-based vertical HFETs.

A novel SiC high-k superjunction power MOSFET integrated Schottky barrier diode with improved forward and reverse performance

A new SiC superjunction power MOSFET device using high-k insulator and p-type pillar with an integrated Schottky barrier diode(Hk-SJ-SBD MOSFET)is proposed,and has been compared with the SiC high-k MOSFET(Hk MOSFET),SiC superjuction MOSFET(SJ MOSFET)and the conventional SiC MOSFET in this article.In the proposed SiC Hk-SJ-SBD MOSFET,under the combined action of the p-type region and the Hk dielectric layer in the drift region,the concentration of the N-drift region and the current spreading layer can be increased to achieve an ultra-low specific on-resistance(Ron,sp).The integrated Schottky barrier diode(SBD)also greatly improves the reverse recovery performance of the device.TCAD simulation results indicate that the Ron,sp of the proposed SiC Hk-SJ-SBD MOSFET is 0.67 mΩ·cm^(2)with a 2240 V breakdown voltage(BV),which is more than 72.4%,23%,5.6%lower than that of the conventional SiC MOSFET,Hk SiC MOSFET and SJ SiC MOSFET with the 1950,2220,and 2220V BV,respectively.The reverse recovery time and reverse recovery charge of the proposed MOSFET is 16 ns and18 nC,which are greatly reduced by more than 74%and 94%in comparison with those of all the conventional SiC MOSFET,Hk SiC MOSFET and SJ SiC MOSFET,due to the integrated SBD in the proposed MOSFET.And the trade-off relationship between the Ron,sp and the BV is also significantly improved compared with that of the conventional MOSFET,Hk MOSFET and SJ MOSFET as well as the MOSFETs in other previous literature,respectively.In addition,compared with conventional SJ SiC MOSFET,the proposed SiC MOSFET has better immunity to charge imbalance,which may bring great application prospects.

降低功率MOSFET导通电阻R_(ON)的研究进展

本文综述了降低功率MOSFET导通电阻的研究进展,从打破硅极限与降低沟道电阻两方面入手,介绍与分析了降低的各种新结构、新思想,并对其进行比较。最后,列出了其它降低导通电阻的方法。

A novel high performance TFS SJ IGBT with a buried oxide layer

A novel high performance trench field stop （TFS） superjunction （S J） insulated gate bipolar transistor （IGBT） with a buried oxide （BO） layer is proposed in this paper. The BO layer inserted between the P-base and the SJ drift region acts as a barrier layer for the hole-carrier in the drift region. Therefore, conduction modulation in the emitter side of the SJ drift region is enhanced significantly and the carrier distribution in the drift region is optimized for the proposed structure. As a result, compared with the conventional TFS SJ IGBT （Conv-SJ）, the proposed BO-SJ IGBT structure possesses a drastically reduced on-state voltage drop （gce（on）） and an improved tradeoff between gee（on） and turn-off loss （Eoff）, with no breakdown voltage （BV） degraded. The results show that with the spacing between the gate and the BO layer Wo = 0.2 μm, the thickness of the BO layer Lo = 0.2 μm, the thickness of the drift region Ld = 90 μm, the half width and doping concentration of the N- and P-pillars Wn = Wp = 2.5μm and Nn = Np = 3 × 10^15 cm^-3, the Vce（on） and Eoff of the proposed structure are 1.08 V and 2.81 mJ/cm2 with the collector doping concentration Nc = 1 × 10^18 cm^-3 and 1.12 V and 1.73 mJ/cm2 with Nc = 5 × 10^17 cm^-3, respectively. However, with the same device parameters, the Vce（on） and Eoff for the Conv-SJ are 1.81 V and 2.88 mJ/cm2 with Nc= 1 × 10^18 cm^-3 and 1.98 V and 2.82 mJ/cm2 with Nc = 5 ×10^17 cm^-3, respectively. Meanwhile, the BV of the proposed structure and Conv-SJ are 1414 V and 1413 V, respectively.

A novel superjunction MOSFET with improved ruggedness under unclamped inductive switching

The ruggedness of a superjunction metal-oxide semiconductor field-effect transistor （MOSFET） under unclamped inductive switching conditions is improved by optimizing the avalanche current path. Inserting a P-island with relatively high doping concentration into the P-column, the avalanche breakdown point is localized. In addition, a trench type P＋ contact is designed to shorten the current path. As a consequence, the avalanche current path is located away from the N＋ source/P-body junction and the activation of the parasitic transistor can be effectively avoided. To verify the proposed structural mechanism, a two-dimensional （2D） numerical simulation is performed to describe its static and on-state avalanche behaviours, and a method of mixed-mode device and circuit simulation is used to predict its performances under realistic unclanlped inductive switching. Simulation shows that the proposed structure can endure a remarkably higher avalanche energy compared with a conventional superjunction MOSFET.

A review of manufacturing technologies for silicon carbide superjunction devices

Superjunction technology is believed to reach the optimal specific on-resistance and breakdown voltage trade-off.It has become a mainstream technology in silicon high-voltage metal oxide semiconductor field effect transistor devices.Numerous efforts have been conducted to employ the same concept in silicon carbide devices.These works are summarized here.

Impact of Latest Power Devices for PV Inverters

Excellent electrical properties and the impact of latest power devices for improving the efficiency of photovohaic（PV） inverters are presented.Power modules using SiC-MOSFET and SBD exhibit the possibility to realize PV inverters with peak efficiency beyond 99%.Si-IGBT modules using reverse-blocking（RB）-IGBT have enabled to massproduce PV inverters with peak efficiency of 98.4%.Si superjunction（SJ）-MOSFET and discrete IGBT have enabled to improve the efficiency of small power PV inverters by 0.5 point.

Superjunction nanoscale partially narrow mesa IGBT towards superior performance

We present a detailed study of a superjunction （S J） nanoscale partially narrow mesa （PNM） insulated gate bipolar transistor （IGBT） structure. This structure is created by combining the nanoscale PNM structure and the SJ structure together. It demonstrates an ultra-low saturation voltage （Vce（sat）） and low turn-off loss （Eoff） while maintaining other device parameters. Compared with the conventional 1.2 kV trench IGBT, our simulation result shows that the gce（sat） of this structure decreases to 0.94 V, which is close to the theoretical limit of 1.2 kV IGBT, Meanwhile, the fall time decreases from 109.7 ns to 12 ns and the Eoff is down to only 37% of that of the conventional structure. The superior tradeoff characteristic between Vce（sat） and Eoff is presented owing to the nanometer level mesa width and SJ structure. Moreover, the short circuit degeneration phenomenon in the very narrow mesa structure due to the collector-induced barriers lowering （CIBL） effect is not observed in this structure. Thus, enough short circuit ability can be achieved by using wide, floating P-well technique. Based on these structure advantages, the SJ-PNM-IGBT with nanoscale mesa width indicates a potentially superior overall performance towards the IGBT parameter limit.

Superjunction 4H-SiC trench-gate IGBT with an integrated clamping PN diode

In this paper,a novel superjunction 4H-silicon carbide(4H-SiC)trench-gate insulated-gate bipolar transistor(IGBT)featuring an integrated clamping PN diode between the P-shield and emitter(TSD-IGBT)is designed and theoretically studied.The heavily doping superjunction layer contributes to a low specific on-resistance,excellent electric field distribution,and quasi-unipolar drift current.The anode of the clamping diode is in floating contact with the P-shield.In the on-state,the potential of the P-shield is raised to the turn-on voltage of the clamping diode,which prevents the hole extraction below the N-type carrier storage layer(NCSL).Additionally,during the turn-off transient,once the clamping diode is turned on,it also promotes an additional hole extraction path.Furthermore,the potential dropped at the semiconductor near the trench-gate oxide is effectively reduced in the off-state.

电荷非平衡super junction结构电场分布

建立了电荷非平衡情况下superjunction(SJ)耐压结构的二维电场分布理论模型.获得了浓度和宽度非平衡、梯形n-/p-区和横向线性缓变掺杂三种非平衡SJ结构的电场分布.理论分析结果与二维器件数值仿真软件MEDICI的仿真结果符合良好.虽然给出的电场分布为三角级数形式,但仍能从中获得很多重要信息.特别地,由此可求出非平衡SJ结构的峰值电场和耐压.该结果有助于对SJ结构的深入分析.

Above 700 V superjunction MOSFETs fabricated by deep trench etching and epitaxial growth

Silicon superjunction power MOSFETs were fabricated with deep trench etching and epitaxial growth,based on the process platform of the Shanghai Hua Hong NEC Electronics Company Limited.The breakdown voltages of the fabricated superjunction MOSFETs are above 700 V and agree with the simulation.The dynamic characteristics, especially reverse diode characteristics,are equivalent or even superior to foreign counterparts.

An optically controlled SiC lateral power transistor based on SiC/SiCGe superjunction structure

An optically controlled SiC/SiCGe lateral power transistor based on superjunction structure has been proposed, in which n-SiCGe/p-SiC superjunction structure is employed to improve device figure of merit. Performance of the novel optically controlled power transistor was simulated using Silvaco Atlas tools, which has shown that the device has a very good response to the visible light and the near infrared light. The optoelectronic responsivities of the device at 0.5 μm and 0.7 μm are 330 mA/W and 76.2 mA/W at 2 V based voltage, respectively.

Review of Technologies for High-Voltage Integrated Circuits

High-Voltage power Integrated Circuits(HVICs) are widely used to realize high-efficiency power conversions(e.g., AC/DC conversion), gate drivers for power devices and LED lighting, and so on. The Bipolar-CMOS-DMOS(BCD) process is proposed to fabricate devices with bipolar, CMOS, and DMOS modes, and thereby realize the single-chip integration of HVICs. The basic integrated technologies of HVICs include High-Voltage(HV) integrated device technology, HV interconnection technology, and isolation technology. The HV integrated device is the core of HVICs. The basic requirements of the HV integrated device are high breakdown voltage, low specific on-resistance,and process compatibility with low-voltage circuits. The REduced SURFace field(RESURF) technology and junction termination technology are developed to optimize the surface field of integration power devices and breakdown voltage. Furthermore, the ENhanced DIelectric layer Field(ENDIF) and REduced BULk Field(REBULF) technologies are proposed to optimize bulk fields. The double/triple RESURF technologies are further developed, and the superjunction concept is introduced to integrated power devices and to reduce the specific on-resistance. This work presents a comprehensive review of these technologies, including the innovation technologies of the authors’ group,such as ENDIF and REBULF, substrate termination technology prospective integrated technologies and HVICs in wide band gap semiconductor materials are also discussed.

An analytical model of the electric field distributions of buried superjunction devices

An analytical model of the electric field distributions of buried superjunction structures,based on the charge superposition method and Green＇s function approach,is derived.An accurate approximation of the exact analytical model of the vertical electric field is also proposed and demonstrated by numerical simulation.The influence of the dimension and doping concentration of each layer on the electric field is discussed in detail,and the breakdown voltage is demonstrated by simulations.

A superjunction structure using high-k insulator for power devices:theory and optimization

A superjunction（SJ） structure using a high-k（Hk） insulator is studied and optimized by using an analytic model.Results by using the proposed model match well with that of numerical calculations.Numerical calculation results show that,only needing an Hk insulator with a permittivity of ε_I=5ε_S,the optimum specific on-resistance of the MOSFET applying the proposed structure is about 8%-20%lower than that of the conventional SJ-MOSFET with V_B = 200-1000 V.An example with V_B = 400 V shows that,the permissible error range of doping concentration of the p-region to maintain above 80%of V_B is from —37%to ＋32%for the former and is only from-13%to ＋13%for the latter.