A Design of the Elliptic Switched Current Filter

In conformity with a fifth order RLC elliptic filter circuit prototype, it is easy to conceive the corresponding RC active filter circuit. Simple and feasible method presented here can be used to contrive the equivalent switched capacitor filter circuit and switched current filter circuit. Consulting the technique data manual, we can expediently design a specific RLC filter. Therefore, it is of great convenience to design the switched current filter, which has the same performances. Such a kind of technology is useful in the domain of analogue sampled data signal processing.

Dependence of Switching Current Distribution of a Current-Biased Josephson Junction on Microwave Frequency

We investigate the distribution of the switching current of a current-biased Josephson junction （CBJJ） and its dependence on the microwave frequency using two theoretical methods, one of which is the quantum trajectory method and the other is the master equation method. Both the methods show that the distribution of the switching current of CBJJ will exhibit double peaks in a certain range of microwave frequency if proper microwave power is given, and the gap between the two peaks will increase with the microwave frequency. The obtained results can be used to identify the energy difference of the ground and first excited states in a Josephson junction for any bias current.

Design and Experimentation of FPGA-Based Soft-Switched Interleaved Boost Converter for Telecommunication System

This paper proposes the design and experimentation of digital control of soft-switched interleaved boost converter using FPGA for Telecommunication System. The switching devices in the proposed converter are turned on and off with Zero Voltage Switching (ZVS) and Zero Current Switching (ZCS) respectively. The circuit is operated in Continuous Conduction Mode (CCM) with various load ranges having duty cycle of more than 50%. The proposed converter is studied by developing the simulation module in MATLAB/SIMULINK. A PI controller is designed and implemented in FPGA to obtain a regulated DC output for line and load variations. Simulation and experimentation results are verified with a prototype development of the proposed converter. The results indicate that the converter performance is enhanced with closed loop control.

Study of Star-Delta Soft Switch to Extend AC Motor High Speed Operation Region

In traction application,speed range of motor is an important index for motor drives.In AC motor control,the maximum speed of the motor is limited by the output voltage capability of the traditional three-phase inverter with star connenction of windings.Switching the star connection to delta connection in high-speed range can extend the speed range.In order to extend the speed operation region,star-delta switch proposed by many literatures relies on mechanical relay,which needs a dead zone of tens of milliseconds and seriously affects torque output.Besides,the traditional method will cause current overshoot during the switch transient process,decreasing the device security and reliability.Aiming at the defects existing in the star-delta hard switching,this paper proposes a star-delta soft switching method.Without adding extra power electronics devices,DC-bus capacitor is used to provide the path of zero axis current in the transient process,which helps to achieve the smooth torque output and zero current switch in the transient.Experiments have been done to validate the performance of the proposed method.The switching transient from star to delta connection in the motor drive can be much more stable than hard switching method.

Selection of Carrier Waveforms for PWM Inverter

In this paper the influence of different carrier waveforms upon the output characteristics of PWM inverter is described in detail. When a triangular carrier waveform is used in hard-switching PWM inverters, harmonics exist in the neighborhood of the output frequency of the inverter output voltage and current due to the dead time. The triangular carrier waveform used in soft-switching PWM inverter will cause difficulties in controlling resonance-trigger time, higher loss in the resonant circuit, and less utilization of the DC bus voltage. If a sawtooth carrier is used in hard-switching PWM inverter, there will be severe distortion in the current waveform. When sawtooth carriers with alternate positive and negative slopes are used in soft-switching PWM inverters, the resonance-trigger time is easy to control, and distortion in the output voltage and current caused by the dead time will not appear.

Integration of high-performance spin-orbit torque MRAM devices by 200-mm-wafer manufacturing platform

We demonstrate in-plane field-free-switching spin-orbit torque(SOT)magnetic tunnel junction(MTJ)devices that are capable of low switching current density,fast speed,high reliability,and,most importantly,manufactured uniformly by the 200-mm-wafer platform.The performance of the devices is systematically studied,including their magnetic properties,switch-ing behaviors,endurance and data retention.The successful integration of SOT devices within the 200-mm-wafer manufactur-ing platform provides a feasible way to industrialize SOT MRAMs.It is expected to obtain excellent performance of the devices by further optimizing the MTJ film stacks and the corresponding fabrication processes in the future.

Application research on ZVZCS full-bridge converter technique

Based on ZVZCS （zero voltage zero current switching） full bridge converter technique, a novel inverter welding power supply is designed, in which the secondary side of the transformer adopts passive clamping circuit to reduce voltage stress of rectifying components. This supply can realize power switches ZVS （zero voltage switching ） or ZCS （zero current switching） within a very wide range of load; Only through setting up blocking capacitor in the primary side of transformer, the power transformer＇s bias in the full-bridge converter is suppressed and the primary current can be reset easily. In addition, how to calculate the blocking capacitor and its influence to power supply performance are also subjects discussed in this paper.

Analysis of a novel phase-shifted soft switch converter

In this paper, on the basis of the phase shifted controlled zero voltage switch (ZVS) full bridge converter with pulse width modulation (PWM), a novel zero voltage and zero current switch (ZVZCS) PWM converter using a simple auxiliary circuit was designed. The ZVZCS soft switch is achieved by the resonance among the resisting electromagnetic deflection capacitor, the capacitor of the simple auxiliary network and the leakage inductor of transformer. There are no dissipation devices of the saturation inductor and the auxiliary switch in the converter, meantime the capacitor of the auxiliary circuit is also used to clamp the voltage of the rectifier, and there is no additional clamped circuit. There is no big circulating current in the converter, all the active and passive devices work on the condition of the low current and voltage stress, and the proposed converter has wide load range and small duty loss.

A State Space Modeling of Non-Isolated Bidirectional DC-DC Converter with Active Switch

In this paper, analysis, design and implementation of non-isolated soft-switching bidirectional DC-DC converter with an active switch are described. The proposed topology gives the output voltage as twice as the input voltage and enhances the efficiency up to 94.5% and 92.9% for boost and buck mode operation by proper selection of the duty cycle. Soft switching can be achieved at both steps up and step down operating modes. Small signal analysis based on state space averaging and transfer functions have been presented in detail for the proposed converter. Finally, the feasibility of the desired converter is confirmed to mat lab simulation and investigational results.

Analysis and Implementation of Dual-ZCS forward DC/DC Converter

As the switching frequency in DC/DC converter increases, original ‘hard-switch’ working mode is not compatible. Another problem is the reliability, which is puzzled in single-ended forward, push-pull or bridge-like structures. In this paper, a new dual-ZCS (zero current switches) forward topology is proposed. The operating principle of soft-switch is analyzed, showing the relationship between voltage and current in time domain. Then how to calculate the key parameters of resonant network is . Finally, a prototype ZCS SMPS is implemented and tested. The results consisted with the analyzing results well, and illustrated the advantages of the proposed structure.

A differential low-voltage high gain current-mode integrated RF receiver front-end

A differential low-voltage high gain current-mode integrated RF front end for an 802.1 lb WLAN is proposed. It contains a differential transeonductance low noise amplifier （Gm-LNA） and a differential current- mode down converted mixer. The single terminal of the Gm-LNA contains just one MOS transistor, two capacitors and two inductors. The gate source shunt capacitors, Cx1 and Cx2, can not only reduce the effects of gate-source Cgs on resonance frequency and input-matching impedance, but they also enable the gate inductance Lgl,2 to be selected at a very small value. The current-mode mixer is composed of four switched current mirrors. Adjusting the ratio of the drain channel sizes of the switched current mirrors can increase the gain of the mixer and accordingly increase the gain of RF receiver front-end. The RF front-end operates under 1 V supply voltage. The receiver RFIC was fabricated using a chartered 0. 18 μm CMOS process. The integrated RF receiver front-end has a measured power conversion gain of 17.48 dB and an input referred third-order intercept point （IIP3） of-7.02 dBm. The total noise figure is 4.5 dB and the power is only 14 mW by post-simulations.

A high linearity current mode second IF CMOS mixer for a DRM/DAB receiver

A passive current switch mixer was designed for the second IF down-conversion in a DRM/DAB re- ceiver. The circuit consists of an input transconductance stage, a passive current switching stage, and a current amplifier stage. The input transconductance stage employs a self-biasing current reusing technique, with a resistor shunt feedback to increase the gain and output impedance. A dynamic bias technique is used in the switching stage to ensure the stability of the overdrive voltage versus the PVT variations. A current shunt feedback is introduced to the conventional low-voltage second-generation fully balanced multi-output current converter （FBMOCCII）, which provides very low input impedance and high output impedance. With the circuit working in current mode, the linearity is effectively improved with low supply voltages. Especially, the transimpedance stage can be re- moved, which simplifies the design considerably. The design is verified with a SMIC 0.18μm RF CMOS process. The measurement results show that the voltage conversation gain is 1.407 dB, the NF is 16.22 dB, and the IIP3 is 4.5 dBm, respectively. The current consumption is 9.30 mA with a supply voltage of 1.8 W. This exhibits a good compromise among the gain, noise, and linearity for the second IF mixer in DRM/DAB receivers.

Performance analysis of STT-RAM with cross shaped free layer using Heusler alloys

We have investigated the performance of a spin transfer torque random access memory （STT-RAM） cell with a cross shaped Heusler compound based free layer using micromagnetic simulations. We have designed a free layer using a Cobalt based Heusler compound. Simulation results clearly show that the switching time from one state to the other state has been reduced, also it has been found that the critical switching current density （to switch the magnetization of the free layer of the STT RAM cell） is reduced.

A 5 GHz 7.2 dB NF low power direct conversion receiver front-end with balun LNA

A 5GHz low power direct conversion receiver radio frequency front-end with balun LNA is presented. A hybrid common gate and common source structure balun LNA is adopted, and the capacitive cross-coupling technique is used to reduce the noise contribution of the common source transistor. To obtain low 1/f noise and high linearity, a current mode passive mixer is preferred and realized. A current mode switching scheme can switch between high and low gain modes, and meanwhile it can not only perform good linearity but save power consump- tion at low gain mode. The front-end chip is manufactured on a 0.13-#m CMOS process and occupies an active chip area of 1.2 mm2. It achieves 35 dB conversion gain across 4.9-5.1 GHz, a noise figure of 7.2 dB and an IIP3 of -16.8 dBm, while consuming 28.4 mA from a 1.2 V power supply at high gain mode. Its conversion gain is 13 dB with an IIP3 of 5.2 dBm and consumes 21.5 mA at low gain mode.