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A NEW MULTIFUNCTION SWITCHED-CURRENT FILTER
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作者 吴杰 《Journal of Electronics(China)》 1993年第1期41-45,共5页
A new switched-current(SI)biquadratic filter is presented which can simultaneouslyprovide the low-pass,high-pass and band-pass filters in a single building block.A symbol torepresent the universal SI integrator is als... A new switched-current(SI)biquadratic filter is presented which can simultaneouslyprovide the low-pass,high-pass and band-pass filters in a single building block.A symbol torepresent the universal SI integrator is also introduced.It can simplify the analysis and synthesisof SI networks. 展开更多
关键词 ACTIVE FILTERS switched-current CIRCUIT THEORY and design
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SWITCHED-CURRENT FILTER DESIGN USING CASCADED SECTIONS
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作者 吴杰 《Journal of Electronics(China)》 1993年第3期273-278,共6页
A new analogue sampled-data active device, named as a switched-current operationalamplifier (SIOA), is presented. The use of active circuit elements may simplify drawing the circuitdiagram significantly greatly and ma... A new analogue sampled-data active device, named as a switched-current operationalamplifier (SIOA), is presented. The use of active circuit elements may simplify drawing the circuitdiagram significantly greatly and may permit easier analysis and synthesis of SI networks. Anumber of all pole and elliptic (second-or third-order) switched-current (SI) filters are derivedfrom the switched capacitor prototypes. These can be used as simple self-contained filters or asfilter sections in the cascaded realizations of a higher order transfer functions. To illustrate theapproach, a fifth-order low-pass filter is designed. 展开更多
关键词 CIRCUIT THEORY and DESIGN switched-current ACTIVE FILTER
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Discrete-Time Chaotic Circuits for Implementation of Tent Map and Bernoulli Map 被引量:1
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作者 李志忠 丘水生 《Journal of Electronic Science and Technology of China》 2005年第3期249-252,共4页
Discrete-time chaotic circuit implementations of a tent map and a Bernoulli map using switched-current (SI) techniques are presented. The two circuits can be constructed with 16 MOSFET's and 2 capacitors. The simul... Discrete-time chaotic circuit implementations of a tent map and a Bernoulli map using switched-current (SI) techniques are presented. The two circuits can be constructed with 16 MOSFET's and 2 capacitors. The simulations and experiments built with commercially available IC's for the circuits have demonstrated the validity of the circuit designs. The experiment results also indicate that the proposed circuits are integrable by a standard CMOS technology. The implementations are useful for studies and applications of chaos. 展开更多
关键词 chaotic circuit switched-current tent map Bernoulli map
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Test Mismatch in Switched-Current Circuits Using Wavelet Analysis
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作者 郭杰荣 何怡刚 +2 位作者 刘美容 唐圣学 李宏民 《Tsinghua Science and Technology》 SCIE EI CAS 2007年第S1期229-234,共6页
Errors of mismatch and currents calibration caused by channel geometrical variety in switchedcurrent are investigated in this paper. The relation and computing of mismatch and sensitivity are discussed also, and then ... Errors of mismatch and currents calibration caused by channel geometrical variety in switchedcurrent are investigated in this paper. The relation and computing of mismatch and sensitivity are discussed also, and then a measure method of switched current mismatch using wavelet decomposition is proposed. A selected group of same transconductance is choosing as a cohort firstly, and the sensitivities of cohort in relation to the variation of transconductance are computed. Compared with the nominal deviation and tolerance borderline, the optimization and testing can be performed. As an example, a sixth order chebyshev low-pass filter is simulated and tested. The results have justified the reliability and feasibility of the method. 展开更多
关键词 switched-current MISMATCH sensitivity cohort parameter WAVELET DECOMPOSITION
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Threshold logic based low-level vision sparse object features
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作者 Nitha Thomas Joshin John Mathew Alex James 《International Journal of Intelligent Computing and Cybernetics》 EI 2016年第4期314-324,共11页
Purpose-The real-time generation of feature descriptors for object recognition is a challenging problem.In this research,the purpose of this paper is to provide a hardware friendly framework to generate sparse feature... Purpose-The real-time generation of feature descriptors for object recognition is a challenging problem.In this research,the purpose of this paper is to provide a hardware friendly framework to generate sparse features that can be useful for key feature point selection,feature extraction,and descriptor construction.The inspiration is drawn from feature formation processes of the human brain,taking into account the sparse,modular,and hierarchical processing of visual information.Design/methodology/approach-A sparse set of neurons referred as active neurons determines the feature points necessary for high-level vision applications such as object recognition.A psycho-physical mechanism of human low-level vision relates edge detection to noticeable local spatial stimuli,representing this set of active neurons.A cognitive memory cell array-based implementation of low-level vision is proposed.Applications of memory cell in edge detection are used for realizing human vision inspired feature selection and leading to feature vector construction for high-level vision applications.Findings-True parallel architecture and faster response of cognitive circuits avoid time costly and redundant feature extraction steps.Validation of proposed feature vector toward high-level computer vision applications is demonstrated using standard object recognition databases.The comparison against existing state-of-the-art object recognition features and methods shows an accuracy of 97,95,69 percent for Columbia Object Image Library-100,ALOI,and PASCAL VOC 2007 databases indicating an increase from benchmark methods by 5,3 and 10 percent,respectively.Originality/value-A hardware friendly low-level sparse edge feature processing system isproposed for recognizing objects.The edge features are developed based on threshold logic of neurons,and the sparse selection of the features applies a modular and hierarchical processing inspired from the human neural system. 展开更多
关键词 Object recognition Object features Sparse features Threshold logic Low-level vision Active neurons Cognitive memory-cell array Edge detection Feature description
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