The 3780-point FFT is a main component of the time domain synchronous OFDM （TDS-OFDM） system and the key technology in the Chinese Digital Multimedia/TV Broadcasting-Terrestrial （DMB-T） national standard. Sinc, e ...The 3780-point FFT is a main component of the time domain synchronous OFDM （TDS-OFDM） system and the key technology in the Chinese Digital Multimedia/TV Broadcasting-Terrestrial （DMB-T） national standard. Sinc, e 3780 is not a power of 2, the classical radix-2 or radix-4 FFT algorithm cannot be applied directly. Hence, the Winograd Fourier transform algorithm （WFTA） and the Good-Thomas prime factor algorithm （PFA） are used to implement the 3780-point FFT processor. However, the structure based on WFTA and PFA has a large computational complexity and requires many DSPs in hardware implementation. In this paper, a novel 3780-point FFT processor scheme is proposed, in which a 60x63 iterative WFTA architecture with different mapping methods is imported to replace the PFA architecture, and an optimized CoOrdinate Rotation Digital Computer （CORDIC） module is used for the twiddle factor multiplications. Compared to the traditional scheme, our proposed 3780-point FFT processor scheme reduces the number of multiplications by 45% at the cost of 1% increase in the number of additions. All DSPs are replaced by the optimized CORDIC module and ROM. Simulation results show that the proposed 3780-point FFT processing scheme satisfies the requirement of the DMB-T standard, and is an efficient architecture for the TDS-OFDM system.展开更多
Powerline communications （PLC） have drawn great interest in recent years. However, most PLC standards such as HomePlug AV use the cyclic-prefix OFDM （CP-OFDM） technology. This paper presents a broadband PLC system...Powerline communications （PLC） have drawn great interest in recent years. However, most PLC standards such as HomePlug AV use the cyclic-prefix OFDM （CP-OFDM） technology. This paper presents a broadband PLC system using low density parity check （LDPC） coded time domain synchronous OFDM （TDS-OFDM）, whose spectrum efficiency is about 10% higher than that of CP-OFDM. With the same bandwidth and the ability to combat the time delay spread as HomePlug AV, this system can provide a maximum throughput of 199.7 Mbps physical layer data rate. Simulations over the measured practical powerline channel in Beijing, China, show that LDPC in the TDS-OFDM system dramatically improves the bit error rate performance, and verify the feasibility and performance of the TDS-OFDM technology for PLC systems.展开更多
基金Project supported by the National Natural Science Foundation of China (No.61071129)the Science and Technology Department of Zhejiang Province,China (Nos.2008C21088,2011R10035,and 2011R09003-06)
文摘The 3780-point FFT is a main component of the time domain synchronous OFDM （TDS-OFDM） system and the key technology in the Chinese Digital Multimedia/TV Broadcasting-Terrestrial （DMB-T） national standard. Sinc, e 3780 is not a power of 2, the classical radix-2 or radix-4 FFT algorithm cannot be applied directly. Hence, the Winograd Fourier transform algorithm （WFTA） and the Good-Thomas prime factor algorithm （PFA） are used to implement the 3780-point FFT processor. However, the structure based on WFTA and PFA has a large computational complexity and requires many DSPs in hardware implementation. In this paper, a novel 3780-point FFT processor scheme is proposed, in which a 60x63 iterative WFTA architecture with different mapping methods is imported to replace the PFA architecture, and an optimized CoOrdinate Rotation Digital Computer （CORDIC） module is used for the twiddle factor multiplications. Compared to the traditional scheme, our proposed 3780-point FFT processor scheme reduces the number of multiplications by 45% at the cost of 1% increase in the number of additions. All DSPs are replaced by the optimized CORDIC module and ROM. Simulation results show that the proposed 3780-point FFT processing scheme satisfies the requirement of the DMB-T standard, and is an efficient architecture for the TDS-OFDM system.
基金Supported by the National High-Tech Research and Development (863) Program of China (No. 2007AA01Z2B6)
文摘Powerline communications （PLC） have drawn great interest in recent years. However, most PLC standards such as HomePlug AV use the cyclic-prefix OFDM （CP-OFDM） technology. This paper presents a broadband PLC system using low density parity check （LDPC） coded time domain synchronous OFDM （TDS-OFDM）, whose spectrum efficiency is about 10% higher than that of CP-OFDM. With the same bandwidth and the ability to combat the time delay spread as HomePlug AV, this system can provide a maximum throughput of 199.7 Mbps physical layer data rate. Simulations over the measured practical powerline channel in Beijing, China, show that LDPC in the TDS-OFDM system dramatically improves the bit error rate performance, and verify the feasibility and performance of the TDS-OFDM technology for PLC systems.
