The Research of the Equation Model on the System-level Fault Diagnosis

In this paper we propose an equation model of system-level fault diagnoses, and construct corresponding theory and algorithms. People can turn any PMC model on ex-test into an equivalent equation (or a system of equations), and find all consistent fault patterns based on the equation model. We can also find all fault patterns, in which the fault node numbers are less than or equal to t without supposing t-diagnosable. It is not impossible for all graphic models.

Random testing for system-level functional verification of system-on-chip

In order to deal with the limitations during the register transfer level verification, a new functional verification method based on the random testing for the system-level of system-on-chip is proposed.The validity of this method is proven theoretically.Specifically, testcases are generated according to many approaches of randomization.Moreover, the testbench for the system-level verification according to the proposed method is designed by using advanced modeling language.Therefore, under the circumstances that the testbench generates testcases quickly, the hardware/software co-simulation and co-verification can be implemented and the hardware/software partitioning planning can be evaluated easily.The comparison method is put to use in the evaluation approach of the testing validity.The evaluation result indicates that the efficiency of the partition testing is better than that of the random testing only when one or more subdomains are covered over with the area of errors, although the efficiency of the random testing is generally better than that of the partition testing.The experimental result indicates that this method has a good performance in the functional coverage and the cost of testing and can discover the functional errors as soon as possible.

Quick System-Level DDR3 Signal Integrity Simulation Research

Double data rate synchronous dynamic random access memory （DDR3） has become one of the most mainstream applications in current server and computer systems. In order to quickly set up a system-level signal integrity （SI） simulation flow for the DDR3 interface, two system-level SI simulation methodologies, which are board-level S-parameter extraction in the frequency-domain and system-level simulation assumptions in the time domain, are introduced in this paper. By comparing the flow of Speed2000 and PowerSI/Hspice, PowerSI is chosen for the printed circuit board （PCB） board-level S-parameter extraction, while Tektronix oscilloscope （TDS7404） is used for the DDR3 waveform measurement. The lab measurement shows good agreement between simulation and measurement. The study shows that the combination of PowerSI and Hspice is recommended for quick system-level DDR3 SI simulation.

System-Level Performance Evaluation of Very High Complexity Media Applications : A H264/AVC Encoder Case Study

Given the substantially increasing complexity of embedded systems, the use of relatively detailed clock cycle-accurate simulators for the design-space exploration is impractical in the early design stages. Raising the abstraction level is nowadays widely seen as a solution to bridge the gap between the increasing system complexity and the low design productivity. For this, several system-level design tools and methodologies have been introduced to efficiently explore the design space of heterogeneous signal processing systems. In this paper, we demonstrate the effectiveness and the flexibility of the Sesame/Artemis system-level modeling and simulation methodology for efficient peformance evaluation and rapid architectural exploration of the increasing complexity heterogeneous embedded media systems. For this purpose, we have selected a system level design of a very high complexity media application;a H.264/AVC (Advanced Video Codec) video encoder. The encoding performances will be evaluated using system-level simulations targeting multiple heterogeneous multiprocessors platforms.

A Massively Parallel Re-Configurable Mesh Computer Emulator: Design, Modeling and Realization

Emulating massively parallel computer architectures represents a very important tool for the parallel programmers. It allows them to implement and validate their algorithms. Due to the high cost of the massively parallel real machines, they remain unavailable and not popular in the parallel computing community. The goal of this paper is to present an elaborated emulator of a 2-D massively parallel re-configurable mesh computer of size n x n processing elements (PE). Basing on the object modeling method, we develop a hard kernel of a parallel virtual machine in which we translate all the physical properties of its different components. A parallel programming language and its compiler are also devel-oped to edit, compile and run programs. The developed emulator is a multi platform system. It can be installed in any sequential computer whatever may be its operating system and its processing unit technology (CPU). The size n x n of this virtual re-configurable mesh is not limited;it depends just on the performance of the sequential machine supporting the emulator.

用户可重构系统芯片-U-SoC

随着深亚微米技术(DSM)的不断发展,完全专用的系统芯片(SoC)已经面临新的问题和挑战.本文在研究硅技术发展趋势、硅产品特征循环规律以及硅产业结构演变规律的基础上,提出了一种具有一定'通用'性的用户可重构系统芯片(UserreconfigurableSoC,简称U-SoC),它通过用户重构功能降低新产品的开发成本,缩短上市周期,提高设计效率,从而增强了SoC的适应性和灵活性.研究U-SoC设计方法,对于加速我国微电子产业的发展进程,实现跨越式发展有重要作用.

A photo-assisted electrochemical-based demonstrator for green ammonia synthesis

Bridging laboratory research and practical utilization is of crucial importance for the development of green ammonia synthetic technologies. A decentralized photo-assisted electrochemical-based demonstrator has been proposed for green ammonia synthesis from renewable electricity, air and water, where well-known defect-laden WO_(3) is used as the working electrode, and a commercially available PV panel supplies renewable electricity. In this demonstrator, defect-laden WO_(3) exhibits the optimum electrochemical NH_(3) formation rate(4.51 × 10^(-12)mol s^(-1)cm^(-2)) in 0.1 M K_(2)SO_(4)in a photovoltaic electrochemical(PV-EC) system. A system-level energy and cost analysis was conducted to investigate its economic viability and a general evaluation tool for system performance and cost estimation was proposed. This advance enables the possibility of integrating the small-scale green ammonia demonstrator into a stand-alone farm system.

System-L evel Efficiency Optimization of a Linear Induction Motor Drive System

Linear induction motors are superior to rotary induction motors in direct drive systems because they can generate direct forward thrust force independent of mechanical transmission.However,due to the large air gap and cut-open magnetic circuit,their efficiency and power factor are quite low,which limit their application in high power drive systems.To attempt this challenge,this work presents a system-level optimization method for a single-sided linear induction motor drive system.Not only the motor but also the control system is included in the analysis.A system-level optimization method is employed to gain optimal steady-state and dynamic performances.To validate the effectiveness of the proposed optimization method,experimental results on a linear induction motor drive are presented and discussed.

Performance Analysis of Sparse Array based Massive MIMO via Joint Convex Optimization

Massive multiple-input multiple-output(MIMO)technology enables higher data rate transmission in the future mobile communications.However,exploiting a large number of antenna elements at base station(BS)makes effective implementation of massive MIMO challenging,due to the size and weight limits of the masssive MIMO that are located on each BS.Therefore,in order to miniaturize the massive MIMO,it is crucial to reduce the number of antenna elements via effective methods such as sparse array synthesis.In this paper,a multiple-pattern synthesis is considered towards convex optimization(CO).The joint convex optimization(JCO)based synthesis is proposed to construct a codebook for beamforming.Then,a criterion containing multiple constraints is developed,in which the sparse array is required to fullfill all constraints.Finally,extensive evaluations are performed under realistic simulation settings.The results show that with the same number of antenna elements,sparse array using the proposed JCO-based synthesis outperforms not only the uniform array,but also the sparse array with the existing CO-based synthesis method.Furthermore,with a half of the number of antenna elements that on the uniform array,the performance of the JCO-based sparse array approaches to that of the uniform array.

Locomotion and Depth Control of Robotic Fish with Modular Undulating Fins

This paper presents an environmental-friendly robotic system mimicking the undulating fins of a fish.To mimic the actual flexible fin of real fish,a fin-like mechanism with a series of connecting linkages is modeled and attached to the robotic fish,by virtue of a specially designed strip.Each link is able to turn and slide with respect to the adjacent link.These driving linkages are then used to form a mechanical fin consisting of several fin segments,which are able to produce undulations,similar to those produced by the actual fish fins.Owing to the modular and re-configurable design of the mechanical fin,we are able to construct biomimetic robotic fish with various swimming modes by fin undulations.Some qualitative and workspace observations by experiments of the robotic fish are shown and discussed.

Therapeutic Acupunctural Resonance II: New Discoveries That Justify the Outcomes of This New Therapeutic Modality

Therapeutic Acupunctural Resonance was first introduced in the academic field in 2015 and was positively welcomed by colleagues all around the world. However, I have decided to do further research going deeply into new and more precise explanations which no longer refer to the effects of this particular treatment, but to how this technique works in the practice of Chinese Medicine. Being able to understand Therapeutic Acupunctural Resonance implies analyzing a series of phenomena related to historic landmarks of Classical Physics, as well as avant-garde theories within Quantum Physics and its theory of fields.

Criteria and Considerations in Software Failure Modes and Effects Analysis (SFMEA)

For the issue that software FMEA's methods are improper and practices are not standard,this article for system-level SFMEA and detail-level SFMEA,cleared the work targets,proposed the criteria about general procedure and detail-level analysis,and the considerations in project management and specific steps,by which SFMEA became specific,standard and engineered.

Interactive Building

Distributed, networked, electronically tagged, interactive devices are increasingly incorporated into the physical environment blurring progressively the boundary between physical and virtual space. This changing relationship between physical and virtual implies not only a change in the operation and use of buildings but also a change in their physical configuration, and therefore, their design and production. Interactive building addresses, therefore both the building defined as physically built environment and the building process implying on the one hand the changing role of architecture with respect to incorporation of interactivity and the resulting multiple and varied use of built environments in reduced timeframes;On the other hand, it is implying the changing role of the architect with respect to the use of networks connecting digital databases and parametric models with customizable design and production tools allowing for linking design to production and use. This paper discusses both by presenting two case studies within the larger framework of interactive building.

A Novel Approach for Fault Diagnosis in Wireless Sensor Networks

The following article has been retracted due to special reason of the author. This paper published in Vol.5 No. 2, 2013, has been removed from this site.

Node Grouping in System-Level Fault Diagnosis

With the popularization of network applications and multiprocessor systems, dependability of systems has drawn considerable attention. This paper presents a new technique of node grouping for system-level fault diagnosis to simplify the complexity of large system di-agnosis. The technique transforms a complicated system to a group network, where each group may consist of many nodes that are either fault-free or faulty. It is proven that the transformation leads to a unique group network to ease system diagnosis. Then it studies systematically one-step t-faults diagnosis problem based on node grouping by means of the concept of hide-pendent point sets and gives a simple sufficient and necessary condition. The paper presents a diagnosis procedure for t-diagnosable systems. Furthermore, an efficient probabilistic diagnosis algorithm for practical applications is proposed based on the belief that most of the nodes in a system are fault-free. The result of software simulation shows that the probabilistic diagnosis provides high probability of correct diagnosis and low diagnosis cost, and is suitable for systems of any kind of topology.

ArchSim:A System-Level Parallel Simulation Platform for the Architecture Design of High Performance Computer

High performance computer （HPC） is a complex huge system, of which the architecture design meets increasing difficulties and risks. Traditional methods, such as theoretical analysis, component-level simulation and sequential simulation, are not applicable to system-level simulations of HPC systems. Even the parallel simulation using large-scale parallel machines also have many difficulties in scalability, reliability, generality, as well as efficiency. According to the current needs of HPC architecture design, this paper proposes a system-level parallel simulation platform： ArchSim. We first introduce the architecture of ArchSim simulation platform which is composed of a global server （GS）, local server agents （LSA） and entities. Secondly, we emphasize some key techniques of ArchSim, including the synchronization protocol, the communication mechanism and the distributed checkpointing/restart mechanism. We then make a synthesized test of some main performance indices of ArchSim with the phold benchmark and analyze the extra overhead generated by ArchSim. Finally, based on ArchSim, we construct a parallel event-driven interconnection network simulator and a system-level simulator for a small scale HPC system with 256 processors. The results of the performance test and HPC system simulations demonstrate that ArchSim can achieve high speedup ratio and high scalability on parallel host machine and support system-level simulations for the architecture design of HPC systems.

Performance analysis on reconfigurable intelligent surface and network-controlled repeater in 3GPP release-18

As a candidate technique to achieve sixth-generation wireless communication(6G),reconfigurable intelligent surface(RIS)has become popular in both academia and industry.For better exploration of the advantages of RIS,we compare the performances of RIS and network-controlled repeater(NCR)in 3GPP release-18.We first theoretically analyze the received signal power and signal-to-noise ratio performances for both RIS and NCR.Then,we simulate the reference signal received power and signal-to-interference-and-noise ratio performances at the system level for both RIS and NCR in the frequency range 1 and frequency range 2 bands.Finally,several insights on engineering applications are given based on the comparison between RIS and NCR.

Advanced System-Level Model Reduction Method for Multi-Converter DC Power Systems

For dynamic stability analysis and instability mechanism understanding of multi-converter medium voltage DC power systems with droop-based double-loop control,an advanced system-level model reduction method is proposed.With this method,mathematical relationships of control parameters(e.g.,current and voltage control parameters)between the system and its equivalent reduced-order model are established.First,open-loop and closed-loop equivalent reduced-order models of current control loop considering dynamic interaction among converters are established.An instability mechanism(e.g.,unreasonable current control parameters)of the system can be revealed intuitively.Theoretical guidance for adjustment of current control parameters can also be given.Then,considering dynamic interaction of current control among converters,open-loop and closed-loop equivalent reduced-order models of voltage control loop are established.Oscillation frequency and damping factor of DC bus voltage in a wide oscillation frequency range(e.g.,10–50 Hz)can be evaluated accurately.More importantly,accuracy of advanced system-level model reduction method is not compromised,even for MVDC power systems with inconsistent control parameters and different number of converters.Finally,experiments in RT-BOX hardware-in-the-loop experimental platform are conducted to validate the advanced system-level model reduction method.

Why High-Speed Railway Stations Continue China's Leapfrog Urbanization:Institutional Parameters of Urban Development

An ambitious program of High-Speed Railway (HSR) is under construction in China and already soon the network will overtake its counterparts in Europe. Reflecting on experiences in Europe, the authors explore the conditions for place making qualities of six new HSR station areas in China. The superb inter-city connectivity of the new infrastructure nodes raises a lot of expectations about the economic and social potential of the station areas, but the experiences in Europe thus far are very differentiated. With regards to the attraction of economic activities usually the existing differences between different economic regions are reproduced rather than shaping completely new conditions. Also the expectations of developing completely new integrated urban centers around stations in the urban periphery are rather ambitious. The paper questions the planning responses to HSR development in Chinese cities and investigates the institutional conditions that frame these responses. The authors explore how the plans for Chinese HSR station development account for their objectives and reflect on the potential of the station area planning by investigating the institutional parameters of urban development.

A general White–Box strategy for designing thermoelectric cooling system

Thermoelectric cooling(TEC)is critically important in thermal management of laser modules or chips and potentially for personalized thermoregulation.The formulae for efficiency in standard textbooks can only describe the performance of a TEC module with ideal thermal conditions,that is,fixed terminal temperatures,but are unable to deal with a real TEC system where heat transfer at its interfaces with the heat source and sink are finite and with thermal resistances.Here,we define the TEC system-level performance indices,that is,the maximum cooling power,temperature difference,and coefficient of performance,by introducing a set of explicit formulae.The external heat transfer conditions are taken into account as dimensionless thermal resistance parameters.With these formulae,the TEC system performances are evaluated elegantly with errors well within±5%over broad operating conditions.We further optimize the cooling power and the coefficient of performance in practical scenarios and establish a general White–Box design procedure for TEC systems,which enables a transparent design process and straightforward analysis of performance bottlenecks.A set of cooling experiments are performed to validate the analytical model and to illustrate the dependence of system design on realistic thermal conditions.By choosing the suitable TEC module parameter under given external heat transfer conditions,the cooling power can be improved by more than 100%.This work sheds some light on the integral design of TEC systems for broad applications to take full advantage of the advanced thermoelectric materials in the cooling field.