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用于SOC测试的一种有效的BIST方法
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作者 须自明 刘战 +1 位作者 王国章 于宗光 《电子器件》 CAS 2007年第4期1152-1154,共3页
为了提高SOC芯片的可测性和可靠性,我们提出了一种SOC测试的BIST技术的实现方案.针对某所自行研制的数字模拟混合信号SOC芯片,我们使用了不同的可测性技术.比如对模拟模块使用改进的BIST方法,对嵌入式存储器使用了MBIST技术.一系列的测... 为了提高SOC芯片的可测性和可靠性,我们提出了一种SOC测试的BIST技术的实现方案.针对某所自行研制的数字模拟混合信号SOC芯片,我们使用了不同的可测性技术.比如对模拟模块使用改进的BIST方法,对嵌入式存储器使用了MBIST技术.一系列的测试实验数据表明,该BIST方法能有效提高测试覆盖率. 展开更多
关键词 system-on-a-chip BIST
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An attack-immune trusted architecture for supervisory aircraft hardware 被引量:2
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作者 Dongxu CHENG Chi ZHANG +4 位作者 Jianwei LIU Dawei LI Zhenyu GUAN Wei ZHAO Mai XU 《Chinese Journal of Aeronautics》 SCIE EI CAS CSCD 2021年第11期169-181,共13页
With the wide application of electronic hardware in aircraft such as air-to-ground communication,satellite communication,positioning system and so on,aircraft hardware is facing great secure pressure.Focusing on the s... With the wide application of electronic hardware in aircraft such as air-to-ground communication,satellite communication,positioning system and so on,aircraft hardware is facing great secure pressure.Focusing on the secure problem of aircraft hardware,this paper proposes a supervisory control architecture based on secure System-on-a-Chip(So C)system.The proposed architecture is attack-immune and trustworthy,which can support trusted escrow application and Dynamic Integrity Measurement(DIM)without interference.This architecture is characterized by a Trusted Monitoring System(TMS)hardware isolated from the Main Processor System(MPS),a secure access channel from TMS to the running memory of the MPS,and the channel is unidirectional.Based on this architecture,the DIM program running on TMS is used to measure and call the Lightweight Measurement Agent(LMA)program running on MPS.By this method,the Operating System(OS)kernel,key software and data of the MPS can be dynamically measured without disturbance,which makes it difficult for adversaries to attack through software.Besides,this architecture has been fully verified on FPGA prototype system.Compared with the existing systems,our architecture achieves higher security and is more efficient on DIM,which can fully supervise the running of application and aircraft hardware OS. 展开更多
关键词 Aircraft hardware Dynamic integrity measurement Supervisory control system-on-a-chip(SoC) Trusted computing
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Towards functional verifying a family of SystemC TLMs 被引量:1
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作者 Tun LI Jun YE Qingping TAN 《Frontiers of Computer Science》 SCIE EI CSCD 2020年第1期53-66,共14页
It is often the case that in the development of a system-on-a-chip(SoC)design,a family of SystemC transaction level models(TLM)is created.TLMs in the same family often share common functionalities but differ in their ... It is often the case that in the development of a system-on-a-chip(SoC)design,a family of SystemC transaction level models(TLM)is created.TLMs in the same family often share common functionalities but differ in their timing,implementation,configuration and performance in various SoC developing phases.In most cases,all the TLMs in a family must be verified for the follow-up design activities.In our previous work,we proposed to call such family TLM product line(TPL),and proposed feature-oriented(FO)design methodology for efficient TPL development.However,developers can only verify TLM in a family one by one,which causes large portion of duplicated verification overhead.Therefore,in our proposed methodology,functional verification of TPL has become a bottleneck.In this paper,we proposed a novel TPL verification method for FO designs.In our method,for the given property,we can exponentially reduce the number of TLMs to be verified by identifying mutefeature-modules(MFM),which will avoid duplicated veri-fication.The proposed method is presented in informal and formal way,and the correctness of it is proved.The theoretical analysis and experimental results on a real design show the correctness and efficiency of the proposed method. 展开更多
关键词 system-on-a-chip TRANSACTION level model SYSTEMC feature-oriented FUNCTIONAL verification
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