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Design and Test of Multibus Adapter System on a Chip for Fault Tolerant Computer Systems
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作者 Yang Yinghua, Huang Chang, Meng Biao, Zhang Xing, Yu Shan 《Journal of Systems Engineering and Electronics》 SCIE EI CSCD 1992年第4期5-6,2,共3页
In order to improve the system reliability and performance and to reduce the system cost, volume and weight, we have designed, fabricated and tested the multibus adapter system of a trimodular redundant fault tolerant... In order to improve the system reliability and performance and to reduce the system cost, volume and weight, we have designed, fabricated and tested the multibus adapter system of a trimodular redundant fault tolerant computer system on a single chip of 5000 gate CMOS gate array. The design, fabrication and test of this single chip system will be discussed.. 展开更多
关键词 BUS Design and Test of Multibus Adapter System on a Chip for fault Tolerant Computer Systems CHIP TEST
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