A test sequence generation method of zone controller based on timed automata

In order to solve the problem of artificial generation and low efficiency of test sequences for zone controller (ZC), a model-based automatic generation method of test sequence is proposed. Firstly, the timed automata model is established based on function analysis of the zone controller, and the correctness of the model is verified by UPPAAL. Then by parsing the timed automata model files, state information and transition conditions can be extracted to generate test case sets. Finally, according to the serialization conditions of test cases, the test cases are serialized into test sequences by using the improved depth first search algorithm. A case, the ZC controls the train running within its jurisdiction, shows that the method is correct and can effectively improve the efficiency of test sequence generation.

Genetic evaluation and testing for hereditary forms of cancer in the era of next-generation sequencing

The introduction of next-generation sequencing(NGS) technology in testing for hereditary cancer susceptibility allows testing of multiple cancer susceptibility genes simultaneously. While there are many potential benefits to utilizing this technology in the hereditary cancer clinic, including efficiency of time and cost, there are also important limitations that must be considered. The best panel for the given clinical situation should be selected to minimize the number of variants of unknown significance. The inclusion in panels of low penetrance or newly identified genes without specific actionability can be problematic for interpretation.Genetic counselors are an essential part of the hereditary cancer risk assessment team, helping the medical team select the most appropriate test and interpret the often complex results. Genetic counselors obtain an extended family history, counsel patients on the available tests and the potential implications of results for themselves and their family members(pre-test counseling), explain to patients the implications of the test results(post-test counseling), and assist in testing family members at risk.

Minimal-Length Interoperability Test Sequences Generation via Genetic Algorithm

A novel interoperability test sequences optimization scheme is proposed in which the genetic algorithm （GA） is used to obtain the minimal-length interoperability test sequences. During our work, the basic interoperability test sequences are generated based on the minimal-complete-coverage criterion, which removes the redundancy from conformance test sequences. Then interoperability sequences minimization problem can be considered as an instance of the set covering problem, and the GA is applied to remove redundancy in interoperability transitions. The results show that compared to conventional algorithm, the proposed algorithm is more practical to avoid the state space explosion problem, for it can reduce the length of the test sequences and maintain the same transition coverage.

Adding Pseudo-Random Test Sequence Generator in the Test Simulator for DFT Approach

This paper presents modified version of a realistic test tool suitable to Design For Testability （DFT） and Built-ln Self Test （BIST） environments. A comprehensive tool is developed in the form of a test simulator. The simulator is capable of providing a required goal of test for the Circuit Under Test （CUT）. The simulator uses the approach of fault diagnostics with fault grading procedures to provide the optimum tests. The current version of the simulator embeds features of exhaustive and pseudo-random test generation schemes along with the search solutions of cost effective test goals. The simulator provides facilities of realizing all possible pseudo-random sequence generators with all possible combinations of seeds. The tool is developed on a common Personal Computer （PC） platform and hence no special software is required. Thereby, it is a low cost tool hence economical. The tool is very much suitable for determining realistic test sequences for a targeted goal of testing for any CUT. The developed tool incorporates flexible Graphical User Interface （GUI） procedures and can be operated without any special programming skill. The tool is debugged and tested with the results of many bench mark circuits. Further, this developed tool can be utilized for educational purposes for many courses such as fault-tolerant computing, fault diagnosis, digital electronics, and safe-reliable-testable digital logic designs.

Sequential fault diagnosis strategy with imperfect tests considering life cycle cost

The problem of sequential fault diagnosis is to construct a diagnosis tree that can isolate the failure sources with minimal test cost. Pervious sequential fault diagnosis strategy generating algorithms only consider the execution cost at application stage, which may result in a solution with poor quality from the view of life cycle cost. Furthermore, due to the fact that uncertain information exists extensively in the real-world systems, the tests are always imperfect. In order to reduce the cost of fault diagnosis in the realistic systems, the sequential fault diagnosis problem with imperfect tests considering life cycle cost is presented and formulated in this work, which is an intractable NP-hard AND/OR decision tree construction problem. An algorithm based on AND/OR graph search is proposed to solve this problem. Heuristic search based on information theory is applied to generate the sub-tree in the algorithm. Some practical issues such as the method to improve the computational efficiency and the diagnosis strategy with multi-outcome tests are discussed. The algorithm is tested and compared with previous algorithms on the simulated systems with different scales and uncertainty. Application on a wheel momentum system of a spacecraft is studied in detail. Both the simulation and application results suggest that the cost of the diagnosis strategy can be reduced significantly by using the proposed algorithm, especially when the placement cost of the tests constitutes a large part of the total cost.

Maternal peripartum bacteremia caused by intrauterine infection with Comamonas kerstersii:A case report

BACKGROUND Comamonas kerstersii(C.kerstersii)infections have considered as non-pathogenic to humans,however due to new techniques such as matrix-assisted laser desorption ionization-time of flight mass spectrometry(MALDI-TOF-MS),more cases have been identified.CASE SUMMARY This is the first report of a maternal patient with a C.kerstersii bacteremia following caesarean section.Due to the severity of the patient’s condition;high fever and rapidly progressing organ damage,the patient was transferred to the intensive care unit.C.kerstersii was detected by metagenomic next-generation sequencing testing.Based on the drug sensitivity test,appropriate antibiotic treatment was given and the patient recovered fully.CONCLUSION This case report confirms that the detection via MALDI-TOF-MS and metagenomic next-generation sequencing testing provides a reliable basis for the diagnosis of this rare bacterial infection.

Semi-valid Fuzz Testing Case Generation for Stateful Network Protocol

Network protocols are divided into stateless and stateful. Stateful network protocols have complex communication interactions and state transitions. However, the existing network protocol fuzzing does not support state transitions very well. This paper focuses on this issue and proposes the Semi-valid Fuzzing for the Stateful Network Protocol （SFSNP）. The SFSNP analyzes protocol interactions and builds an extended finite state machine with a path marker for the network protocol; then it obtains test sequences of the extended finite state machine, and further performs the mutation operation using the semi-valid algorithm for each state transition in the test sequences; finally, it obtains fuzzing sequences. Moreover, because different test sequences may have the same state transitions, the SFSNP uses the state transition marking algorithm to reduce redundant test cases. By using the stateful rule tree of the protocol, the SFSNP extracts the constraints in the protocol specifications to construct semi-valid fuzz testing cases within the sub-protocol domain, and finally forms fuzzing sequences. Experimental results indicate that the SFSNP is reasonably effective at reducing the quantity of generated test cases and improving the quality of fuzz testing cases. The SFSNP can reduce redundancy and shorten testing time.

Generation method of minimal-complete-coverage interoperability test sequence based on digraph

Even if two implementations of a protocol pass the conformance testing,it cannot guarantee that they can interoperate properly;so direct testing of interoperation is considered indispensable.During the interoperability testing,a minimal number of test sequences are expected to check as many as possible implementation errors.By using minimal-complete-coverage criterion,the test sequence generation based on digraph can produce more effective test sequences.

A new method for improving efficiency of protocol testing

Traditional solutions have encountered some bottleneck in improving the efficiency of protocol testing.A novel method that records the test sequence dynamically is proposed.Three dynamically reordering algorithms are brought forward in line with different fault conditions.The impact of the new method of testing efficiency is also presented.Simulation results demonstrate that the proposed solution is better than the traditional ones in terms of testing efficiency.

Test results judgment method based on BIT faults

Built-in-test （BIT） is responsible for equipment fault detection, so the test data correct- ness directly influences diagnosis results. Equipment suffers all kinds of environment stresses, such as temperature, vibration, and electromagnetic stress. As embedded testing facility, BIT also suffers from these stresses and the interferences/faults are caused, so that the test course is influenced, resulting in incredible results. Therefore it is necessary to monitor test data and judge test failures. Stress monitor and BIT self-diagnosis would redound to BIT reliability, but the existing anti- jamming researches are mainly safeguard design and signal process. This paper focuses on test results monitor and BIT equipment （BITE） failure judge, and a series of improved approaches is proposed. Firstly the stress influences on components are illustrated and the effects on the diagnosis results are summarized. Secondly a composite BIT program is proposed with information integra- tion, and a stress monitor program is given. Thirdly, based on the detailed analysis of system faults and forms of BIT results, the test sequence control method is proposed. It assists BITE failure judge and reduces error probability. Finally the validation cases prove that these approaches enhance credibility.

Test sequencing problem arising at the design stage for reducing life cycle cost

Previous test sequencing algorithms only consider the execution cost of a test at the application stage. Due to the fact that the placement cost of some tests at the design stage is considerably high compared with the execution cost, the sequential diagnosis strategy obtained by previous methods is actually not optimal from the view of life cycle. In this paper, the test sequencing problem based on life cycle cost is presented. It is formulated as an optimization problem, which is non-deterministic polynomial-time hard （NP-hard）. An algorithm and a strategy to improve its computational efficiency are proposed. The formulation and algorithms are tested on various simulated systems and comparisons are made with the extant test sequencing methods. Application on a pump rotational speed control （PRSC） system of a spacecraft is studied in detail. Both the simulation results and the real-world case application results suggest that the solution proposed in this paper can significantly reduce the life cycle cost of a sequential fault diagnosis strategy.