High resistance thin film chip resistors(0603 type) were studied,and the specifications are as follows:1 k? with tolerance about ±0.1% after laser trimming and temperature coefficient of resistance(TCR) less than...High resistance thin film chip resistors(0603 type) were studied,and the specifications are as follows:1 k? with tolerance about ±0.1% after laser trimming and temperature coefficient of resistance(TCR) less than ±15×10-6/℃.Cr-Si-Ta-Al films were prepared with Ar flow rate and sputtering power fixed at 20 standard-state cubic centimeter per minute(sccm) and 100 W,respectively.The experiment shows that the electrical properties of Cr-SiTa-Al deposition films can meet the specification requirements of 0603 type thin film chip resistors when the deposition time was about 11 min and deposition films were annealed at 500 ℃ for 120 min.The morphologies of Cr-Si-TaAl film surfaces were examined by scanning electron microscopy(SEM).The analysis suggests that Ta and Al may be distributed in CrSi2 film with mixed form of several structures(e.g.,bridge-like,capillary-like or island-like structures),and such a structure distribution is responsible for high film resistance and low TCR of Cr-Si-Ta-Al film.展开更多
This paper discusses the fabrication of Si-PDMS low voltage capillary electrophoresis chip (CE chip). Arrayed-electrode which is used to apply low separation voltage is fabricated along the sidewalls of the separation...This paper discusses the fabrication of Si-PDMS low voltage capillary electrophoresis chip (CE chip). Arrayed-electrode which is used to apply low separation voltage is fabricated along the sidewalls of the separation channel on the silicon based bottom part. Isolation trenches, which are placed surrounding the arrayed-electrode, insure the insulation between the arrayed-electrode, as well as arrayed-electrode and liquid in the micro channel. Polydimethylsilicone (PDMS) is used as the cover. PDMS and silicon based bottom part are reversible sealed to attain Si-PDMS low voltage CE chip. Experiments have been done to obtain optimum electrophoresis separation condition: separation voltage is 45V, switch time is 2s and the Phe and Lys electrophoresis separation is successful.展开更多
Subsurface damage(SSD) is an unavoidable problem in the precision mechanical grinding for preparing ultra-thin and flexible silicon chips. At present, there are relatively few studies on the relationship between SSD a...Subsurface damage(SSD) is an unavoidable problem in the precision mechanical grinding for preparing ultra-thin and flexible silicon chips. At present, there are relatively few studies on the relationship between SSD and the bending strength of ultra-thin chips under different grinding parameters. In this study, SSD including amorphization and dislocation is observed using a transmission electron microscope. Theoretical predictions of the SSD depth induced by different processing parameters are in good agreement with experimental data. The main reasons for SSD depth increase include the increase of grit size, the acceleration of feed rate, and the slowdown of wheel rotation speed. Three-point bending test is adopted to measure the bending strength of ultra-thin chips processed by different grinding conditions. The results show that increasing wheel rotation speed and decreasing grit size and feed rate will improve the bending strength of chips, due to the reduction of SSD depth. Wet etching and chemical mechanical polishing(CMP) are applied respectively to remove the SSD induced by grinding, and both contribute to providing a higher bending strength, but in comparison, CMP works better due to a smooth surface profile. This research aims to provide some guidance for optimizing the grinding process and fabricating ultra-thin chips with higher bending strength.展开更多
Electric vehicles(EV)played an important role fighting greenhouse gas emissions that contributed to global warming.The construction of the charging pile,which was called as the"gas station"of EV,developed ra...Electric vehicles(EV)played an important role fighting greenhouse gas emissions that contributed to global warming.The construction of the charging pile,which was called as the"gas station"of EV,developed rapidly.The charging speed of the charging piles was shorted rapidly,which was a challenge for the heat dissipation system of the charging pile.In order to reduce the operation temperature of the charging pile,this paper proposed a fin and ultra-thin heat pipes(UTHPs)hybrid heat dissipation system for the direct-current(DC)charging pile.The L-shaped ultra-thin flattened heat pipe with ultra-high thermal conductivity was adopted to reduce the spreading thermal resistance.ICEPAK software was used to simulate the temperature and flow profiles of the new design.And various factors that affected the heat dissipation performance of the system were explored.Simulation results showed that the system had excellent heat dissipation capacity and achieved good temperature uniformity.Rather than solely relied on the fans,this new design efficiently dissipated heat with a lower fan load and less energy consumption.展开更多
Nanometer chips were directly fabricated using face nanogrinding carried out by ultrafine diamond grits at room temperature. Direct evidence for ground nanometer chips is cuboid, and the average ratio of width to thic...Nanometer chips were directly fabricated using face nanogrinding carried out by ultrafine diamond grits at room temperature. Direct evidence for ground nanometer chips is cuboid, and the average ratio of width to thickness is 1.49. Chips of 9.0 nm in thickness, 13.3 nm in width, and 16.0 in diagonal were achieved and confirmed using transmission electron microscopy. Based on the nanometer chips observed, a model was proposed according to the mass conservation and fundamental mechanism of face grinding. The surface roughness and thickness of damaged layers measured experimentally are in good agreement with the prediction of the developed model. The feed rate significantly affects the surface roughness and thickness of damaged layers, when keeping the wheel and table speeds constant, respectively.展开更多
基金Supported by Science and Technology Committee of Tianjin (No.06YFGPGX08400)Ministry of Science and Technology of China (No.2009GJF20022)Innovation Fund of Tianjin University
文摘High resistance thin film chip resistors(0603 type) were studied,and the specifications are as follows:1 k? with tolerance about ±0.1% after laser trimming and temperature coefficient of resistance(TCR) less than ±15×10-6/℃.Cr-Si-Ta-Al films were prepared with Ar flow rate and sputtering power fixed at 20 standard-state cubic centimeter per minute(sccm) and 100 W,respectively.The experiment shows that the electrical properties of Cr-SiTa-Al deposition films can meet the specification requirements of 0603 type thin film chip resistors when the deposition time was about 11 min and deposition films were annealed at 500 ℃ for 120 min.The morphologies of Cr-Si-TaAl film surfaces were examined by scanning electron microscopy(SEM).The analysis suggests that Ta and Al may be distributed in CrSi2 film with mixed form of several structures(e.g.,bridge-like,capillary-like or island-like structures),and such a structure distribution is responsible for high film resistance and low TCR of Cr-Si-Ta-Al film.
文摘This paper discusses the fabrication of Si-PDMS low voltage capillary electrophoresis chip (CE chip). Arrayed-electrode which is used to apply low separation voltage is fabricated along the sidewalls of the separation channel on the silicon based bottom part. Isolation trenches, which are placed surrounding the arrayed-electrode, insure the insulation between the arrayed-electrode, as well as arrayed-electrode and liquid in the micro channel. Polydimethylsilicone (PDMS) is used as the cover. PDMS and silicon based bottom part are reversible sealed to attain Si-PDMS low voltage CE chip. Experiments have been done to obtain optimum electrophoresis separation condition: separation voltage is 45V, switch time is 2s and the Phe and Lys electrophoresis separation is successful.
基金supported by the National Natural Science Foundation of China (Grant Nos. U20A6001, 11625207, 11902292, and 11921002)the Zhejiang Province Key Research and Development Project (Grant Nos.2019C05002, 2020C05004, and 2021C01183)。
文摘Subsurface damage(SSD) is an unavoidable problem in the precision mechanical grinding for preparing ultra-thin and flexible silicon chips. At present, there are relatively few studies on the relationship between SSD and the bending strength of ultra-thin chips under different grinding parameters. In this study, SSD including amorphization and dislocation is observed using a transmission electron microscope. Theoretical predictions of the SSD depth induced by different processing parameters are in good agreement with experimental data. The main reasons for SSD depth increase include the increase of grit size, the acceleration of feed rate, and the slowdown of wheel rotation speed. Three-point bending test is adopted to measure the bending strength of ultra-thin chips processed by different grinding conditions. The results show that increasing wheel rotation speed and decreasing grit size and feed rate will improve the bending strength of chips, due to the reduction of SSD depth. Wet etching and chemical mechanical polishing(CMP) are applied respectively to remove the SSD induced by grinding, and both contribute to providing a higher bending strength, but in comparison, CMP works better due to a smooth surface profile. This research aims to provide some guidance for optimizing the grinding process and fabricating ultra-thin chips with higher bending strength.
基金This research was supported by the National Key Research and Development Plan(Key Special Project of Inter-governmental Na-tional Scientific and Technological Innovation Cooperation,Grant No.2019YFE0197500)Key Research and Development Projects of Hubei Province(Grant No.2020BAB129)+1 种基金the Scientific Research Foun-dation of Wuhan University of Technology(Grant Nos.40120237 and 40120551)the Fundamental Research Funds for the Central Uni-versities(Grant No.WUT:2021IVA037).
文摘Electric vehicles(EV)played an important role fighting greenhouse gas emissions that contributed to global warming.The construction of the charging pile,which was called as the"gas station"of EV,developed rapidly.The charging speed of the charging piles was shorted rapidly,which was a challenge for the heat dissipation system of the charging pile.In order to reduce the operation temperature of the charging pile,this paper proposed a fin and ultra-thin heat pipes(UTHPs)hybrid heat dissipation system for the direct-current(DC)charging pile.The L-shaped ultra-thin flattened heat pipe with ultra-high thermal conductivity was adopted to reduce the spreading thermal resistance.ICEPAK software was used to simulate the temperature and flow profiles of the new design.And various factors that affected the heat dissipation performance of the system were explored.Simulation results showed that the system had excellent heat dissipation capacity and achieved good temperature uniformity.Rather than solely relied on the fans,this new design efficiently dissipated heat with a lower fan load and less energy consumption.
基金supported by the National Natural Science Foundation of China (Grant No. 91123013)Tribology Science Fund of State Key Laboratory of Tribology (Grant No. SKLTKF12A08) (Tsinghua University)+1 种基金Fund of State Key Laboratory of Metastable Materials Science and Technology (Grant No. 201302) (Yanshan University)the Fundamental Research Funds for the Central Universities (Grant No. DUT13YQ109)
文摘Nanometer chips were directly fabricated using face nanogrinding carried out by ultrafine diamond grits at room temperature. Direct evidence for ground nanometer chips is cuboid, and the average ratio of width to thickness is 1.49. Chips of 9.0 nm in thickness, 13.3 nm in width, and 16.0 in diagonal were achieved and confirmed using transmission electron microscopy. Based on the nanometer chips observed, a model was proposed according to the mass conservation and fundamental mechanism of face grinding. The surface roughness and thickness of damaged layers measured experimentally are in good agreement with the prediction of the developed model. The feed rate significantly affects the surface roughness and thickness of damaged layers, when keeping the wheel and table speeds constant, respectively.
