Implementation of sub-100 nm vertical channel-all-around(CAA) thin-film transistor using thermal atomic layer deposited IGZO channel

In-Ga-Zn-O(IGZO) channel based thin-film transistors(TFT), which exhibit high on-off current ratio and relatively high mobility, has been widely researched due to its back end of line(BEOL)-compatible potential for the next generation dynamic random access memory(DRAM) application. In this work, thermal atomic layer deposition(TALD) indium gallium zinc oxide(IGZO) technology was explored. It was found that the atomic composition and the physical properties of the IGZO films can be modulated by changing the sub-cycles number during atomic layer deposition(ALD) process. In addition, thin-film transistors(TFTs) with vertical channel-all-around(CAA) structure were realized to explore the influence of different IGZO films as channel layers on the performance of transistors. Our research demonstrates that TALD is crucial for high density integration technology, and the proposed vertical IGZO CAA-TFT provides a feasible path to break through the technical problems for the continuous scale of electronic equipment.

Fluorination-mitigated high-current degradation of amorphous InGaZnO thin-film transistors

As growing applications demand higher driving currents of oxide semiconductor thin-film transistors(TFTs),severe instabilities and even hard breakdown under high-current stress(HCS)become critical challenges.In this work,the triggering voltage of HCS-induced self-heating(SH)degradation is defined in the output characteristics of amorphous indium-galliumzinc oxide(a-IGZO)TFTs,and used to quantitatively evaluate the thermal generation process of channel donor defects.The fluorinated a-IGZO(a-IGZO:F)was adopted to effectively retard the triggering of the self-heating(SH)effect,and was supposed to originate from the less population of initial deep-state defects and a slower rate of thermal defect transition in a-IGZO:F.The proposed scheme noticeably enhances the high-current applications of oxide TFTs.

Advances in mobility enhancement of ITZO thin-film transistors:a review

Indium-tin-zinc oxide(ITZO)thin-film transistor(TFT)technology holds promise for achieving high mobility and offers significant opportunities for commercialization.This paper provides a review of progress made in improving the mobility of ITZO TFTs.This paper begins by describing the development and current status of metal-oxide TFTs,and then goes on to explain the advantages of selecting ITZO as the TFT channel layer.The evaluation criteria for TFTs are subsequently introduced,and the reasons and significance of enhancing mobility are clarified.This paper then explores the development of high-mobility ITZO TFTs from five perspectives:active layer optimization,gate dielectric optimization,electrode optimization,interface optimization,and device structure optimization.Finally,a summary and outlook of the research field are presented.

High-performance amorphous In–Ga–Zn–O thin-film transistor nonvolatile memory with a novel p-SnO/n-SnO_(2) heterojunction charge trapping stack

Amorphous In–Ga–Zn–O(a-IGZO)thin-film transistor(TFT)memories with novel p-SnO/n-SnO_(2) heterojunction charge trapping stacks(CTSs)are investigated comparatively under a maximum fabrication temperature of 280℃.Compared to a single p-SnO or n-SnO_(2) charge trapping layer(CTL),the heterojunction CTSs can achieve electrically programmable and erasable characteristics as well as good data retention.Of the two CTSs,the tunneling layer/p-SnO/nSnO_(2)/blocking layer architecture demonstrates much higher program efficiency,more robust data retention,and comparably superior erase characteristics.The resulting memory window is as large as 6.66 V after programming at 13 V/1 ms and erasing at-8 V/1 ms,and the ten-year memory window is extrapolated to be 4.41 V.This is attributed to shallow traps in p-SnO and deep traps in n-SnO_(2),and the formation of a built-in electric field in the heterojunction.

Low-temperature metal–oxide thin-film transistor technologies for implementing flexible electronic circuits and systems

Here we review two 300℃metal–oxide(MO)thin-film transistor(TFT)technologies for the implementation of flexible electronic circuits and systems.Fluorination-enhanced TFTs for suppressing the variation and shift of turn-on voltage(VON),and dual-gate TFTs for acquiring sensor signals and modulating VON have been deployed to improve the robustness and performance of the systems in which they are deployed.Digital circuit building blocks based on fluorinated TFTs have been designed,fabricated,and characterized,which demonstrate the utility of the proposed low-temperature TFT technologies for implementing flexible electronic systems.The construction and characterization of an analog front-end system for the acquisition of bio-potential signals and an active-matrix sensor array for the acquisition of tactile images have been reported recently.

不同宽长比的柔性LTPS TFT的电应力可靠性

为了研究不同宽长比的柔性低温多晶硅薄膜晶体管(LTPS TFT)的电应力可靠性,测试了器件的I-V特性,以表征器件在强电场直流应力下由于自热效应和热载流子效应带来的电学性能退化。通过瞬态电流法表征了器件在强电场直流应力下的时间常数谱,并对其产生的新陷阱进行定位,分析了产生陷阱的内在机理。结果表明,在相同的强电场直流应力下宽长比为3/2.5的器件,其电学参数变化最大,自热效应以及热载流子效应带来的影响也最大。自热效应导致器件性能退化的主要原因是较大的栅源电压导致Si/SiO2界面处和栅氧化层中的陷阱增多,而热载流子效应导致器件性能退化的主要原因则是由于较大的漏源电压使得漏极晶界陷阱态密度急剧升高。

TFT-LCD及触摸屏玻璃基板激光断切现象研究

激光切割技术已经成为玻璃生产及加工领域中的一种成熟的工业加工技术,具备高精度、高速度、高质量、高效率的优点。断切现象是薄膜晶体管液晶显示器(ThinFilmTransistorLiquid CrystalDisplay,TFT-LCD)及触摸屏玻璃基板激光切割的质量问题之一。文章从设备接地、激光器出光功率稳定性、光路和软体系统信号对接4个方面分析短切现象产生的原因,并给出相应的处理方法,以期为常见激光切割质量问题的处理提供参考。

退火温度对溶液法制备IGZO-TFT器件性能影响

随着人们进入信息时代,半导体技术快速发展,对薄膜晶体管(Thin film transistor,简称TFT)的性能要求逐渐提高.IGZO由于具有较高的载流子迁移率、相对良好的均匀性等优势而受到广泛关注;而传统的真空技术制备薄膜晶体管,因制备工艺复杂、制备成本高等问题,在快速发展的信息时代逐渐显露出局限性,本文采用制备工艺更为简单的溶液法在Si/SiO_(2)基底上制备IGZO有源层薄膜,并测试不同退火温度(450℃,550℃,650℃)条件下对薄膜性能的影响.结果表明,适当提高退火温度可以有效改善IGZO-TFT器件的电学性能,本实验测试得出:当溶液法制备薄膜在550℃退火温度下退火器件性能最优,溶液法制备的器件电流开关闭达到105,器件性能相对比较稳定.

Positive gate-bias temperature instability of ZnO thin-film transistor

The positive gate-bias temperature instability of a radio frequency （RF） sputtered ZnO thin-film transistor （ZnO TFT） is investigated. Under positive gate-bias stress, the saturation drain current and OFF-state current decrease, and the threshold voltage shifts toward the positive direction. The stress amplitude and stress temperature are considered as important factors in threshold-voltage instability, and the time dependences of threshold voltage shift under various bias temperature stress conditions could be described by a stretched-exponential equation. Based on the analysis of hysteresis behaviors in current- voltage and capacitance-voltage characteristics before and after the gate-bias stress, it can be clarified that the threshold- voltage shift is predominantly attributed to the trapping of negative charge carriers in the defect states located at the gate- dielectric/channel interface.

Indium-gallium-zinc-oxide thin-film transistors:Materials,devices,and applications

Since the invention of amorphous indium-gallium-zinc-oxide(IGZO)based thin-film transistors(TFTs)by Hideo Hosono in 2004,investigations on the topic of IGZO TFTs have been rapidly expanded thanks to their high electrical performance,large-area uniformity,and low processing temperature.This article reviews the recent progress and major trends in the field of IGZO-based TFTs.After a brief introduction of the history of IGZO and the main advantages of IGZO-based TFTs,an overview of IGZO materials and IGZO-based TFTs is given.In this part,IGZO material electron travelling orbitals and deposition methods are introduced,and the specific device structures and electrical performance are also presented.Afterwards,the recent advances of IGZO-based TFT applications are summarized,including flat panel display drivers,novel sensors,and emerging neuromorphic systems.In particular,the realization of flexible electronic systems is discussed.The last part of this review consists of the conclusions and gives an outlook over the field with a prediction for the future.

High-Performance Photo-Modulated Thin-Film Transistor Based on Quantum dots/Reduced Graphene Oxide Fragment-Decorated ZnO Nanowires

In this paper, a photo-modulated transistor based on the thin-film transistor structure was fabricated on the flexible substrate by spin-coating and magnetron sputtering. A novel hybrid material that composed of Cd Se quantum dots and reduced graphene oxide(RGO) fragment-decorated ZnO nanowires was synthesized to overcome the narrow optical sensitive waveband and enhance the photo-responsivity. Due to the enrichment of the interface and heterostructure by RGO fragments being utilized, the photo-responsivity of the transistor was improved to 2000 AW^(-1) and the photo-sensitive wavelength was extended from ultraviolet to visible. In addition, a positive back-gate voltage was employed to reduce the Schottky barrier width of RGO fragments and ZnO nanowires. As a result, the amount of carriers was increased by 10 folds via the modulation of back-gate voltage. With these inherent properties, such as integrated circuit capability and wide optical sensitive waveband, the transistor will manifest great potential in the future applications in photodetectors.

Temperature-dependent bias-stress-induced electrical instability of amorphous indium-gallium-zinc-oxide thin-film transistors

The time and temperature dependence of threshold voltage shift under positive-bias stress（PBS） and the following recovery process are investigated in amorphous indium-gallium-zinc-oxide（a-IGZO） thin-film transistors. It is found that the time dependence of threshold voltage shift can be well described by a stretched exponential equation in which the time constant τ is found to be temperature dependent. Based on Arrhenius plots, an average effective energy barrier Eτ stress= 0.72 eV for the PBS process and an average effective energy barrier Eτ recovery= 0.58 eV for the recovery process are extracted respectively. A charge trapping/detrapping model is used to explain the threshold voltage shift in both the PBS and the recovery process. The influence of gate bias stress on transistor performance is one of the most critical issues for practical device development.

Concise Modeling of Amorphous Dual-Gate In-Ga-Zn-O Thin-Film Transistors for Integrated Circuit Designs

An analytical model for current-voltage behavior of amorphous In-Ga-Zn-O thin-film transistors（a-IGZO TFTs）with dual-gate structures is developed.The unified expressions for synchronous and asynchronous operating modes are derived on the basis of channel charges,which are controlled by gate voltage.It is proven that the threshold voltage of asynchronous dual-gate IGZO TFTs is adjusted in proportion to the ratio of top insulating capacitance to the bottom insulating capacitance（C_（TI）/C_（BI））.Incorporating the proposed model with Verilog-A,a touch-sensing circuit using dual-gate structure is investigated by SPICE simulations.Comparison shows that the touch sensitivity is increased by the dual-gate IGZO TFT structure.

Effects of annealing process on characteristics of fully transparent zinc tin oxide thin-film transistor

Annealing effect on the performance of fully transparent thin-film transistor （TTFT）, in which zinc tin oxide （ZnSnO） is used as the channel material and SiO2 as the gate insulator, is investigated. The ZnSnO active layer is deposited by radio frequency magnetron sputtering while a SiO2 gate insulator is formed by plasma-enhanced chemical vapor deposition. The saturation field-effect mobility and on/off ratio of the TTFT are improved by low temperature annealing in vacuum. Maximum saturation field-effect mobility and on/off ratio of 56.2 cm2/（V.s） and 3×10^5 are obtained, respectively. The transfer characteristics of the ZnSnO TPT are simulated using an analytical model and good agreement between measured and the calculated transfer characteristics is demonstrated.

Modeling of an Internal Stress and Strain Distribution of an Inverted Staggered Thin-Film Transistor Based on Two-Dimensional Mass-Spring-Damper Structure

Equipped with a two-dimensional topological structure,a group of masses,springs and dampers can be demonstrated to model the internal dynamics of a thin-film transistor(TFT).In this paper,the two-dimensional Mass-Spring-Damper(MSD)representation of an inverted staggered TFT is proposed to explore the TFT’s internal stress/strain distributions,and the stress-induced effects on TFT’s electrical characteristics.The 2DMSD model is composed of a finite but massive number of interconnected cellular units.The parameters,such as mass,stiffness,and damping ratios,of each cellular unit are approximated from constitutive equations of the compositematerials,while the electrical properties of the inverted staggered TFT are characterized by utilizing an electro-mechanical coupling relation derived from the quantum mechanics.TFTs are often used in biomedical sensors/transducers attached to human skins,and,for the purpose of simulation and validation,the boundary conditions on the interface between the TFT and the human skin were modeled as a spatially distributed sinusoidal excitation with a frequency of 50 Hz,assuming the TFT thickness is more than tens of microns.The fidelity of the 2D MSD structure in the modeling of an inverted staggered TFT is verified by comparing its simulated total displacement fieldwith that of a finite element analysis(FEA)model.The advantages of the MSD model include a dramatic reduction in memory use by up to 60%and faster computation times that are up to 80%lower.More importantly,the MSD model is better suited than FEA to many problems in accurate tissue modeling for medical applications,for which FEA is becoming a bottleneck.This work develops a novel modeling approach,which can be extended to other types of flexible thin film transistors.

Al_(2)O_(3)/HfO_(2) Nanolaminate Dielectric Boosting IGZO-Based Flexible Thin-Film Transistors

Flexible thin-film transistors(TFTs)have attracted wide interest in the development of flexible and wearable displays or sensors.However,the conventional high processing temperatures hinder the preparation of stable and reliable dielectric materials on flexible substrates.Here,we develop a stable laminated Al_(2)O_(3)/HfO_(2) insulator by atomic layer deposition at a relatively lower temperature of 150℃.A sputtered amorphous indium-gallium-zinc oxide(IGZO)with the stoichiometry of In_(0.37)Ga_(0.20)Zn_(0.18)O_(0.25) is used as the active channel material.The flexible TFTs with bottom-gate top-contacted configuration are further fabricated on a flexible polyimide substrate with the Al_(2)O_(3)/HfO_(2) nanolaminates.Benefited from the unique structural and compositional configuration in the nanolaminates consisting of amorphous Al_(2)O_(3),crystallized HfO_(2),and the aluminate Al-Hf-O phase,the as-prepared TFTs present the carrier mobilities of 9.7 cm^(2) V^(−1) s^(−1),ON/OFF ratio of-1.3×10^(6),subthreshold voltage of 0.1 V,saturated current up to 0.83 mA,and subthreshold swing of 0.256 V dec^(−1),signifying a high-performance flexible TFT,which simultaneously able to withstand the bending radius of 40 mm.The TFTs with nanolaminate insulator possess satisfactory humidity stability and hysteresis behavior in a relative humidity of 60-70%,a temperature of 25-30℃ environment.The yield of IGZO-based TFTs with the nanolaminate insulator reaches 95%.

基于Swin Transformer轻量化的TFT-LCD面板缺陷分类算法

在TFT-LCD面板缺陷检测中,检测对象背景复杂、缺陷细微且种类繁多,而工业生产实时性要求高,传统的缺陷分类算法往往难以兼顾精度和速度要求,无法适用于实际生产应用。为均衡TFT-LCD面板缺陷分类的准确率和速率,提出一种基于Swin Transformer的轻量化深度学习图像分类模型。首先对模型每层输入的特征图进行Token融合以减少模型计算量,从而提高模型的轻量化水平。其次引入深度可分离卷积模块以帮助模型增加卷积归纳偏置,从而缓解模型对海量数据的依赖问题。最后使用知识蒸馏方法来克服模型轻量化导致的检测精度下降问题。在自制TFT-LCD面板缺陷分类数据集上的实验表明,本文提出的改进模型相比基线模型,FLOPs计算量降低了2.6 G,速度指标提升了17%,而Top-1 Acc精度仅损失1.3%,且与其他图像分类主流模型相比,在自制数据集和公开数据集上都具有更均衡的精度和速度。

Review of flexible and transparent thin-film transistors based on zinc oxide and related materials

Flexible and transparent electronics enters into a new era of electronic technologies.Ubiquitous applications involve wearable electronics,biosensors,flexible transparent displays,radio-frequency identifications（RFIDs）,etc.Zinc oxide（ZnO） and relevant materials are the most commonly used inorganic semiconductors in flexible and transparent devices,owing to their high electrical performances,together with low processing temperatures and good optical transparencies.In this paper,we review recent advances in flexible and transparent thin-film transistors（TFTs） based on ZnO and relevant materials.After a brief introduction,the main progress of the preparation of each component（substrate,electrodes,channel and dielectrics） is summarized and discussed.Then,the effect of mechanical bending on electrical performance is highlighted.Finally,we suggest the challenges and opportunities in future investigations.

Improvement in the electrical performance and bias-stress stability of dual-active-layered silicon zinc oxide/zinc oxide thin-film transistor

Si-doped zinc oxide（SZO） thin films are deposited by using a co-sputtering method,and used as the channel active layers of ZnO-based TFTs with single and dual active layer structures.The effects of silicon content on the optical transmittance of the SZO thin film and electrical properties of the SZO TFT are investigated.Moreover,the electrical performances and bias-stress stabilities of the single- and dual-active-layer TFTs are investigated and compared to reveal the effects of the Si doping and dual-active-layer structure.The average transmittances of all the SZO films are about 90% in the visible light region of 400 nm-800 nm,and the optical band gap of the SZO film gradually increases with increasing Si content.The Si-doping can effectively suppress the grain growth of ZnO,revealed by atomic force microscope analysis.Compared with that of the undoped ZnO TFT,the off-state current of the SZO TFT is reduced by more than two orders of magnitude and it is 1.5 × 10^-12 A,and thus the on/off current ratio is increased by more than two orders of magnitude.In summary,the SZO/ZnO TFT with dual-active-layer structure exhibits a high on/off current ratio of 4.0 × 10^6 and superior stability under gate-bias and drain-bias stress.

Atomic layer deposition for nanoscale oxide semiconductor thin film transistors:review and outlook

Since the first report of amorphous In–Ga–Zn–O based thin film transistors,interest in oxide semiconductors has grown.They offer high mobility,low off-current,low process temperature,and wide flexibility for compositions and processes.Unfortunately,depositing oxide semiconductors using conventional processes like physical vapor deposition leads to problematic issues,especially for high-resolution displays and highly integrated memory devices.Conventional approaches have limited process flexibility and poor conformality on structured surfaces.Atomic layer deposition(ALD)is an advanced technique which can provide conformal,thickness-controlled,and high-quality thin film deposition.Accordingly,studies on ALD based oxide semiconductors have dramatically increased recently.Even so,the relationships between the film properties of ALD-oxide semiconductors and the main variables associated with deposition are still poorly understood,as are many issues related to applications.In this review,to introduce ALD-oxide semiconductors,we provide:(a)a brief summary of the history and importance of ALD-based oxide semiconductors in industry,(b)a discussion of the benefits of ALD for oxide semiconductor deposition(in-situ composition control in vertical distribution/vertical structure engineering/chemical reaction and film properties/insulator and interface engineering),and(c)an explanation of the challenging issues of scaling oxide semiconductors and ALD for industrial applications.This review provides valuable perspectives for researchers who have interest in semiconductor materials and electronic device applications,and the reasons ALD is important to applications of oxide semiconductors.