Code converters are essential in digital nano communication;therefore,a low-complexity optimal QCA layout for a BCD to Excess-3 code converter has been proposed in this paper.A QCA clockphase-based design technique wa...Code converters are essential in digital nano communication;therefore,a low-complexity optimal QCA layout for a BCD to Excess-3 code converter has been proposed in this paper.A QCA clockphase-based design technique was adopted to investigate integration with other complicated circuits.Using a unique XOR gate,the recommended circuit’s cell complexity has been decreased.The findings produced using the QCADesigner-2.0.3,a reliable simulation tool,prove the effectiveness of the current structure over earlier designs by considering the number of cells deployed,the area occupied,and the latency as design metrics.In addition,the popular tool QCAPro was used to estimate the energy dissipation of the proposed design.The proposed technique reduces the occupied space by∼40%,improves cell complexity by∼20%,and reduces energy dissipation by∼1.8 times(atγ=1.5EK)compared to the current scalable designs.This paper also studied the suggested structure’s energy dissipation and compared it to existing works for a better performance evaluation.展开更多
Time-to-Digital Converter (TDC) is a key block used as the phase/frequency detector in an All-Digital Phase-Locked Loop (ADPLL). Usually, it occupies a large proportion of ADPLL's total power consumption up to abo...Time-to-Digital Converter (TDC) is a key block used as the phase/frequency detector in an All-Digital Phase-Locked Loop (ADPLL). Usually, it occupies a large proportion of ADPLL's total power consumption up to about 30% to 40%. In this paper, the detailed power consumption of different components in the TDC is analyzed. A Power Management Block (PMB) is presented for the TDC to reduce its power consumption. A 24-bits TDC core with the proposed PMB is implemented in HJTC 0.18 μm CMOS technology. Simulation results show that up to 84% power reduction is achieved using our proposed technique.展开更多
A two-step high-precision Time-to-Digital Converter(TDC),integrated with a Single-Photon Avalanche Diode(SPAD),used for Time-Of-Flight(TOF)application,has been developed and tested.Time interval measurement is perform...A two-step high-precision Time-to-Digital Converter(TDC),integrated with a Single-Photon Avalanche Diode(SPAD),used for Time-Of-Flight(TOF)application,has been developed and tested.Time interval measurement is performed by the coarse counter and fine interpolator,which are utilized to measure the total periods and the residue time of the reference clock,respectively.Following a detail analysis of time precision and clock jitter in the two-step structure,the prototype TDC fabricated in GSMC 1P6M 0.18μm CMOS Image Sensor(CIS)technology exhibits a Single-Shot Precision(SSP)of 11.415 ps and a dynamic range of 216.7 ns.In addition,a pixel of the chip occupies 100μm×100μm,and the measured Integral Nonlinearity(INL)and Differential Nonlinearity(DNL)are better than±0.88 LSB and±0.67 LSB,respectively.Meanwhile,the overall power consumption of the chip is 35 mW at 1.8 V power supply.Combined with these characteristics,the designed chip is suitable for TOF-based ranging applications.展开更多
A kind of architecture of Time-to-Digital Converter(TDC) for Ultra-WideBand(UWB) application is presented. The proposed TDC is based on pulse shrinking, and implemented in a Field Programmable Gate Array(FPGA) device....A kind of architecture of Time-to-Digital Converter(TDC) for Ultra-WideBand(UWB) application is presented. The proposed TDC is based on pulse shrinking, and implemented in a Field Programmable Gate Array(FPGA) device. The pulse shrinking is realized in a loop containing two Programmable Delay Lines(PDLs) or a two-channel PDL. One line(channel) delays the rising edge and the other line(channel) delays the falling edge of a circulating pulse. Delay resolution of PDL is converted into a digital output code under known conditions of pulse width. This delay resolution measurement mechanism is different from the conventional time interval measurement mechanism based on pulse shrinking of conversion of unknown pulse width into a digital output code. This mechanism automatically avoids the influence of unwanted pulse shrinking by any circuit element apart from the lines. The achieved relative errors for four PDLs are within 0.80%–1.60%.展开更多
This paperpresents a single-stage Vernier Time-to-Digital Converter (VTDC) that utilizes the dynamic-logic phase detector. The zero dead-zone characteristic of this phase detector allows for the single-stage VTDC to d...This paperpresents a single-stage Vernier Time-to-Digital Converter (VTDC) that utilizes the dynamic-logic phase detector. The zero dead-zone characteristic of this phase detector allows for the single-stage VTDC to deliver sub-gate delay time resolution. The single-stage VTDC has been designed in 0.13μm CMOS technology. The simulation results demonstrate a linear input-output characteristic for input dynamic range from 0 to 1.6ns with a time resolution of 25ps.展开更多
Recently, resonant AC/DC converter has been accepted by the industry. However, the efficiency will be decreased at light load. So, a novel topology with critical controlling mode combined with resonant ones is propose...Recently, resonant AC/DC converter has been accepted by the industry. However, the efficiency will be decreased at light load. So, a novel topology with critical controlling mode combined with resonant ones is proposed in this paper. The new topology can correspond to a 90 plus percent of power converting. So,a novel topology of an state of art integrated circuit, which can be used as power management circuit, has been designed based on the above new topology. A simulator which is specifically suitable for the power controller has been founded in this work and it has been used for the simulation of the novel architecture and the proposed integrated circuit.展开更多
The behavior of matrix converter(MC) drive systems under the condition of MC short-circuit faults is comprehensively investigated. Two isolation strategies using semiconductors and high speed fuses(HSFs) for MC short-...The behavior of matrix converter(MC) drive systems under the condition of MC short-circuit faults is comprehensively investigated. Two isolation strategies using semiconductors and high speed fuses(HSFs) for MC short-circuit faults are examined and their performances are compared. The behavior of MC drive systems during the fuse action time under different operating conditions is explored. The feasibility of fault-tolerant operation during the fuse action time is also studied. The basic selection laws for the HSFs and the requirements for the passive components of the MC drive system from the point view of short-circuit faults are also discussed. Simulation results are used to demonstrate the feasibility of the proposed isolation strategies.展开更多
Based on the fact that the real inductor and the real capacitor are fractional order in nature and the fractional calculus,the transfer function modeling and analysis of the open-loop Buck converter in a continuous co...Based on the fact that the real inductor and the real capacitor are fractional order in nature and the fractional calculus,the transfer function modeling and analysis of the open-loop Buck converter in a continuous conduction mode(CCM) operation are carried out in this paper.The fractional order small signal model and the corresponding equivalent circuit of the open-loop Buck converter in a CCM operation are presented.The transfer functions from the input voltage to the output voltage,from the input voltage to the inductor current,from the duty cycle to the output voltage,from the duty cycle to the inductor current,and the output impedance of the open-loop Buck converter in CCM operation are derived,and their bode diagrams and step responses are calculated,respectively.It is found that all the derived fractional order transfer functions of the system are influenced by the fractional orders of the inductor and the capacitor.Finally,the realization of the fractional order inductor and the fractional order capacitor is designed,and the corresponding PSIM circuit simulation results of the open-loop Buck converter in CCM operation are given to confirm the correctness of the derivations and the theoretical analysis.展开更多
Modelling of bidirectional full bridge DC-DC converter as one of the most applicable converters has received significant attention. Mathematical modelling reduces the simulation time in comparison with detailed circui...Modelling of bidirectional full bridge DC-DC converter as one of the most applicable converters has received significant attention. Mathematical modelling reduces the simulation time in comparison with detailed circuit response;moreover it is convenient for controller design purpose. Due to simple and effective methodology, average state space is the most common method among the modelling methods. In this paper a bidirectional full bridge converter is modelled by average state space and for each mode of operations a controller is designed. Attained mathematical model results are in a close agreement with detailed circuit simulation.展开更多
This paper presents a multi-mode control scheme for a soft-switched flyback converter to achieve high efficiency and excellent load regulation over the entire load range. At heavy load, critical conduction mode with v...This paper presents a multi-mode control scheme for a soft-switched flyback converter to achieve high efficiency and excellent load regulation over the entire load range. At heavy load, critical conduction mode with valley switching (CCMVS) is employed to realize soft switching so as to reduce turn-on loss of power switch as well as conducted electromagnetic interference (EMI). At light load, the converter operates in discontinuous conduction mode (DCM) with valley switching and adaptive off-time control (AOT) to limit the switching frequency range and maintain load regulation. At extremely light load or in standby mode, burst mode operation is adopted to provide low power consumption through reducing both switching frequency and static power dissipation of the controller. The multi-mode control is implemented by an oscillator whose pulse duration is adjusted by output feedback. An accurate valley switching control circuit guarantees the minimum turn-on voltage drop of power switch. The pro-totype of the controller IC was fabricated in a 1.5-μm BiCMOS process and applied to a 310 V/20 V, 90 W flyback DC/DC converter circuitry. Experimental results showed that all expected functions were realized successfully. The flyback converter achieved a high efficiency of over 80% from full load down to 2.5 W, with the maximum reaching 88.8%, while the total power consumption in standby mode was about 300 mW.展开更多
The zero-voltage quasi-resonant boost switching DC-DC converter has been inves-tigated by using the time averaging equivalent circuit approach of periodically switching linearnetworks.The DC steady state and AC small ...The zero-voltage quasi-resonant boost switching DC-DC converter has been inves-tigated by using the time averaging equivalent circuit approach of periodically switching linearnetworks.The DC steady state and AC small signal characteristics of the converter are also given.展开更多
The working of Canonical switching cell(CSC)converter was studied and its equivalent circuit during ON and OFF states were obtained.State space model of CSC converter in ON and OFF states were developed using the Kirc...The working of Canonical switching cell(CSC)converter was studied and its equivalent circuit during ON and OFF states were obtained.State space model of CSC converter in ON and OFF states were developed using the Kirchhoff laws.The state space matrices were used to construct the transfer functions of ON&OFF states.The step response of the converter was simulated using MATLAB.The step response curve was obtained using different values of circuit components(L,C1,C2 and RL)and optimized.The characteristic parameters such as rise time,overshoot,settling time,steady state error and stability were determined using the step response curve.The response curve shows that there is no overshoot;the rise time and settling time are very low as expected for a converter and its stability is very high but the amplitude is very.The circuit was tuned to attain the expected amplitude using PID controller with the help of Genetic algorithm.The excellent results of circuits’characteristic parameters are very useful guideline for constructing such CSC converters for DC-DC conversions.The circuit characteristic parameters are useful in constructing such CSC converters for DCDC conversions in driving solar energy using solar panel.展开更多
The manufacturing of spiral groove structure of two-dimensional valve(2D valve)feedback mechanism has shortcomings of both high cost and time-consuming.This paper presents a novel configuration of rotary electro-mecha...The manufacturing of spiral groove structure of two-dimensional valve(2D valve)feedback mechanism has shortcomings of both high cost and time-consuming.This paper presents a novel configuration of rotary electro-mechanical converter with negative feedback mechanism(REMC-NFM)in order to replace the feedback mechanism of spiral groove and thus reduce cost of valve manufacturing.In order to rapidly and quantitative evaluate the driving and feedback performance of the REMC-NFM,an analytical model taking leakage flux,edge effect and permeability nonlinearity into account is formulated based on the equivalent magnetic circuit approach.Then the model is properly simplified in order to obtain the optimal pitch angle.FEM simulation is used to study the influence of crucial parameters on the performance of REMC-NFM.A prototype of REMC-NFM is designed and machined,and an exclusive experimental platform is built.The torque-angle characteristics,torque-displacement characteristics,and magnetic flux density in the working air gap with different excitation currents are measured.The experimental results are in good agreement with the analytical and FEM simulated results,which verifies the correctness of the analytical model.For torque-angle characteristics,the overall torque increases with both current and rotation angle,which reaches about 0.48 N·m with 1.5 A and 1.5°.While for torque-displacement characteristics,the overall torque increases with current yet decrease with armature displacement due to the negative feedback mechanism,which is about 0.16 N·m with 1.5 A and 0.8 mm.Besides,experimental results of conventional torque motor are compared with counterparts of REMC-NFM in order to validate the simplified model.The research indicates that the REMC-NFM can be potentially used as the electro-mechanical converter for 2D valves in civil servo areas.展开更多
In this paper, a hybrid control strategy for a matrix converter fed wind energy conversion system is presented. Since the wind speed may vary, output parameters like power, frequency and voltage may fluctuate. Hence i...In this paper, a hybrid control strategy for a matrix converter fed wind energy conversion system is presented. Since the wind speed may vary, output parameters like power, frequency and voltage may fluctuate. Hence it is necessary to design a system that regulates output parameters, such as voltage and frequency, and thereby provides a constant voltage and frequency output from the wind energy conversion system. Matrix converter is used in the proposed solution as the main power conditioner as a more efficient alternative when compared to traditional back-back converter structure. To control the output voltage, a vector modulation based refined control structure is used. A power tracker is included to maximize the mechanical output power of the turbine. Over current protection and clamp circuit input protection have been introduced to protect the system from over current. It reduces the spikes generated at the output of the converter. The designed system is capable of supplying an output voltage of constant frequency and amplitude within the expected ranges of input during the operation. The matrix converter control using direct modulation method, modified Venturini modulation method and vector modulation method was simulated, the results were compared and it was inferred that vector modulation method was superior to the other two methods. With the proposed technique, voltage transfer ratio and harmonic profile have been improved compared to the other two modulation techniques. The behaviour of the system is corroborated by MATLAB Simulink, and hardware is realized using an FPGA controller. Experimental results are found to be matching with the simulation results.展开更多
With rapid growth of power demand, transmission capacity is also in urgent need of upgrading. In some cases, converting existing AC transmission lines to DC lines can Improve the transmission capacity and reduce the c...With rapid growth of power demand, transmission capacity is also in urgent need of upgrading. In some cases, converting existing AC transmission lines to DC lines can Improve the transmission capacity and reduce the construction investment. In this paper, the upstream finite element method was expanded to calculate the total electric field of same tower multi-circuit DC lines converted from double-circuit AC lines, and the validity of the algorithm was confirmed by experiments. Taking a DC line converted from a typical same tower 500 kV double-circuit AC transmission line as an example, the surface electric field and the ground total electric field in different pole conductor arrangement schemes were calculated and analyzed, and the critical height of pole conductors for DC lines in residential and non-residential area were determined. Then, the corridor width of DC and AC lines at critical height in residential and non-residential areas before and after AC-DC line transformation were compared. The results indicate that for DC lines converted from common 500 kV double-circuit AC lines, the ground total electric field can meet the requirements of corresponding standard with appropriate pole conductor arrangement schemes.展开更多
文摘Code converters are essential in digital nano communication;therefore,a low-complexity optimal QCA layout for a BCD to Excess-3 code converter has been proposed in this paper.A QCA clockphase-based design technique was adopted to investigate integration with other complicated circuits.Using a unique XOR gate,the recommended circuit’s cell complexity has been decreased.The findings produced using the QCADesigner-2.0.3,a reliable simulation tool,prove the effectiveness of the current structure over earlier designs by considering the number of cells deployed,the area occupied,and the latency as design metrics.In addition,the popular tool QCAPro was used to estimate the energy dissipation of the proposed design.The proposed technique reduces the occupied space by∼40%,improves cell complexity by∼20%,and reduces energy dissipation by∼1.8 times(atγ=1.5EK)compared to the current scalable designs.This paper also studied the suggested structure’s energy dissipation and compared it to existing works for a better performance evaluation.
基金Supported by the Tsinghua National Laboratory for Information Science and Technology(TNList)Cross-Discipline Foundationthe National Science and Technology Major Project(No.2010ZX03006-003-01)
文摘Time-to-Digital Converter (TDC) is a key block used as the phase/frequency detector in an All-Digital Phase-Locked Loop (ADPLL). Usually, it occupies a large proportion of ADPLL's total power consumption up to about 30% to 40%. In this paper, the detailed power consumption of different components in the TDC is analyzed. A Power Management Block (PMB) is presented for the TDC to reduce its power consumption. A 24-bits TDC core with the proposed PMB is implemented in HJTC 0.18 μm CMOS technology. Simulation results show that up to 84% power reduction is achieved using our proposed technique.
基金National Natural Science Foundation of China(61774129,61827812,61704145)Hunan Science and Technology Department Huxiang High-level Talent Gathering Project(2019RS1037)Changsha Science and Technology Plan Key Projects(kq1801035)。
文摘A two-step high-precision Time-to-Digital Converter(TDC),integrated with a Single-Photon Avalanche Diode(SPAD),used for Time-Of-Flight(TOF)application,has been developed and tested.Time interval measurement is performed by the coarse counter and fine interpolator,which are utilized to measure the total periods and the residue time of the reference clock,respectively.Following a detail analysis of time precision and clock jitter in the two-step structure,the prototype TDC fabricated in GSMC 1P6M 0.18μm CMOS Image Sensor(CIS)technology exhibits a Single-Shot Precision(SSP)of 11.415 ps and a dynamic range of 216.7 ns.In addition,a pixel of the chip occupies 100μm×100μm,and the measured Integral Nonlinearity(INL)and Differential Nonlinearity(DNL)are better than±0.88 LSB and±0.67 LSB,respectively.Meanwhile,the overall power consumption of the chip is 35 mW at 1.8 V power supply.Combined with these characteristics,the designed chip is suitable for TOF-based ranging applications.
基金Supported by the National High Technology Research and Development Program(No.2012AA121901)
文摘A kind of architecture of Time-to-Digital Converter(TDC) for Ultra-WideBand(UWB) application is presented. The proposed TDC is based on pulse shrinking, and implemented in a Field Programmable Gate Array(FPGA) device. The pulse shrinking is realized in a loop containing two Programmable Delay Lines(PDLs) or a two-channel PDL. One line(channel) delays the rising edge and the other line(channel) delays the falling edge of a circulating pulse. Delay resolution of PDL is converted into a digital output code under known conditions of pulse width. This delay resolution measurement mechanism is different from the conventional time interval measurement mechanism based on pulse shrinking of conversion of unknown pulse width into a digital output code. This mechanism automatically avoids the influence of unwanted pulse shrinking by any circuit element apart from the lines. The achieved relative errors for four PDLs are within 0.80%–1.60%.
文摘This paperpresents a single-stage Vernier Time-to-Digital Converter (VTDC) that utilizes the dynamic-logic phase detector. The zero dead-zone characteristic of this phase detector allows for the single-stage VTDC to deliver sub-gate delay time resolution. The single-stage VTDC has been designed in 0.13μm CMOS technology. The simulation results demonstrate a linear input-output characteristic for input dynamic range from 0 to 1.6ns with a time resolution of 25ps.
基金supported by Program for New Century Excellent Talents in University(NCET)(2008)Funding Project for Academic Human Resources Development in Institutions of Higher Learning Under the Jurisdiction of Beijing Municipality+1 种基金 (PHR(IHLB)) and Beijing Novel Research Star(2005B01)Ministry of Beijing Science and Technology
文摘Recently, resonant AC/DC converter has been accepted by the industry. However, the efficiency will be decreased at light load. So, a novel topology with critical controlling mode combined with resonant ones is proposed in this paper. The new topology can correspond to a 90 plus percent of power converting. So,a novel topology of an state of art integrated circuit, which can be used as power management circuit, has been designed based on the above new topology. A simulator which is specifically suitable for the power controller has been founded in this work and it has been used for the simulation of the novel architecture and the proposed integrated circuit.
基金Project(50807002) supported by the National Natural Science Foundation of ChinaProject(SKLD10KM05) supported by Opening Fund of State Key Laboratory of Power System and Generation EquipmentsProject(201206025007) supported by the National Scholarship Fund,China
文摘The behavior of matrix converter(MC) drive systems under the condition of MC short-circuit faults is comprehensively investigated. Two isolation strategies using semiconductors and high speed fuses(HSFs) for MC short-circuit faults are examined and their performances are compared. The behavior of MC drive systems during the fuse action time under different operating conditions is explored. The feasibility of fault-tolerant operation during the fuse action time is also studied. The basic selection laws for the HSFs and the requirements for the passive components of the MC drive system from the point view of short-circuit faults are also discussed. Simulation results are used to demonstrate the feasibility of the proposed isolation strategies.
基金Project supported by the National Natural Science Foundation of China (Grant No. 51007068)the Specialized Research Fund for the Doctoral Program of Higher Education of China (Grant No. 20100201120028)+2 种基金the Natural Science Basic Research Plan in Shaanxi Province of China (Grant No. 2012JQ7026)the Fundamental Research Funds for the Central Universities of China (Grant No. 2012jdgz09)the State Key Laboratory of Electrical Insulation and Power Equipment of China (Grant No. EIPE12303)
文摘Based on the fact that the real inductor and the real capacitor are fractional order in nature and the fractional calculus,the transfer function modeling and analysis of the open-loop Buck converter in a continuous conduction mode(CCM) operation are carried out in this paper.The fractional order small signal model and the corresponding equivalent circuit of the open-loop Buck converter in a CCM operation are presented.The transfer functions from the input voltage to the output voltage,from the input voltage to the inductor current,from the duty cycle to the output voltage,from the duty cycle to the inductor current,and the output impedance of the open-loop Buck converter in CCM operation are derived,and their bode diagrams and step responses are calculated,respectively.It is found that all the derived fractional order transfer functions of the system are influenced by the fractional orders of the inductor and the capacitor.Finally,the realization of the fractional order inductor and the fractional order capacitor is designed,and the corresponding PSIM circuit simulation results of the open-loop Buck converter in CCM operation are given to confirm the correctness of the derivations and the theoretical analysis.
文摘Modelling of bidirectional full bridge DC-DC converter as one of the most applicable converters has received significant attention. Mathematical modelling reduces the simulation time in comparison with detailed circuit response;moreover it is convenient for controller design purpose. Due to simple and effective methodology, average state space is the most common method among the modelling methods. In this paper a bidirectional full bridge converter is modelled by average state space and for each mode of operations a controller is designed. Attained mathematical model results are in a close agreement with detailed circuit simulation.
基金the National Natural Science Foundation of China (No. 90707002)the Natural Science Foundation of Zheji-ang Province, China (No. Z104441)
文摘This paper presents a multi-mode control scheme for a soft-switched flyback converter to achieve high efficiency and excellent load regulation over the entire load range. At heavy load, critical conduction mode with valley switching (CCMVS) is employed to realize soft switching so as to reduce turn-on loss of power switch as well as conducted electromagnetic interference (EMI). At light load, the converter operates in discontinuous conduction mode (DCM) with valley switching and adaptive off-time control (AOT) to limit the switching frequency range and maintain load regulation. At extremely light load or in standby mode, burst mode operation is adopted to provide low power consumption through reducing both switching frequency and static power dissipation of the controller. The multi-mode control is implemented by an oscillator whose pulse duration is adjusted by output feedback. An accurate valley switching control circuit guarantees the minimum turn-on voltage drop of power switch. The pro-totype of the controller IC was fabricated in a 1.5-μm BiCMOS process and applied to a 310 V/20 V, 90 W flyback DC/DC converter circuitry. Experimental results showed that all expected functions were realized successfully. The flyback converter achieved a high efficiency of over 80% from full load down to 2.5 W, with the maximum reaching 88.8%, while the total power consumption in standby mode was about 300 mW.
文摘The zero-voltage quasi-resonant boost switching DC-DC converter has been inves-tigated by using the time averaging equivalent circuit approach of periodically switching linearnetworks.The DC steady state and AC small signal characteristics of the converter are also given.
文摘The working of Canonical switching cell(CSC)converter was studied and its equivalent circuit during ON and OFF states were obtained.State space model of CSC converter in ON and OFF states were developed using the Kirchhoff laws.The state space matrices were used to construct the transfer functions of ON&OFF states.The step response of the converter was simulated using MATLAB.The step response curve was obtained using different values of circuit components(L,C1,C2 and RL)and optimized.The characteristic parameters such as rise time,overshoot,settling time,steady state error and stability were determined using the step response curve.The response curve shows that there is no overshoot;the rise time and settling time are very low as expected for a converter and its stability is very high but the amplitude is very.The circuit was tuned to attain the expected amplitude using PID controller with the help of Genetic algorithm.The excellent results of circuits’characteristic parameters are very useful guideline for constructing such CSC converters for DC-DC conversions.The circuit characteristic parameters are useful in constructing such CSC converters for DCDC conversions in driving solar energy using solar panel.
基金National Natural Science Foundation of China(Grant Nos.51975524,51405443)National Key Research and Development Program of China(Grant No.2019YFB2005200).
文摘The manufacturing of spiral groove structure of two-dimensional valve(2D valve)feedback mechanism has shortcomings of both high cost and time-consuming.This paper presents a novel configuration of rotary electro-mechanical converter with negative feedback mechanism(REMC-NFM)in order to replace the feedback mechanism of spiral groove and thus reduce cost of valve manufacturing.In order to rapidly and quantitative evaluate the driving and feedback performance of the REMC-NFM,an analytical model taking leakage flux,edge effect and permeability nonlinearity into account is formulated based on the equivalent magnetic circuit approach.Then the model is properly simplified in order to obtain the optimal pitch angle.FEM simulation is used to study the influence of crucial parameters on the performance of REMC-NFM.A prototype of REMC-NFM is designed and machined,and an exclusive experimental platform is built.The torque-angle characteristics,torque-displacement characteristics,and magnetic flux density in the working air gap with different excitation currents are measured.The experimental results are in good agreement with the analytical and FEM simulated results,which verifies the correctness of the analytical model.For torque-angle characteristics,the overall torque increases with both current and rotation angle,which reaches about 0.48 N·m with 1.5 A and 1.5°.While for torque-displacement characteristics,the overall torque increases with current yet decrease with armature displacement due to the negative feedback mechanism,which is about 0.16 N·m with 1.5 A and 0.8 mm.Besides,experimental results of conventional torque motor are compared with counterparts of REMC-NFM in order to validate the simplified model.The research indicates that the REMC-NFM can be potentially used as the electro-mechanical converter for 2D valves in civil servo areas.
文摘In this paper, a hybrid control strategy for a matrix converter fed wind energy conversion system is presented. Since the wind speed may vary, output parameters like power, frequency and voltage may fluctuate. Hence it is necessary to design a system that regulates output parameters, such as voltage and frequency, and thereby provides a constant voltage and frequency output from the wind energy conversion system. Matrix converter is used in the proposed solution as the main power conditioner as a more efficient alternative when compared to traditional back-back converter structure. To control the output voltage, a vector modulation based refined control structure is used. A power tracker is included to maximize the mechanical output power of the turbine. Over current protection and clamp circuit input protection have been introduced to protect the system from over current. It reduces the spikes generated at the output of the converter. The designed system is capable of supplying an output voltage of constant frequency and amplitude within the expected ranges of input during the operation. The matrix converter control using direct modulation method, modified Venturini modulation method and vector modulation method was simulated, the results were compared and it was inferred that vector modulation method was superior to the other two methods. With the proposed technique, voltage transfer ratio and harmonic profile have been improved compared to the other two modulation techniques. The behaviour of the system is corroborated by MATLAB Simulink, and hardware is realized using an FPGA controller. Experimental results are found to be matching with the simulation results.
文摘With rapid growth of power demand, transmission capacity is also in urgent need of upgrading. In some cases, converting existing AC transmission lines to DC lines can Improve the transmission capacity and reduce the construction investment. In this paper, the upstream finite element method was expanded to calculate the total electric field of same tower multi-circuit DC lines converted from double-circuit AC lines, and the validity of the algorithm was confirmed by experiments. Taking a DC line converted from a typical same tower 500 kV double-circuit AC transmission line as an example, the surface electric field and the ground total electric field in different pole conductor arrangement schemes were calculated and analyzed, and the critical height of pole conductors for DC lines in residential and non-residential area were determined. Then, the corridor width of DC and AC lines at critical height in residential and non-residential areas before and after AC-DC line transformation were compared. The results indicate that for DC lines converted from common 500 kV double-circuit AC lines, the ground total electric field can meet the requirements of corresponding standard with appropriate pole conductor arrangement schemes.