一种Wi-Fi RTT/数据驱动惯性导航行人室内定位方法

为了研究基于智能手机的行人室内定位方法,并提高其精度,本文提出了一种基于Wi-Fi往返时间(RTT)、惯性测量单元(IMU)的定位系统。该方法主要包括3部分:(1)使用扩展卡尔曼滤波融合测距信息的Wi-Fi RTT室内定位方法;(2)适用于多手机使用模式的航位推算方法,该方法基于长短时记忆模型(LSTM)建立神经网络模型,预测行人运动速度及航向;(3)基于误差状态卡尔曼滤波的Wi-Fi RTT/数据驱动惯性导航融合定位方法,进一步提高定位精度。试验结果表明,与单一的基于Wi-Fi RTT方法和数据驱动惯性导航方法相比,本文方法的平均定位精度提升了10%~20%。

RTTS封隔器外中心管疲劳寿命分析

RTTS封隔器是封隔高温高压井油套环空压力的关键工具,其外中心管的失效会导致油套环空窜通,引发严重事故。为完善外中心管的失效评估体系,基于静强度、疲劳强度理论,采用有限元仿真方法溯源外中心管失效原因;建立外中心管全尺寸三维模型,简化出有限元模型,拟合外中心管材料42CrMo的材料本构模型和S-N寿命曲线;考虑坐封、射孔2种典型工况极限载荷作用下外中心管的静强度分析,将分析结果传递到NCode疲劳仿真平台,依据疲劳强度理论,进行不同平均应力载荷、不同循环特性载荷作用下的外中心管疲劳强度分析。研究结果表明:在150 kN轴向坐封载荷作用下外中心管发生高周疲劳破坏,在300 kN轴向射孔载荷作用下外中心管发生低周疲劳破坏;不同循环特性载荷对中心管寿命影响差异较大,对称循环载荷对外中心管疲劳寿命缩短最为明显。所得结论可为外中心管甚至封隔器的性能评估、优化提供技术支撑。

Recent advances in fabrication and functions of neuromorphic system based on organic field effect transistor

The development of various artificial electronics and machines would explosively increase the amount of information and data,which need to be processed via in-situ remediation.Bioinspired synapse devices can store and process signals in a parallel way,thus improving fault tolerance and decreasing the power consumption of artificial systems.The organic field effect transistor(OFET)is a promising component for bioinspired neuromorphic systems because it is suitable for large-scale integrated circuits and flexible devices.In this review,the organic semiconductor materials,structures and fabrication,and different artificial sensory perception systems functions based on neuromorphic OFET devices are summarized.Subsequently,a summary and challenges of neuromorphic OFET devices are provided.This review presents a detailed introduction to the recent progress of neuromorphic OFET devices from semiconductor materials to perception systems,which would serve as a reference for the development of neuromorphic systems in future bioinspired electronics.

High-Performance Organic Field-Effect Transistors Based on Two-Dimensional Vat Orange 3 Crystals

The exploration and research of low-cost,environmentally friendly,and sustainable organic semiconductor materials are of immense significance in various fields,including electronics,optoelectronics,and energy conversion.Unfortunately,these semiconductors have almost poor charge transport properties,which range from∼10^(−4) cm^(2)·V^(−1)·s^(−1) to∼10^(−2) cm^(2)·V^(−1)·s^(−1).Vat orange 3,as one of these organic semiconductors,has great potential due to its highly conjugated structure.We obtain high-quality multilayered Vat orange 3 crystals with two-dimensional(2D)growth on h-BN surfaces with thickness of 10–100 nm using physical vapor transport.Raman’s results confirm the stability of the chemical structure of Vat orange 3 during growth.Furthermore,by leveraging the structural advantages of 2D materials,an organic field-effect transistor with a 2D vdW vertical heterostructure is further realized with h-BN encapsulation and multilayered graphene contact electrodes,resulting in an excellent transistor performance with On/Off ratio of 104 and high field-effect mobility of 0.14 cm^(2)·V^(−1)·s^(−1).Our results show the great potential of Vat orange 3 with 2D structures in future nano-electronic applications.Furthermore,we showcase an approach that integrates organic semiconductors with 2D materials,aiming to offer new insights into the study of organic semiconductors.

Dynamic response of a thermal transistor to time-varying signals

Thermal transistor,the thermal analog of an electronic transistor,is one of the most important thermal devices for microscopic-scale heat manipulating.It is a three-terminal device,and the heat current flowing through two terminals can be largely controlled by the temperature of the third one.Dynamic response plays an important role in the application of electric devices and also thermal devices,which represents the devices’ability to treat fast varying inputs.In this paper,we systematically study two typical dynamic responses of a thermal transistor,i.e.,the response to a step-function input(a switching process)and the response to a square-wave input.The role of the length L of the control segment is carefully studied.It is revealed that when L is increased,the performance of the thermal transistor worsens badly.Both the relaxation time for the former process and the cutoff frequency for the latter one follow the power-law dependence on L quite well,which agrees with our analytical expectation.However,the detailed power exponents deviate from the expected values noticeably.This implies the violation of the conventional assumptions that we adopt.

One memristor–one electrolyte-gated transistor-based high energy-efficient dropout neuronal units

Artificial neural networks(ANN) have been extensively researched due to their significant energy-saving benefits.Hardware implementations of ANN with dropout function would be able to avoid the overfitting problem. This letter reports a dropout neuronal unit(1R1T-DNU) based on one memristor–one electrolyte-gated transistor with an ultralow energy consumption of 25 p J/spike. A dropout neural network is constructed based on such a device and has been verified by MNIST dataset, demonstrating high recognition accuracies(> 90%) within a large range of dropout probabilities up to40%. The running time can be reduced by increasing dropout probability without a significant loss in accuracy. Our results indicate the great potential of introducing such 1R1T-DNUs in full-hardware neural networks to enhance energy efficiency and to solve the overfitting problem.

Effect of external magnetic field on the instability of THz plasma waves in nanoscale graphene field-effect transistors

The instability of plasma waves in the channel of field-effect transistors will cause the electromagnetic waves with THz frequency.Based on a self-consistent quantum hydrodynamic model,the instability of THz plasmas waves in the channel of graphene field-effect transistors has been investigated with external magnetic field and quantum effects.We analyzed the influence of weak magnetic fields,quantum effects,device size,and temperature on the instability of plasma waves under asymmetric boundary conditions numerically.The results show that the magnetic fields,quantum effects,and the thickness of the dielectric layer between the gate and the channel can increase the radiation frequency.Additionally,we observed that increase in temperature leads to a decrease in both oscillation frequency and instability increment.The numerical results and accompanying images obtained from our simulations provide support for the above conclusions.

Device design principles and bioelectronic applications for flexible organic electrochemical transistors

Organic electrochemical transistors(OECTs) exhibit significant potential for applications in healthcare and human-machine interfaces, due to their tunable synthesis, facile deposition, and excellent biocompatibility. Expanding OECTs to the fexible devices will significantly facilitate stable contact with the skin and enable more possible bioelectronic applications. In this work,we summarize the device physics of fexible OECTs, aiming to offer a foundational understanding and guidelines for material selection and device architecture. Particular attention is paid to the advanced manufacturing approaches, including photolithography and printing techniques, which establish a robust foundation for the commercialization and large-scale fabrication. And abundantly demonstrated examples ranging from biosensors, artificial synapses/neurons, to bioinspired nervous systems are summarized to highlight the considerable prospects of smart healthcare. In the end, the challenges and opportunities are proposed for fexible OECTs. The purpose of this review is not only to elaborate on the basic design principles of fexible OECTs, but also to act as a roadmap for further exploration of wearable OECTs in advanced bio-applications.

Implementation of sub-100 nm vertical channel-all-around(CAA) thin-film transistor using thermal atomic layer deposited IGZO channel

In-Ga-Zn-O(IGZO) channel based thin-film transistors(TFT), which exhibit high on-off current ratio and relatively high mobility, has been widely researched due to its back end of line(BEOL)-compatible potential for the next generation dynamic random access memory(DRAM) application. In this work, thermal atomic layer deposition(TALD) indium gallium zinc oxide(IGZO) technology was explored. It was found that the atomic composition and the physical properties of the IGZO films can be modulated by changing the sub-cycles number during atomic layer deposition(ALD) process. In addition, thin-film transistors(TFTs) with vertical channel-all-around(CAA) structure were realized to explore the influence of different IGZO films as channel layers on the performance of transistors. Our research demonstrates that TALD is crucial for high density integration technology, and the proposed vertical IGZO CAA-TFT provides a feasible path to break through the technical problems for the continuous scale of electronic equipment.

Layer by Layer Self-assembly Fiber-based Flexible Electrochemical Transistor

Poly(3,4-ethylenedioxyethiophene)-polystyrene sulfonic acid(PEDOT:PSS)/polyallyl dimethyl ammonium chloride modified reduced graphene oxide(PDDA-rGO)was layer by layer self-assembled on the cotton fiber.The surface morphology and electric property was investigated.The results confirmed the dense membrane of PEDOT:PSS and the lamellar structure of PDDA-rGO on the fibers.It has excellent electrical conductivity and mechanical properties.The fiber based electrochemical transistor(FECTs)prepared by the composite conductive fiber has a maximum output current of 8.7 mA,a transconductance peak of 10 mS,an on time of 1.37 s,an off time of 1.6 s and excellent switching stability.Most importantly,the devices by layer by layer self-assembly technology opens a path for the true integration of organic electronics with traditional textile technologies and materials,laying the foundation for their later widespread application.

基于RTT更新机制的BBR拥塞预防控制算法

经典瓶颈链路带宽和往返传播时延(bottleneck bandwidth and round-trip propagation time, BBR)拥塞控制算法在链路拥塞时无法及时调整发送行为及发包数量,容易导致链路拥塞程度加剧,从而产生较大时延。分析发现,BBR拥塞检测的滞后性是这一问题的主要根源。为解决该问题,提出了BBR拥塞预测及避免(BBR congestion prediction and avoidance,BBR-CPA)算法,该算法从BBR的传输时延(round-trip time,RTT)更新机制入手,通过动态检测瓶颈路径,根据传输时延(round-trip time,RTT)数据实现对链路拥塞状态的预判,提前减少发包数量,从而排空链路中可能存在的拥塞。运行过程中记录瓶颈路径带宽数据并对带宽估值进行均值处理,加快链路向最优状态收敛。实验结果表明,与经典BBR算法和最新的BBR-S、BBR-ACD算法相比,BBR-CPA的平均时延分别降低了56%、44%、8%,有效消除了链路拥塞并降低了由此带来的时延。

LEO卫星通信终端的RTT定位技术

低地球轨道(LEO)卫星通信互联网是未来满足万物智联、天空地一体化网络连接的6G移动通信网络重要组成部分。LEO卫星通信终端的移动性管理是LEO卫星网络运行管理的基本功能,而获取卫星终端的位置是实现移动性管理的基础。目前,全球卫星导航系统(GNSS)能够提供比较高的定位精度,但是当GNSS位置服务在受到环境遮蔽、外部干扰时可能失效,因此卫星通信终端需要一种独立于外部GNSS服务的自主定位方案。以未来LEO卫星互联网的通信信号为背景,提出一种基于往返时延(Round Trip Time,RTT)测量的LEO卫星通信终端自主定位体制,对OFDM卫星互联网信号的时延估计算法精度以及定位误差进行了理论计算和数字仿真,获得了本定位方案的均方根误差(RMSE)和几何稀度因子(GDOP),计算结果表明可以实现百米量级的快速定位,满足了移动性管理所需的千米量级位置信息的应用需求。

Atomic layer deposition for nanoscale oxide semiconductor thin film transistors:review and outlook

Since the first report of amorphous In–Ga–Zn–O based thin film transistors,interest in oxide semiconductors has grown.They offer high mobility,low off-current,low process temperature,and wide flexibility for compositions and processes.Unfortunately,depositing oxide semiconductors using conventional processes like physical vapor deposition leads to problematic issues,especially for high-resolution displays and highly integrated memory devices.Conventional approaches have limited process flexibility and poor conformality on structured surfaces.Atomic layer deposition(ALD)is an advanced technique which can provide conformal,thickness-controlled,and high-quality thin film deposition.Accordingly,studies on ALD based oxide semiconductors have dramatically increased recently.Even so,the relationships between the film properties of ALD-oxide semiconductors and the main variables associated with deposition are still poorly understood,as are many issues related to applications.In this review,to introduce ALD-oxide semiconductors,we provide:(a)a brief summary of the history and importance of ALD-based oxide semiconductors in industry,(b)a discussion of the benefits of ALD for oxide semiconductor deposition(in-situ composition control in vertical distribution/vertical structure engineering/chemical reaction and film properties/insulator and interface engineering),and(c)an explanation of the challenging issues of scaling oxide semiconductors and ALD for industrial applications.This review provides valuable perspectives for researchers who have interest in semiconductor materials and electronic device applications,and the reasons ALD is important to applications of oxide semiconductors.

一种具有前向安全的TLS协议0-RTT握手方案

针对传输层安全(TLS)协议1.3版本在握手消息的第1个flight中传输应用数据的0-RTT握手方案,传输的早期数据由于不存在身份认证,容易遭受重放、伪造以及中间人的攻击,并且不满足前向安全的问题,提出一种具有前向安全的0-RTT优化握手方案,使用Tamarin安全协议形式化分析工具对改进前、后的协议进行形式化验证,结果表明:改进方案的早期数据在原方案之上具有了前向保密的安全性质。

Moiré Synaptic Transistor for Homogeneous-Architecture Reservoir Computing

Reservoir computing has been considered as a promising intelligent computing paradigm for effectively processing complex temporal information.Exploiting tunable and reproducible dynamics in the single electronic device have been desired to implement the “reservoir” and the “readout” layer of reservoir computing system.Two-dimensional moiré materials,with an artificial lattice constant many times larger than the atomic length scale,are one type of most studied artificial quantum materials in community of material science and condensed-matter physics over the past years.These materials are featured with gate-tunable periodic potential and electronic correlation,thus varying the electric field allows the electrons in the moiré potential per unit cell to exhibit distinct and reproducible dynamics,showing great promise in robust reservoir computing.Here,we report that a moiré synaptic transistor can be used to implement the reservoir computing system with a homogeneous reservoir-readout architecture.The synaptic transistor is fabricated based on an h-BN/bilayer graphene/h-BN moiré heterostructure,exhibiting ferroelectricity-like hysteretic gate voltage dependence of resistance.Varying the magnitude of the gate voltage enables the moiré transistor to switch between long-term memory and shortterm memory with nonlinear dynamics.By employing the short-and long-term memories as the reservoir nodes and weights of the readout layer,respectively,we construct a full-moiré physical neural network and demonstrate that the classification accuracy of 90.8% can be achieved for the MNIST(Modified National Institute of Standards and Technology) handwritten digits database.Our work would pave the way towards the development of neuromorphic computing based on moiré materials.

Stretchable organic electrochemical transistors with micro-/nano-structures

Organic electrochemical transistors(OECTs)have attracted attention due to their unique function of converting ionic and biological signals into electronic signals,high transconductance,low energy consumption(below 1 V),stable operation in aqueous media,good biocompatibility[1,2].However,most OECTs are usually built on brittle and stiff substrates,and inappropriate to be adhered to or contacted with delicate human skin,thus impeding their use in wearable electronics.It is desirable to exploit stretchable OECTs to reduce the mechanical mismatch with soft tissues.

P-type cold-source field-effect transistors with TcX_(2) and ReX_(2)(X=S,Se)cold source electrodes:A computational study

Cold-source field-effect transistors(CS-FETs)have been developed to overcome the major challenge of power dissipation in modern integrated circuits.Cold metals suitable for n-type CS-FETs have been proposed as the ideal electrode to filter the high-energy electrons and break the thermal limit on subthreshold swing(SS).In this work,regarding the p-type CS-FETs,we propose TcX_(2) and ReX_(2)(X=S,Se)as the injection source to realize the sub-thermal switching for holes.First-principles calculations unveils the cold-metal characteristics of monolayer TcX_(2) and ReX_(2),possessing a sub-gap below the Fermi level and a decreasing DOS with energy.Quantum device simulations demonstrate that TcX_(2) and ReX_(2) can enable the cold source effects in WSe_(2) p-type FETs,achieving steep SS of 29-38 mV/dec and high on/off ratios of(2.3-5.6)×10^(7).Moreover,multilayer Re S2retains the cold metal characteristic,thus ensuring similar CS-FET performances to that of the monolayer source.This work underlines the significance of cold metals for the design of p-type CS-FETs.

Charge trapping effect at the interface of ferroelectric/interlayer in the ferroelectric field effect transistor gate stack

We study the charge trapping phenomenon that restricts the endurance of n-type ferroelectric field-effect transistors(FeFETs)with metal/ferroelectric/interlayer/Si(MFIS)gate stack structure.In order to explore the physical mechanism of the endurance failure caused by the charge trapping effect,we first establish a model to simulate the electron trapping behavior in n-type Si FeFET.The model is based on the quantum mechanical electron tunneling theory.And then,we use the pulsed I_d-V_g method to measure the threshold voltage shift between the rising edges and falling edges of the FeFET.Our model fits the experimental data well.By fitting the model with the experimental data,we get the following conclusions.(i)During the positive operation pulse,electrons in the Si substrate are mainly trapped at the interface between the ferroelectric(FE)layer and interlayer(IL)of the FeFET gate stack by inelastic trap-assisted tunneling.(ii)Based on our model,we can get the number of electrons trapped into the gate stack during the positive operation pulse.(iii)The model can be used to evaluate trap parameters,which will help us to further understand the fatigue mechanism of FeFET.

Homojunction structure amorphous oxide thin film transistors with ultra-high mobility

Amorphous oxide semiconductors(AOS)have unique advantages in transparent and flexible thin film transistors(TFTs)applications,compared to low-temperature polycrystalline-Si(LTPS).However,intrinsic AOS TFTs are difficult to obtain field-effect mobility(μFE)higher than LTPS(100 cm^(2)/(V·s)).Here,we design ZnAlSnO(ZATO)homojunction structure TFTs to obtainμFE=113.8 cm^(2)/(V·s).The device demonstrates optimized comprehensive electrical properties with an off-current of about1.5×10^(-11)A,a threshold voltage of–1.71 V,and a subthreshold swing of 0.372 V/dec.There are two kinds of gradient coupled in the homojunction active layer,which are micro-crystallization and carrier suppressor concentration gradient distribution so that the device can reduce off-current and shift the threshold voltage positively while maintaining high field-effect mobility.Our research in the homojunction active layer points to a promising direction for obtaining excellent-performance AOS TFTs.

RTT比率和缓冲区下BBR算法公平性双因素方差分析

在两种不同的网络瓶颈带宽条件下,通过NS3模拟仿真试验,研究了BBR算法在不同RTT比率和缓冲区大小下的公平指数的变化,并对结果采用双因素数值方差分析。分析表明:RTT比率和缓冲区大小对BBR算法公平性影响显著,RTT比率和缓冲区大小的交互效应影响不显著;根据F值大小得出RTT比率对BBR算法公平性的影响最显著,其次是缓冲区大小。