15 nm Bulk nFinFET器件性能研究及参数优化

为研究Bulk FinFET工作时基本结构参数、器件温度和栅极材料对其性能的影响,建立了一个15 nm n型Bulk FinFET器件模型,仿真分析了不同栅长、鳍宽、鳍高、沟道掺杂浓度、器件工作温度、栅极材料对器件性能的影响,发现增长栅长、降低鳍宽和增加鳍高有助于抑制短沟道效应;1×10^(17)cm^(-3)以下的低沟道掺杂浓度对器件特性影响不大,但高掺杂会使器件失效;器件工作温度的升高会导致器件性能的下降;采用高K介质材料作为栅极器件性能优于传统材料SiO_(2)。

FinFET器件单粒子翻转物理机制研究评述

鳍式场效应晶体管(FinFET)器件由于其较高的集成度以及运算密度,已成为未来航天应用领域的重要选择。FinFET器件的辐射敏感性与其制作工艺和工作条件息息相关。为了解FinFET器件的单粒子翻转(SEU)敏感机制,文章结合国内外开展的相关研究,从SEU机理出发,分析了器件特征尺寸、电源电压和入射粒子的线性能量传输(LET)值等不同条件对器件SEU敏感性的影响,最后结合实际对FinFET器件SEU的研究发展方向进行展望。

Recent advances in fabrication and functions of neuromorphic system based on organic field effect transistor

The development of various artificial electronics and machines would explosively increase the amount of information and data,which need to be processed via in-situ remediation.Bioinspired synapse devices can store and process signals in a parallel way,thus improving fault tolerance and decreasing the power consumption of artificial systems.The organic field effect transistor(OFET)is a promising component for bioinspired neuromorphic systems because it is suitable for large-scale integrated circuits and flexible devices.In this review,the organic semiconductor materials,structures and fabrication,and different artificial sensory perception systems functions based on neuromorphic OFET devices are summarized.Subsequently,a summary and challenges of neuromorphic OFET devices are provided.This review presents a detailed introduction to the recent progress of neuromorphic OFET devices from semiconductor materials to perception systems,which would serve as a reference for the development of neuromorphic systems in future bioinspired electronics.

High-Performance Organic Field-Effect Transistors Based on Two-Dimensional Vat Orange 3 Crystals

The exploration and research of low-cost,environmentally friendly,and sustainable organic semiconductor materials are of immense significance in various fields,including electronics,optoelectronics,and energy conversion.Unfortunately,these semiconductors have almost poor charge transport properties,which range from∼10^(−4) cm^(2)·V^(−1)·s^(−1) to∼10^(−2) cm^(2)·V^(−1)·s^(−1).Vat orange 3,as one of these organic semiconductors,has great potential due to its highly conjugated structure.We obtain high-quality multilayered Vat orange 3 crystals with two-dimensional(2D)growth on h-BN surfaces with thickness of 10–100 nm using physical vapor transport.Raman’s results confirm the stability of the chemical structure of Vat orange 3 during growth.Furthermore,by leveraging the structural advantages of 2D materials,an organic field-effect transistor with a 2D vdW vertical heterostructure is further realized with h-BN encapsulation and multilayered graphene contact electrodes,resulting in an excellent transistor performance with On/Off ratio of 104 and high field-effect mobility of 0.14 cm^(2)·V^(−1)·s^(−1).Our results show the great potential of Vat orange 3 with 2D structures in future nano-electronic applications.Furthermore,we showcase an approach that integrates organic semiconductors with 2D materials,aiming to offer new insights into the study of organic semiconductors.

Dynamic response of a thermal transistor to time-varying signals

Thermal transistor,the thermal analog of an electronic transistor,is one of the most important thermal devices for microscopic-scale heat manipulating.It is a three-terminal device,and the heat current flowing through two terminals can be largely controlled by the temperature of the third one.Dynamic response plays an important role in the application of electric devices and also thermal devices,which represents the devices’ability to treat fast varying inputs.In this paper,we systematically study two typical dynamic responses of a thermal transistor,i.e.,the response to a step-function input(a switching process)and the response to a square-wave input.The role of the length L of the control segment is carefully studied.It is revealed that when L is increased,the performance of the thermal transistor worsens badly.Both the relaxation time for the former process and the cutoff frequency for the latter one follow the power-law dependence on L quite well,which agrees with our analytical expectation.However,the detailed power exponents deviate from the expected values noticeably.This implies the violation of the conventional assumptions that we adopt.

One memristor–one electrolyte-gated transistor-based high energy-efficient dropout neuronal units

Artificial neural networks(ANN) have been extensively researched due to their significant energy-saving benefits.Hardware implementations of ANN with dropout function would be able to avoid the overfitting problem. This letter reports a dropout neuronal unit(1R1T-DNU) based on one memristor–one electrolyte-gated transistor with an ultralow energy consumption of 25 p J/spike. A dropout neural network is constructed based on such a device and has been verified by MNIST dataset, demonstrating high recognition accuracies(> 90%) within a large range of dropout probabilities up to40%. The running time can be reduced by increasing dropout probability without a significant loss in accuracy. Our results indicate the great potential of introducing such 1R1T-DNUs in full-hardware neural networks to enhance energy efficiency and to solve the overfitting problem.

Effect of external magnetic field on the instability of THz plasma waves in nanoscale graphene field-effect transistors

The instability of plasma waves in the channel of field-effect transistors will cause the electromagnetic waves with THz frequency.Based on a self-consistent quantum hydrodynamic model,the instability of THz plasmas waves in the channel of graphene field-effect transistors has been investigated with external magnetic field and quantum effects.We analyzed the influence of weak magnetic fields,quantum effects,device size,and temperature on the instability of plasma waves under asymmetric boundary conditions numerically.The results show that the magnetic fields,quantum effects,and the thickness of the dielectric layer between the gate and the channel can increase the radiation frequency.Additionally,we observed that increase in temperature leads to a decrease in both oscillation frequency and instability increment.The numerical results and accompanying images obtained from our simulations provide support for the above conclusions.

Device design principles and bioelectronic applications for flexible organic electrochemical transistors

Organic electrochemical transistors(OECTs) exhibit significant potential for applications in healthcare and human-machine interfaces, due to their tunable synthesis, facile deposition, and excellent biocompatibility. Expanding OECTs to the fexible devices will significantly facilitate stable contact with the skin and enable more possible bioelectronic applications. In this work,we summarize the device physics of fexible OECTs, aiming to offer a foundational understanding and guidelines for material selection and device architecture. Particular attention is paid to the advanced manufacturing approaches, including photolithography and printing techniques, which establish a robust foundation for the commercialization and large-scale fabrication. And abundantly demonstrated examples ranging from biosensors, artificial synapses/neurons, to bioinspired nervous systems are summarized to highlight the considerable prospects of smart healthcare. In the end, the challenges and opportunities are proposed for fexible OECTs. The purpose of this review is not only to elaborate on the basic design principles of fexible OECTs, but also to act as a roadmap for further exploration of wearable OECTs in advanced bio-applications.

Implementation of sub-100 nm vertical channel-all-around(CAA) thin-film transistor using thermal atomic layer deposited IGZO channel

In-Ga-Zn-O(IGZO) channel based thin-film transistors(TFT), which exhibit high on-off current ratio and relatively high mobility, has been widely researched due to its back end of line(BEOL)-compatible potential for the next generation dynamic random access memory(DRAM) application. In this work, thermal atomic layer deposition(TALD) indium gallium zinc oxide(IGZO) technology was explored. It was found that the atomic composition and the physical properties of the IGZO films can be modulated by changing the sub-cycles number during atomic layer deposition(ALD) process. In addition, thin-film transistors(TFTs) with vertical channel-all-around(CAA) structure were realized to explore the influence of different IGZO films as channel layers on the performance of transistors. Our research demonstrates that TALD is crucial for high density integration technology, and the proposed vertical IGZO CAA-TFT provides a feasible path to break through the technical problems for the continuous scale of electronic equipment.

Layer by Layer Self-assembly Fiber-based Flexible Electrochemical Transistor

Poly(3,4-ethylenedioxyethiophene)-polystyrene sulfonic acid(PEDOT:PSS)/polyallyl dimethyl ammonium chloride modified reduced graphene oxide(PDDA-rGO)was layer by layer self-assembled on the cotton fiber.The surface morphology and electric property was investigated.The results confirmed the dense membrane of PEDOT:PSS and the lamellar structure of PDDA-rGO on the fibers.It has excellent electrical conductivity and mechanical properties.The fiber based electrochemical transistor(FECTs)prepared by the composite conductive fiber has a maximum output current of 8.7 mA,a transconductance peak of 10 mS,an on time of 1.37 s,an off time of 1.6 s and excellent switching stability.Most importantly,the devices by layer by layer self-assembly technology opens a path for the true integration of organic electronics with traditional textile technologies and materials,laying the foundation for their later widespread application.

基于青藏高原的14 nm FinFET和28 nm平面CMOS工艺SRAM单粒子效应实时测量试验

本文基于海拔为4300 m的拉萨羊八井国际宇宙射线观测站,开展了14 nm FinFET和28 nm平面互补金属氧化物半导体(complementary metal oxide semiconductor,CMOS)工艺静态随机存取存储器(static randomaccess memory,SRAM)阵列的大气辐射长期实时测量试验.试验持续时间为6651 h,共观测到单粒子翻转(single event upset,SEU)事件56个,其中单位翻转(single bit upset,SBU)24个,多单元翻转(multiple cell upset,MCU)32个.结合之前开展的65 nm工艺SRAM结果,研究发现,随着工艺尺寸的减小,器件的整体软错误率(soft error rate,SER)持续降低.但是,相比于65和14 nm工艺器件,28 nm工艺器件的MCU SER最大,其MCU占比(57%)超过SBU,MCU最大位数为16位.虽然14 nm FinFET器件的Fin间距仅有35 nm左右,且临界电荷降至亚fC,但FinFET结构的引入导致灵敏区电荷收集和共享机制发生变化,浅沟道隔离致使电荷扩散通道“狭窄化”,另一方面灵敏区表面积减小至0.0024μm^(2),从而导致14 nm工艺器件SBU和MCU的软错误率均明显下降.

FinFET芯片TEM样品制备及避免窗帘效应方法

制备高质量纳米尺度芯片透射电子显微镜(TEM)样品对于探索半导体器件结构设计、材料分布与芯片性能之间的关系具有重要的意义。使用聚焦离子束(FIB)/扫描电子显微镜(SEM)双束系统制备14 nm鳍式场效应晶体管(FinFET)截面TEM样品,制备过程中从技术角度提出了两种自下而上制样方案来抑制窗帘效应。为扩大样品的可表征视场范围,在避免样品弯曲的前提下,提出了一种薄片提取方法。结果表明,离子束流越大,窗帘效应越严重,自下而上方法能有效规避窗帘效应;离子束电压30 kV时采用清洗截面(CCS)模式、5 kV/2 kV时采用矩形模式,样品台倾斜补偿角度为1.5°~3.5°,进行交叉减薄,且最终铣削长度控制在1μm时减薄效果最好;新的薄片提取方法改变了样品的铣削方向,在避免窗帘效应破坏感兴趣结构和样品弯曲的前提下,将样品的可表征视场范围扩大了5倍。研究结果对优化TEM样品制备方法以及芯片失效分析提供了参考。

Atomic layer deposition for nanoscale oxide semiconductor thin film transistors:review and outlook

Since the first report of amorphous In–Ga–Zn–O based thin film transistors,interest in oxide semiconductors has grown.They offer high mobility,low off-current,low process temperature,and wide flexibility for compositions and processes.Unfortunately,depositing oxide semiconductors using conventional processes like physical vapor deposition leads to problematic issues,especially for high-resolution displays and highly integrated memory devices.Conventional approaches have limited process flexibility and poor conformality on structured surfaces.Atomic layer deposition(ALD)is an advanced technique which can provide conformal,thickness-controlled,and high-quality thin film deposition.Accordingly,studies on ALD based oxide semiconductors have dramatically increased recently.Even so,the relationships between the film properties of ALD-oxide semiconductors and the main variables associated with deposition are still poorly understood,as are many issues related to applications.In this review,to introduce ALD-oxide semiconductors,we provide:(a)a brief summary of the history and importance of ALD-based oxide semiconductors in industry,(b)a discussion of the benefits of ALD for oxide semiconductor deposition(in-situ composition control in vertical distribution/vertical structure engineering/chemical reaction and film properties/insulator and interface engineering),and(c)an explanation of the challenging issues of scaling oxide semiconductors and ALD for industrial applications.This review provides valuable perspectives for researchers who have interest in semiconductor materials and electronic device applications,and the reasons ALD is important to applications of oxide semiconductors.

张应力调制SOI FinFET器件及其性能

针对具有立体结构的绝缘体上硅鳍式场效应晶体管(SOI FinFET),研究了表面淀积50 nm张应力SiN薄膜后SOI FinFET器件的电学特性,并对关键电学参数,如开态电流I_(on)、电流开关比I_(on)/I_(off)、跨导g_(m)、漏致势垒降低V_(DIBL)和亚阈值摆幅S_(ss)等,进行了深入分析。研究结果表明,应变对栅长较小器件的I_(on)和S_(ss)有更明显的改善,随着张应力的引入使g_(m)提升,从而显著提高了器件的I_(on),且I_(on)/I_(off)较引入前有着2个量级的提升。而g_(m)的提升归结于张应力引入而导致SOI FinFET沟道载流子迁移率的提升。V_(DIBL)和S_(ss)的改善,表明张应力的引入使器件的栅控能力显著提高。

纳米FinFET的单粒子瞬态与Fin结构的相关性研究

工艺差异引起的Fin结构变化会造成纳米FinFET器件呈现不同的电学特性,使器件的单粒子瞬态效应(SET)复杂化。基于电学特性校准的14 nm SOI标准型FinFET器件,构建了弹头型、三角型、阶梯型、半圆型及底部椭圆型等5种结构,分析了SET的表征量与Fin结构参数间的相关性,并利用灰色理论,研究了它们之间的内在关联性。结果表明,器件的收集电荷量、沉积电荷量与Fin的截面积显著相关;SET电流峰值、电子-空穴对产生率峰值及双极放大系数同时依赖于Fin的截面积和等效沟道宽度,且对等效沟道宽度的依赖性更强。

14 nm pFinFET 器件抗单粒子辐射的加固方法

为探究先进互补金属氧化物半导体(CMOS)工艺在空间应用中的可靠性问题,研究14 nm工艺下P型沟道鳍式场效应晶体管(pFinFET)器件中的抗单粒子瞬态(SET)加固策略。通过在器件中插入平行于鳍方向的重掺杂N型沟槽(Ntie)和P型沟槽(Ptie)来减缓SET的影响。三维TCAD仿真结果表明:加固之后器件的抗SET特性和沟槽本身的偏置条件相关。当重掺杂沟槽处于零偏状态时,抗辐射加固的性能最好,SET脉冲宽度降低程度可达40%左右;然而,当处于反偏状态时,由于特殊的电荷收集过程的存在,使得SET脉冲幅度反而会明显增大,脉冲宽度减小程度并不明显。此外,还研究沟槽面积、间距及掺杂浓度对pFinFET中的SET脉冲宽度的影响,得到提高抗SET效果的加固方法。

Moiré Synaptic Transistor for Homogeneous-Architecture Reservoir Computing

Reservoir computing has been considered as a promising intelligent computing paradigm for effectively processing complex temporal information.Exploiting tunable and reproducible dynamics in the single electronic device have been desired to implement the “reservoir” and the “readout” layer of reservoir computing system.Two-dimensional moiré materials,with an artificial lattice constant many times larger than the atomic length scale,are one type of most studied artificial quantum materials in community of material science and condensed-matter physics over the past years.These materials are featured with gate-tunable periodic potential and electronic correlation,thus varying the electric field allows the electrons in the moiré potential per unit cell to exhibit distinct and reproducible dynamics,showing great promise in robust reservoir computing.Here,we report that a moiré synaptic transistor can be used to implement the reservoir computing system with a homogeneous reservoir-readout architecture.The synaptic transistor is fabricated based on an h-BN/bilayer graphene/h-BN moiré heterostructure,exhibiting ferroelectricity-like hysteretic gate voltage dependence of resistance.Varying the magnitude of the gate voltage enables the moiré transistor to switch between long-term memory and shortterm memory with nonlinear dynamics.By employing the short-and long-term memories as the reservoir nodes and weights of the readout layer,respectively,we construct a full-moiré physical neural network and demonstrate that the classification accuracy of 90.8% can be achieved for the MNIST(Modified National Institute of Standards and Technology) handwritten digits database.Our work would pave the way towards the development of neuromorphic computing based on moiré materials.

Stretchable organic electrochemical transistors with micro-/nano-structures

Organic electrochemical transistors(OECTs)have attracted attention due to their unique function of converting ionic and biological signals into electronic signals,high transconductance,low energy consumption(below 1 V),stable operation in aqueous media,good biocompatibility[1,2].However,most OECTs are usually built on brittle and stiff substrates,and inappropriate to be adhered to or contacted with delicate human skin,thus impeding their use in wearable electronics.It is desirable to exploit stretchable OECTs to reduce the mechanical mismatch with soft tissues.

P-type cold-source field-effect transistors with TcX_(2) and ReX_(2)(X=S,Se)cold source electrodes:A computational study

Cold-source field-effect transistors(CS-FETs)have been developed to overcome the major challenge of power dissipation in modern integrated circuits.Cold metals suitable for n-type CS-FETs have been proposed as the ideal electrode to filter the high-energy electrons and break the thermal limit on subthreshold swing(SS).In this work,regarding the p-type CS-FETs,we propose TcX_(2) and ReX_(2)(X=S,Se)as the injection source to realize the sub-thermal switching for holes.First-principles calculations unveils the cold-metal characteristics of monolayer TcX_(2) and ReX_(2),possessing a sub-gap below the Fermi level and a decreasing DOS with energy.Quantum device simulations demonstrate that TcX_(2) and ReX_(2) can enable the cold source effects in WSe_(2) p-type FETs,achieving steep SS of 29-38 mV/dec and high on/off ratios of(2.3-5.6)×10^(7).Moreover,multilayer Re S2retains the cold metal characteristic,thus ensuring similar CS-FET performances to that of the monolayer source.This work underlines the significance of cold metals for the design of p-type CS-FETs.

Performance optimization of tri-gate junctionless FinFET using channel stack engineering for digital and analog/RF design

This manuscript explores the behavior of a junctionless tri-gate FinFET at the nano-scale region using SiGe material for the channel.For the analysis,three different channel structures are used:(a)tri-layer stack channel(TLSC)(Si-SiGe-Si),(b)double layer stack channel(DLSC)(SiGe-Si),(c)single layer channel(SLC)(S_(i)).The I−V characteristics,subthreshold swing(SS),drain-induced barrier lowering(DIBL),threshold voltage(V_(t)),drain current(ION),OFF current(IOFF),and ON-OFF current ratio(ION/IOFF)are observed for the structures at a 20 nm gate length.It is seen that TLSC provides 21.3%and 14.3%more ON current than DLSC and SLC,respectively.The paper also explores the analog and RF factors such as input transconductance(g_(m)),output transconductance(gds),gain(gm/gds),transconductance generation factor(TGF),cut-off frequency(f_(T)),maximum oscillation frequency(f_(max)),gain frequency product(GFP)and linearity performance parameters such as second and third-order harmonics(g_(m2),g_(m3)),voltage intercept points(VIP_(2),VIP_(3))and 1-dB compression points for the three structures.The results show that the TLSC has a high analog performance due to more gm and provides 16.3%,48.4%more gain than SLC and DLSC,respectively and it also provides better linearity.All the results are obtained using the VisualTCAD tool.