Multilevel inverter has played a vital role in medium and high power applications in the recent years. In this paper, Reduced Switch Count Multi Level Inverter structure (RSCMLI) topology is presented with different p...Multilevel inverter has played a vital role in medium and high power applications in the recent years. In this paper, Reduced Switch Count Multi Level Inverter structure (RSCMLI) topology is presented with different pulse width modulation techniques. The harmonic level analysis is carried out for the reduced switch count multilevel inverter with the different PWM technique such as with Alternate Phase Opposition Disposition (APOD) method, In Phase Disposition (IPD) method and multi reference pulse width modulation method for five level, seven level , nine level and eleven level inverter. The simulation results are compared with the cascaded H Bridge Multi Level Inverter (CHBMLI). The nine level RSCMLI inverter with APOD method is used for the Distribution Static Synchronous Compensator (DSTATCOM) application in the nonlinear load connected system for power factor improvement. The result shows that the harmonic level and the number of switches required for RSCMLI is reduced compared to CHBMLI. RSCMLI employed in DSTATCOM improves the power factor and harmonic level of the system when it is connected to the nonlinear load.展开更多
Diode clamped multi-level inverter (DCMLI) has a wide application prospect in high-voltage and adjustable speed drive systems due to its low stress on switching devices, low harmonic output, and simple structure. Ho...Diode clamped multi-level inverter (DCMLI) has a wide application prospect in high-voltage and adjustable speed drive systems due to its low stress on switching devices, low harmonic output, and simple structure. However, the problem of complexity of selecting vectors and capacitor voltage unbalance needs to be solved when the algorithm of direct torque control (DTC) is implemented on DCMLI. In this paper, a fuzzy DTC system of an induction machine fed by a three-level neutral-point-clamped (NPC) inverter is proposed. After introducing fuzzy logic, optimal selecting switching state is realized by applying various strategies which can distinguish the grade of the errors of stator flux linkage, torque, the neutral-point potential, and the position of stator flux linkage. Consequently, the neutral-point potential unbalance, the dr/dr of output voltage and the switching loss are restrained effectively, and desirable dynamic and steady-state performances of induction machines can be obtained for the DTC scheme. A design method of the fuzzy controller is introduced in detail, and the relevant simulation and experimental results have verified the feasibility of the proposed control algorithm.展开更多
The paper proposes a new method of equal switching distribution that can be applied to cascaded multi-level inverters. This method is based on the fact that in the cascaded multilevel inverters, the output phase volta...The paper proposes a new method of equal switching distribution that can be applied to cascaded multi-level inverters. This method is based on the fact that in the cascaded multilevel inverters, the output phase voltage is the sum of voltage waveforms produced by all cascaded cells. By periodically exchanging cells’ voltage waveforms, the proposed method ensures equal average switchings distribution between all cascaded cells. This method is applied to the 13-level inverter, which consists of three cascaded 5-level H-bridge cells per phase. However, the proposed method can be extended to any desired number of voltage levels and applied to any type of cascaded multi-level inverter. Extensive simulation results of the tested 13-level inverter with the equal switching distribution are presented. Moreover, the proposed method is compared to the standard control approaches and its advantages are shown.展开更多
The single-phase three-level voltage source inverter based on wavelet modulation(WM) is proposed.The WM technique is based on constructing a nondyadic-type multi-resolution analysis(MRA),which supports sampling contin...The single-phase three-level voltage source inverter based on wavelet modulation(WM) is proposed.The WM technique is based on constructing a nondyadic-type multi-resolution analysis(MRA),which supports sampling continuous-time sinusoidal signals in a nonuniform recurrent manner,and then reconstructing it by using inverter switching actions. In order to further improve the output voltage waveform and reduce harmonic distortion,the wavelet modulation is used to three-level inverter. The high magnitude of fundamental component and significantly reduced harmonic contents of the inverter output voltage can be achieved by using WM in the single-phase three-level voltage source inverter. Furthermore,the WM algorithm is implemented by using only one element government(EV) in DSP. The simulated and experimental results prove the accuracy and feasibility of the WM scheme for single-phase three-level voltage source inverter.展开更多
Cascaded H-Bridge inverter has been researched for the past two decades, but there are no explicit guidelines on how one can realize a cascaded NPC (neutral-point-clamped)/H-Bridge inverter. Past research has also c...Cascaded H-Bridge inverter has been researched for the past two decades, but there are no explicit guidelines on how one can realize a cascaded NPC (neutral-point-clamped)/H-Bridge inverter. Past research has also concentrated on realizing a five-level NPC/H-Bridge inverter. This fails to address the principle of realizing a general cascaded N-level NPC/H-Bridge PWM inverter. This paper proposes an improved topology for achieving a nine-level cascaded NPC (neutral-point-clamped) H-Bridge inverter with reduced harmonic content. This new proposed topology requires a lesser number of separate dc sources as compared to conventional cascaded H-Bridge inverter. The whole system is considered as having four three level legs having two positive and two negative legs. By properly phase shifting the modulating wave and carriers, a nine-level output is achieved. A theoretical harmonic analysis of the proposed inverter is carried out based on double Fourier principle. The theoretical results are verified through MATLAB simulation.展开更多
Multilevel inverter (MLI) is one of the most efficient power converters which are especially suited for high power applications with reduced harmonics. MLI not only achieves high output power and is also used in renew...Multilevel inverter (MLI) is one of the most efficient power converters which are especially suited for high power applications with reduced harmonics. MLI not only achieves high output power and is also used in renewable energy sources such as photovoltaic, wind and fuel cells. Among various topologies of MLI, this paper mainly focuses on cascaded MLI with three unequal DC sources called asymmetric cascaded MLI which reduces the number of power switches. Various modulation techniques are also reviewed in literature [1]. In this paper we focus on sinusoidal (or) multicarrier pulse width modulation (SPWM) which improves the output voltage at lower modulation index for obtaining lower Total Harmonic Distortion (THD) level. The gating signal for the 13-level hybrid inverter using SPWM technique is generated using Field Programmable Gate Array (FPGA) processor. The proposed modulation technique results in reduced percentage of THD, but lower order harmonics are not eliminated. So a new technique called Selective Harmonic Elimination (SHE) is also implemented in order to reduce the lower order harmonics. The optimum switching angles are determined for obtaining minimum THD. The performance evaluation of the proposed PWM inverter is verified using an experimental model of 13-level cascaded hybrid MLI and compared with MATLAB/SIMULINK model.展开更多
Multilevel inverters are well used in grid connected domestic photovoltaic applications because of their ability to generate a very good quality of waveforms, reducing switching frequency, and their low voltage stress...Multilevel inverters are well used in grid connected domestic photovoltaic applications because of their ability to generate a very good quality of waveforms, reducing switching frequency, and their low voltage stress across the power devices. However, this kind of inverter has to be modified to both limit common-mode currents and improve the robustness of the system. This paper presents a new mixed 5-level inverter that meets these challenges. The operating principle of the converter is proposed. Several experimental measurements are described to validate this new concept. The output voltage and current and the THD of the output voltage are particularly discussed.展开更多
A new ride through strategy is introduced in a three-level dual Z-source inverter, for isolation under semiconductor switching failure condition. Here the output will have no significant decrease in the amplitude and ...A new ride through strategy is introduced in a three-level dual Z-source inverter, for isolation under semiconductor switching failure condition. Here the output will have no significant decrease in the amplitude and quality. Instead of diodes, the triacs are added to the inverter source ends, as it can perform a bidirectional power transfer also it can operate well in both low and high voltage operating conditions. The faulted part can be isolated by simply altering the firing pulses for turning on/off the triacs using the carrier based SPWM technique and resulting in a boosting output with zero common mode voltage. Consequently, it forms a common floating point or null point with a zero common mode voltage. It is experimentally verified by using MATLAB, and digital oscilloscope.展开更多
This work presents an implementation of an innovative single phase multilevel inverter using capacitors with reduced switches. The proposed Capacitor pattern H-bridge Multilevel Inverter (CPHMLI) topology consists of ...This work presents an implementation of an innovative single phase multilevel inverter using capacitors with reduced switches. The proposed Capacitor pattern H-bridge Multilevel Inverter (CPHMLI) topology consists of a proper number of Capacitor connected with switches and power sources. The advanced switching control supplied by Pulse Width Modulation (PDPWM) to attain mixed staircase switching state. The charging and discharging mode are achieved by calculating the voltage error at the load. Furthermore, to accomplish the higher voltage levels at the output with less number of semiconductors switches and simple commutation designed using CPHMLI topology. To prove the performance and effectiveness of the proposed approach, a set of experiments performed under various load conditions using MATLAB tool.展开更多
This paper analyzes and compares the performance of a new inverter topology with two types of input sources: 1) Solar PV source and 2) Ideal dc source (battery). The simulation is done in SIMULINK/MATLAB Software. It ...This paper analyzes and compares the performance of a new inverter topology with two types of input sources: 1) Solar PV source and 2) Ideal dc source (battery). The simulation is done in SIMULINK/MATLAB Software. It is shown that when the solar panel is connected, spikes are obtained in output voltage waveforms. These spikes are eliminated by inserting a capacitor. The capacitor is chosen for a particular power factor which is optimum with respect to cost, size and power quality. Total Harmonic Distortion, Active Power, Reactive Power, RMS Voltage and RMS Current are measured for different load power factor. Finally these results are compared with those obtained using battery with same input voltage magnitude. This Paper shows that for Solar Panel Circuit, THD, P and Q are less for 0.8 and above power factor, however below 0.8 PF, the THD, active and reactive power transfer are more. This means that the performance of Solar Panel in the proposed circuit topology is seen to be better as compared to the same circuit with battery within a range of power factor.展开更多
The enhanced power quality provided by multilevel inverters(MLIs)has made them more appropriate for medium-and high-power applications,including photovoltaic systems.Nevertheless,a prevalent limitation involves the ne...The enhanced power quality provided by multilevel inverters(MLIs)has made them more appropriate for medium-and high-power applications,including photovoltaic systems.Nevertheless,a prevalent limitation involves the necessity for numerous switches and increased voltage stress across these switches,consequently increasing the overall system cost.To address these challenges,a new 17-level asymmetrical MLI with fewer components and low voltage stress is proposed for the photovoltaic system.This innovative MLI configuration has four direct current(DC)sources and 10 switches.Based on the trinary sequence,the proposed topology uses photovoltaics with boost converters and fuzzy logic controllers as its DC sources.Mathematical equations are used to calculate cru-cial parameters for this proposed design,including total standing voltage per unit(TSVPU),cost function per level(CF/L),component count per level(CC/L)and voltage stress across the switches.The comparison is conducted by considering switches,DC sources,TSVPU,CF/L,gate driver circuits and CC/L with other existing MLI topologies.The analysis is carried out under various conditions,encompassing different levels of irradiance,variable loads and modulation indices.To reduce the total harmonic distortion of the suggested topology,the phase opposition disposition approach has been incorporated.The suggested framework is simulated in MATLAB®/Simulink®.The results indicate that the proposed topology achieves a well-distributed stress profile across the switches and has CC/L of 1.23,TSVPU of 5 and CF/L of 4.58 and 5.76 with weight coefficients of 0.5 and 1.5,respectively.These values are not-ably superior to those of existing MLI topologies.Simulation results demonstrate that the proposed topology maintains a consistent output at varying irradiance levels with FLCs and exhibits robust performance under variable loads and diverse modulation indices.Furthermore,the total harmonic distortion achieved with phase opposition disposition is 7.78%,outperforming alternative pulse width modulation techniques.In summary,it provides enhanced performance.Considering this,it is suitable for the photovoltaic system.展开更多
文摘Multilevel inverter has played a vital role in medium and high power applications in the recent years. In this paper, Reduced Switch Count Multi Level Inverter structure (RSCMLI) topology is presented with different pulse width modulation techniques. The harmonic level analysis is carried out for the reduced switch count multilevel inverter with the different PWM technique such as with Alternate Phase Opposition Disposition (APOD) method, In Phase Disposition (IPD) method and multi reference pulse width modulation method for five level, seven level , nine level and eleven level inverter. The simulation results are compared with the cascaded H Bridge Multi Level Inverter (CHBMLI). The nine level RSCMLI inverter with APOD method is used for the Distribution Static Synchronous Compensator (DSTATCOM) application in the nonlinear load connected system for power factor improvement. The result shows that the harmonic level and the number of switches required for RSCMLI is reduced compared to CHBMLI. RSCMLI employed in DSTATCOM improves the power factor and harmonic level of the system when it is connected to the nonlinear load.
文摘Diode clamped multi-level inverter (DCMLI) has a wide application prospect in high-voltage and adjustable speed drive systems due to its low stress on switching devices, low harmonic output, and simple structure. However, the problem of complexity of selecting vectors and capacitor voltage unbalance needs to be solved when the algorithm of direct torque control (DTC) is implemented on DCMLI. In this paper, a fuzzy DTC system of an induction machine fed by a three-level neutral-point-clamped (NPC) inverter is proposed. After introducing fuzzy logic, optimal selecting switching state is realized by applying various strategies which can distinguish the grade of the errors of stator flux linkage, torque, the neutral-point potential, and the position of stator flux linkage. Consequently, the neutral-point potential unbalance, the dr/dr of output voltage and the switching loss are restrained effectively, and desirable dynamic and steady-state performances of induction machines can be obtained for the DTC scheme. A design method of the fuzzy controller is introduced in detail, and the relevant simulation and experimental results have verified the feasibility of the proposed control algorithm.
文摘The paper proposes a new method of equal switching distribution that can be applied to cascaded multi-level inverters. This method is based on the fact that in the cascaded multilevel inverters, the output phase voltage is the sum of voltage waveforms produced by all cascaded cells. By periodically exchanging cells’ voltage waveforms, the proposed method ensures equal average switchings distribution between all cascaded cells. This method is applied to the 13-level inverter, which consists of three cascaded 5-level H-bridge cells per phase. However, the proposed method can be extended to any desired number of voltage levels and applied to any type of cascaded multi-level inverter. Extensive simulation results of the tested 13-level inverter with the equal switching distribution are presented. Moreover, the proposed method is compared to the standard control approaches and its advantages are shown.
基金Sponsored by the National Natural Science Foundation of China(Grant No.51107016)
文摘The single-phase three-level voltage source inverter based on wavelet modulation(WM) is proposed.The WM technique is based on constructing a nondyadic-type multi-resolution analysis(MRA),which supports sampling continuous-time sinusoidal signals in a nonuniform recurrent manner,and then reconstructing it by using inverter switching actions. In order to further improve the output voltage waveform and reduce harmonic distortion,the wavelet modulation is used to three-level inverter. The high magnitude of fundamental component and significantly reduced harmonic contents of the inverter output voltage can be achieved by using WM in the single-phase three-level voltage source inverter. Furthermore,the WM algorithm is implemented by using only one element government(EV) in DSP. The simulated and experimental results prove the accuracy and feasibility of the WM scheme for single-phase three-level voltage source inverter.
文摘Cascaded H-Bridge inverter has been researched for the past two decades, but there are no explicit guidelines on how one can realize a cascaded NPC (neutral-point-clamped)/H-Bridge inverter. Past research has also concentrated on realizing a five-level NPC/H-Bridge inverter. This fails to address the principle of realizing a general cascaded N-level NPC/H-Bridge PWM inverter. This paper proposes an improved topology for achieving a nine-level cascaded NPC (neutral-point-clamped) H-Bridge inverter with reduced harmonic content. This new proposed topology requires a lesser number of separate dc sources as compared to conventional cascaded H-Bridge inverter. The whole system is considered as having four three level legs having two positive and two negative legs. By properly phase shifting the modulating wave and carriers, a nine-level output is achieved. A theoretical harmonic analysis of the proposed inverter is carried out based on double Fourier principle. The theoretical results are verified through MATLAB simulation.
文摘Multilevel inverter (MLI) is one of the most efficient power converters which are especially suited for high power applications with reduced harmonics. MLI not only achieves high output power and is also used in renewable energy sources such as photovoltaic, wind and fuel cells. Among various topologies of MLI, this paper mainly focuses on cascaded MLI with three unequal DC sources called asymmetric cascaded MLI which reduces the number of power switches. Various modulation techniques are also reviewed in literature [1]. In this paper we focus on sinusoidal (or) multicarrier pulse width modulation (SPWM) which improves the output voltage at lower modulation index for obtaining lower Total Harmonic Distortion (THD) level. The gating signal for the 13-level hybrid inverter using SPWM technique is generated using Field Programmable Gate Array (FPGA) processor. The proposed modulation technique results in reduced percentage of THD, but lower order harmonics are not eliminated. So a new technique called Selective Harmonic Elimination (SHE) is also implemented in order to reduce the lower order harmonics. The optimum switching angles are determined for obtaining minimum THD. The performance evaluation of the proposed PWM inverter is verified using an experimental model of 13-level cascaded hybrid MLI and compared with MATLAB/SIMULINK model.
文摘Multilevel inverters are well used in grid connected domestic photovoltaic applications because of their ability to generate a very good quality of waveforms, reducing switching frequency, and their low voltage stress across the power devices. However, this kind of inverter has to be modified to both limit common-mode currents and improve the robustness of the system. This paper presents a new mixed 5-level inverter that meets these challenges. The operating principle of the converter is proposed. Several experimental measurements are described to validate this new concept. The output voltage and current and the THD of the output voltage are particularly discussed.
文摘A new ride through strategy is introduced in a three-level dual Z-source inverter, for isolation under semiconductor switching failure condition. Here the output will have no significant decrease in the amplitude and quality. Instead of diodes, the triacs are added to the inverter source ends, as it can perform a bidirectional power transfer also it can operate well in both low and high voltage operating conditions. The faulted part can be isolated by simply altering the firing pulses for turning on/off the triacs using the carrier based SPWM technique and resulting in a boosting output with zero common mode voltage. Consequently, it forms a common floating point or null point with a zero common mode voltage. It is experimentally verified by using MATLAB, and digital oscilloscope.
文摘This work presents an implementation of an innovative single phase multilevel inverter using capacitors with reduced switches. The proposed Capacitor pattern H-bridge Multilevel Inverter (CPHMLI) topology consists of a proper number of Capacitor connected with switches and power sources. The advanced switching control supplied by Pulse Width Modulation (PDPWM) to attain mixed staircase switching state. The charging and discharging mode are achieved by calculating the voltage error at the load. Furthermore, to accomplish the higher voltage levels at the output with less number of semiconductors switches and simple commutation designed using CPHMLI topology. To prove the performance and effectiveness of the proposed approach, a set of experiments performed under various load conditions using MATLAB tool.
文摘This paper analyzes and compares the performance of a new inverter topology with two types of input sources: 1) Solar PV source and 2) Ideal dc source (battery). The simulation is done in SIMULINK/MATLAB Software. It is shown that when the solar panel is connected, spikes are obtained in output voltage waveforms. These spikes are eliminated by inserting a capacitor. The capacitor is chosen for a particular power factor which is optimum with respect to cost, size and power quality. Total Harmonic Distortion, Active Power, Reactive Power, RMS Voltage and RMS Current are measured for different load power factor. Finally these results are compared with those obtained using battery with same input voltage magnitude. This Paper shows that for Solar Panel Circuit, THD, P and Q are less for 0.8 and above power factor, however below 0.8 PF, the THD, active and reactive power transfer are more. This means that the performance of Solar Panel in the proposed circuit topology is seen to be better as compared to the same circuit with battery within a range of power factor.
文摘The enhanced power quality provided by multilevel inverters(MLIs)has made them more appropriate for medium-and high-power applications,including photovoltaic systems.Nevertheless,a prevalent limitation involves the necessity for numerous switches and increased voltage stress across these switches,consequently increasing the overall system cost.To address these challenges,a new 17-level asymmetrical MLI with fewer components and low voltage stress is proposed for the photovoltaic system.This innovative MLI configuration has four direct current(DC)sources and 10 switches.Based on the trinary sequence,the proposed topology uses photovoltaics with boost converters and fuzzy logic controllers as its DC sources.Mathematical equations are used to calculate cru-cial parameters for this proposed design,including total standing voltage per unit(TSVPU),cost function per level(CF/L),component count per level(CC/L)and voltage stress across the switches.The comparison is conducted by considering switches,DC sources,TSVPU,CF/L,gate driver circuits and CC/L with other existing MLI topologies.The analysis is carried out under various conditions,encompassing different levels of irradiance,variable loads and modulation indices.To reduce the total harmonic distortion of the suggested topology,the phase opposition disposition approach has been incorporated.The suggested framework is simulated in MATLAB®/Simulink®.The results indicate that the proposed topology achieves a well-distributed stress profile across the switches and has CC/L of 1.23,TSVPU of 5 and CF/L of 4.58 and 5.76 with weight coefficients of 0.5 and 1.5,respectively.These values are not-ably superior to those of existing MLI topologies.Simulation results demonstrate that the proposed topology maintains a consistent output at varying irradiance levels with FLCs and exhibits robust performance under variable loads and diverse modulation indices.Furthermore,the total harmonic distortion achieved with phase opposition disposition is 7.78%,outperforming alternative pulse width modulation techniques.In summary,it provides enhanced performance.Considering this,it is suitable for the photovoltaic system.