Trigger mechanism of PDSOI NMOS devices for ESD protection operating under elevated temperatures

Trigger characteristics of electrostatic discharge(ESD)protecting devices operating under various ambient temperatures ranging from 30℃to 195℃are investigated.The studied ESD protecting devices are the H-gate NMOS transistors fabricated with a 0.18-μm partially depleted silicon-on-insulator(PDSOI)technology.The measurements are conducted by using a transmission line pulse(TLP)test system.The different temperature-dependent trigger characteristics of groundedgate(GGNMOS)mode and the gate-triggered(GTNMOS)mode are analyzed in detail.The underlying physical mechanisms related to the effect of temperature on the first breakdown voltage V_(T1)investigated through the assist of technology computer-aided design(TCAD)simulation.

Dynamic electrostatic-discharge path investigation relied on different impact energies in metal-oxide-semiconductor circuits

Gate-grounded n-channel metal-oxide-semiconductor(GGNMOS)devices have been widely implemented as power clamps to protect semiconductor devices from electrostatic discharge stress owing to their simple construction,easy triggering,and low power dissipation.We present a novel I-V characterization of the GGNMOS used as the power clamp in complementary metal-oxide-semiconductor circuits as a result of switching the ESD paths under different impact energies.This special effect could cause an unexpected latch-up or pre-failure phenomenon in some applications with relatively large capacitances from power supply to power ground,and thus should be urgently analyzed and resolved.Transmission-linepulse,human-body-modal,and light-emission tests were performed to explore the root cause.

An active equalization strategy for series-connected lithium-ion battery packs based on a dual threshold trigger mechanism

It is well acknowledged to all that an active equalization strategy can overcome the inconsistency of lithium-ion cell's voltage and state of charge(SOC)in series-connected lithium-ion battery(LIB)pack in the electric vehicle application.In this regard,a novel dual threshold trigger mechanism based active equalization strategy(DTTMbased AES)is proposed to overcome the inherent inconsistency of cells and to improve the equalization efficiency for a series-connected LIB pack.First,a modified dual-layer inductor equalization circuit is constructed to make it possible for the energy transfer path optimization.Next,based on the designed dual threshold trigger mechanism provoked by battery voltage and SOC,an active equalization strategy is proposed,each single cell's SOC in the battery packs is estimated using the extended Kalman particle filter algorithm.Besides,on the basis of the modified equalization circuit,the improved particle swarm optimization is adopted to optimize the energy transfer path with aiming to reduce the equalization time.Lastly,the simulation and experimental results are provided to validate the proposed DTTM-based AES.

Experimental Study of the Gas Triggered Switch's Breakdown by Optical Measurement

In this paper the main technical data of the high speed camera(HSFC-PRO),components of gas triggered switch and the primary experimental results of the breakdown of gas triggered switch using high speed camera are introduced.Four photographs totaling in 24 nanoseconds in single trigger mode manifest that the breakdown consists of two phases,which are the breakdowns of the trigger electrode with positive and negative electrode successively. This phenomenon is consist with the electric field distribution simulation result with the help of the software ANSYS. Eight photographs in double trigger mode prove that the breakdown time of the gas triggered switch is above 10.5 microseconds.The elementary results show that high speed camera is a very efficient apparatus to study the discharge characteristics.This optical measuring technique is helpful to profoundly study the breakdown of high voltage switch. More studies and experiments would be continued in future.

Design of novel DDSCR with embedded PNP structure for ESD protection

A novel dual-directional silicon controlled rectifier（DDSCR） device with embedded PNP structure（DDSCR-PNP） is proposed for electrostatic discharge（ESD） protection, which has greatly reduced latch-up risk owing to the improved holding voltage（V_h/. Firstly, the working mechanism of the DDSCR-PNP is analyzed. The theoretical analysis indicates that the proposed device possesses good voltage clamp ability due to the embedded PNP（PNP_2）. Then, experimental devices are fabricated in a 0.35 m bipolar-CMOS-DMOS process and measured with a Barth 4002 transmission line pulse testing system. The results show that the V_h of DDSCR-PNP is much higher than that of the conventional DDSCR, and can be further increased by adjusting the P well width.However, the reduced leakage current（I_L/ of the DDSCR-PNP shows obvious fluctuations when the P well width is increased to more than 12 m. Finally, the factors influencing V_h and I_L are investigated by Sentaurus simulations. The results verify that the lateral PNP_2 helps to increase V_h and decrease I_L. When the P well width is further increased, the effect of the lateral PNP_2 is weakened, causing an increased I_L. The proposed DDSCR-PNP provides an effective and attractive ESD protection solution for high-voltage integrated circuits.