This paper explores and proposes a design solution of an integrated skip cycle mode （SCM） control circuit with a simple structure. The design is simulated and implemented with XD10H-1.0μm modular DIMOS 650 V proces...This paper explores and proposes a design solution of an integrated skip cycle mode （SCM） control circuit with a simple structure. The design is simulated and implemented with XD10H-1.0μm modular DIMOS 650 V process. In order to meet the requirement of a wide temperature range and high yields of products, the schematic extracted from the layout is simulated with five process corners at 27℃ and 90℃. Simulation results demonstrate that the proposed integrated circuit is immune to noise and achieves skipping cycle control when switching mode power supply （SMPS） works with low load or without load.展开更多
With the increase of the clock frequency and silicon integration, power aware computing has become a critical concern in the design of the embedded processor and system-on-chip （SoC）. Dynamic voltage scaling （DVS）...With the increase of the clock frequency and silicon integration, power aware computing has become a critical concern in the design of the embedded processor and system-on-chip （SoC）. Dynamic voltage scaling （DVS） is an effective method for low-power designs. However, traditional DVS methods have two deficiencies. First, they have a conservative safety margin which is not necessary for most of the time. Second, they are exclusively concerned with the critical stage and ignore the significant potential free slack time of the noncritical stage. These factors lead to a large amount of power waste. In this paper, a novel pipeline structure with ultra-low power consumption is proposed. It cuts off the safety margin and takes use of the noncritical stages at the same time. A prototype pipeline is designed in 0.13 μm technology and analyzed. The result shows that a large amount of energy can be saved by using this structure. Compared with the fixed voltage case, 50% of the energy can be saved, and with respect to the traditional adaptive voltage scaling design, 37.8% of the energy can be saved.展开更多
Power consumption is the bottleneck of system performance. Power reduction has become an important issue in digital circuit design, especially for high performance portable devices (such as cell phones, PDAs, etc.). M...Power consumption is the bottleneck of system performance. Power reduction has become an important issue in digital circuit design, especially for high performance portable devices (such as cell phones, PDAs, etc.). Many power reduction techniques have also been proposed from the system level down to the circuit level. High-speed computation has thus become the expected norm from the average user, instead of being the province of the few with access to a powerful mainframe. Power must be added to the portable unit, even when power is available in non-portable applications, the issue of low-power design is becoming critical. Thus, it is evident that methodologies for the design of high-throughput, low-power digital systems are needed. Techniques for low-power operation are shown in this paper, which use the lowest possible supply voltage coupled with architectural, logic style, circuit, and technology optimizations. The threshold vol-tages of the MTCMOS devices for both low and high Vth are constructed as the low threshold Vth is approximately 150 - 200 mv whereas the high threshold Vth is managed by varying the thickness of the oxide Tox. Hence we are using different threshold voltages with minimum voltages and hence considered this project as ultra-low power designing.展开更多
This paper we proposed advanced burst mode control technique to reduce the standby power consumption of the switch mode power supply (SMPS). To reduce the standby power consumption, most of the converter use burst mod...This paper we proposed advanced burst mode control technique to reduce the standby power consumption of the switch mode power supply (SMPS). To reduce the standby power consumption, most of the converter use burst mode or skip mode control technique. However Conventional standby mode control techniques have some problems such as audible noise and poor regulation. In proposed techniques, basically, the burst mode control technique is employed to reduce the fundamental switching frequency while limiting the peak drain current. But, in proposed technique, to improve the regulation characteristic, burst period of the proposed technique is shorter than that of the conventional burst mode technique. And also, to reduce the switching loss increase due to the short burst period, burst switching signal of the proposed technique is partially skipped. By using proposed advanced burst mode control technique, calculated standby power is 0.695W while standby power of the conventional burst mode control is 1.014W.展开更多
In this paper, four new hybrid digital circuit design techniques, namely, hybrid multi-threshold CMOS complete stack technique, hybrid multi-threshold CMOS partial stack technique, hybrid super cutoff complete stack t...In this paper, four new hybrid digital circuit design techniques, namely, hybrid multi-threshold CMOS complete stack technique, hybrid multi-threshold CMOS partial stack technique, hybrid super cutoff complete stack technique and hybrid super cutoff partial stack technique, have been proposed to reduce the subthreshold leakage power dissipation in standby modes. Techniques available in literature are compared with our proposed hybrid circuit design techniques. Performance parameters such as subthreshold leakage power dissipation in active and standby modes, dynamic power dissipation and propagation delay, are compared using existing and proposed hybrid techniques for a two input AND gate. Reduction of subthreshold leakage power dissipation in standby mode is given more importance, in comparison with the other circuit design performance parameters. It is found that there is reduction in subthreshold leakage power dissipation in standby and active modes by 3.5× and 1.15× respectively using the proposed hybrid super cutoff complete stack technique as compared to the existing multi-threshold CMOS (MTCMOS) technique. Also a saving of 2.50× and 1.04× in subthreshold leakage power dissipation in standby and active modes respectively were observed using hybrid super cutoff complete stack technique as compared to the existing super cutoff CMOS (SCCMOS) technique. The proposed hybrid super cutoff stack technique proved to perform better in terms of subthreshold leakage power dissipation in standby mode in comparison with other techniques. Simulation results using Microwind EDA tool in 65 nm CMOS technology is provided in this paper.展开更多
From the perspective of development background,concepts and related policies of ultra-low emission,according to work practice,some issues and difficulties that need to be paid attention to in the environmental impact ...From the perspective of development background,concepts and related policies of ultra-low emission,according to work practice,some issues and difficulties that need to be paid attention to in the environmental impact assessment of ultra-low-emission thermal power projects were discussed from the aspects of evaluation criteria,evaluation grade and scope,pollution control technical lines,environmental benefit accounting,and total emission control,and corresponding recommendations were put forward.展开更多
Ultra-low emission(ULE)technology retrofits significantly impact the particulate-bound mercury(Hg)emissions from coal-fired power plants(CFPPs);however,the distribution and bioavailability of Hg in size-fractioned par...Ultra-low emission(ULE)technology retrofits significantly impact the particulate-bound mercury(Hg)emissions from coal-fired power plants(CFPPs);however,the distribution and bioavailability of Hg in size-fractioned particulate matter(PM)around the ULE-retrofitted CF-PPs are less understood.Here,total Hg and its chemical speciation in TSP(total suspended particles),PM_(10)(aerodynamic particle diameter≤10μm)and PM_(2.5)(aerodynamic particle diameter≤2.5μm)around a ULE-retrofitted CFPP in Guizhou Province were quantified.Atmospheric PM_(2.5)concentration was higher around this ULE-retrofitted CFPP than that in the intra-regional urban cities,and it had higher mass Hg concentration than other sizefractioned PM.Total Hg concentrations in PM had multifarious sources including CFPP,vehicle exhaust and biomass combustion,while they were significantly higher in autumn and winter than those in other seasons(P<0.05).Regardless of particulate size,atmospheric PM-bound Hg had lower residual fractions(<21%)while higher HCl-soluble fractions(>40%).Mass concentrations of exchangeable,HCl-soluble,elemental,and residual Hg in PM_(2.5)were higher than those in other size-fractioned PM,and were markedly elevated in autumn and winter(P<0.05).In PM_(2.5),HCl-soluble Hg presented a significantly positive relationship with elemental Hg(P<0.05),while residual Hg showed the significantly positive relationships with HCl-soluble Hg and elemental Hg(P<0.01).Overall,these results suggested that atmospheric PM-bound Hg around the ULE-retrofitted CFPP tends to accumulate in finer PM,and has higher bioavailable fractions,while has potential transformation between chemical speciation.展开更多
文摘This paper explores and proposes a design solution of an integrated skip cycle mode （SCM） control circuit with a simple structure. The design is simulated and implemented with XD10H-1.0μm modular DIMOS 650 V process. In order to meet the requirement of a wide temperature range and high yields of products, the schematic extracted from the layout is simulated with five process corners at 27℃ and 90℃. Simulation results demonstrate that the proposed integrated circuit is immune to noise and achieves skipping cycle control when switching mode power supply （SMPS） works with low load or without load.
基金supported by the Important National S&T Special Project of China under Grant No.2011ZX01034-002-001-2the Fundamental Research Funds for the Central Universities under Grant No.ZYGX2009J026
文摘With the increase of the clock frequency and silicon integration, power aware computing has become a critical concern in the design of the embedded processor and system-on-chip （SoC）. Dynamic voltage scaling （DVS） is an effective method for low-power designs. However, traditional DVS methods have two deficiencies. First, they have a conservative safety margin which is not necessary for most of the time. Second, they are exclusively concerned with the critical stage and ignore the significant potential free slack time of the noncritical stage. These factors lead to a large amount of power waste. In this paper, a novel pipeline structure with ultra-low power consumption is proposed. It cuts off the safety margin and takes use of the noncritical stages at the same time. A prototype pipeline is designed in 0.13 μm technology and analyzed. The result shows that a large amount of energy can be saved by using this structure. Compared with the fixed voltage case, 50% of the energy can be saved, and with respect to the traditional adaptive voltage scaling design, 37.8% of the energy can be saved.
文摘Power consumption is the bottleneck of system performance. Power reduction has become an important issue in digital circuit design, especially for high performance portable devices (such as cell phones, PDAs, etc.). Many power reduction techniques have also been proposed from the system level down to the circuit level. High-speed computation has thus become the expected norm from the average user, instead of being the province of the few with access to a powerful mainframe. Power must be added to the portable unit, even when power is available in non-portable applications, the issue of low-power design is becoming critical. Thus, it is evident that methodologies for the design of high-throughput, low-power digital systems are needed. Techniques for low-power operation are shown in this paper, which use the lowest possible supply voltage coupled with architectural, logic style, circuit, and technology optimizations. The threshold vol-tages of the MTCMOS devices for both low and high Vth are constructed as the low threshold Vth is approximately 150 - 200 mv whereas the high threshold Vth is managed by varying the thickness of the oxide Tox. Hence we are using different threshold voltages with minimum voltages and hence considered this project as ultra-low power designing.
文摘This paper we proposed advanced burst mode control technique to reduce the standby power consumption of the switch mode power supply (SMPS). To reduce the standby power consumption, most of the converter use burst mode or skip mode control technique. However Conventional standby mode control techniques have some problems such as audible noise and poor regulation. In proposed techniques, basically, the burst mode control technique is employed to reduce the fundamental switching frequency while limiting the peak drain current. But, in proposed technique, to improve the regulation characteristic, burst period of the proposed technique is shorter than that of the conventional burst mode technique. And also, to reduce the switching loss increase due to the short burst period, burst switching signal of the proposed technique is partially skipped. By using proposed advanced burst mode control technique, calculated standby power is 0.695W while standby power of the conventional burst mode control is 1.014W.
文摘In this paper, four new hybrid digital circuit design techniques, namely, hybrid multi-threshold CMOS complete stack technique, hybrid multi-threshold CMOS partial stack technique, hybrid super cutoff complete stack technique and hybrid super cutoff partial stack technique, have been proposed to reduce the subthreshold leakage power dissipation in standby modes. Techniques available in literature are compared with our proposed hybrid circuit design techniques. Performance parameters such as subthreshold leakage power dissipation in active and standby modes, dynamic power dissipation and propagation delay, are compared using existing and proposed hybrid techniques for a two input AND gate. Reduction of subthreshold leakage power dissipation in standby mode is given more importance, in comparison with the other circuit design performance parameters. It is found that there is reduction in subthreshold leakage power dissipation in standby and active modes by 3.5× and 1.15× respectively using the proposed hybrid super cutoff complete stack technique as compared to the existing multi-threshold CMOS (MTCMOS) technique. Also a saving of 2.50× and 1.04× in subthreshold leakage power dissipation in standby and active modes respectively were observed using hybrid super cutoff complete stack technique as compared to the existing super cutoff CMOS (SCCMOS) technique. The proposed hybrid super cutoff stack technique proved to perform better in terms of subthreshold leakage power dissipation in standby mode in comparison with other techniques. Simulation results using Microwind EDA tool in 65 nm CMOS technology is provided in this paper.
基金Supported by Special Project for Research on Prevention and Control of Air Pollution from Fire Coal in 2018 of Ministry of Ecology and Environment of the People’s Republic of China(2018A030)
文摘From the perspective of development background,concepts and related policies of ultra-low emission,according to work practice,some issues and difficulties that need to be paid attention to in the environmental impact assessment of ultra-low-emission thermal power projects were discussed from the aspects of evaluation criteria,evaluation grade and scope,pollution control technical lines,environmental benefit accounting,and total emission control,and corresponding recommendations were put forward.
基金supported by the Science and Technology Project of Guizhou Province(No.QKHJC[2020]1Y187)the National Natural Science Foundation of China(Nos.41265008,42007305,and 22166009)。
文摘Ultra-low emission(ULE)technology retrofits significantly impact the particulate-bound mercury(Hg)emissions from coal-fired power plants(CFPPs);however,the distribution and bioavailability of Hg in size-fractioned particulate matter(PM)around the ULE-retrofitted CF-PPs are less understood.Here,total Hg and its chemical speciation in TSP(total suspended particles),PM_(10)(aerodynamic particle diameter≤10μm)and PM_(2.5)(aerodynamic particle diameter≤2.5μm)around a ULE-retrofitted CFPP in Guizhou Province were quantified.Atmospheric PM_(2.5)concentration was higher around this ULE-retrofitted CFPP than that in the intra-regional urban cities,and it had higher mass Hg concentration than other sizefractioned PM.Total Hg concentrations in PM had multifarious sources including CFPP,vehicle exhaust and biomass combustion,while they were significantly higher in autumn and winter than those in other seasons(P<0.05).Regardless of particulate size,atmospheric PM-bound Hg had lower residual fractions(<21%)while higher HCl-soluble fractions(>40%).Mass concentrations of exchangeable,HCl-soluble,elemental,and residual Hg in PM_(2.5)were higher than those in other size-fractioned PM,and were markedly elevated in autumn and winter(P<0.05).In PM_(2.5),HCl-soluble Hg presented a significantly positive relationship with elemental Hg(P<0.05),while residual Hg showed the significantly positive relationships with HCl-soluble Hg and elemental Hg(P<0.01).Overall,these results suggested that atmospheric PM-bound Hg around the ULE-retrofitted CFPP tends to accumulate in finer PM,and has higher bioavailable fractions,while has potential transformation between chemical speciation.
