Ta/NiFe film is deposited on Si substrate precoated with SiO_2 by magnetron sputtering.SiO_2/Ta interface and Ta_5Si_3 standard sample are investigated by using X-ray photoelectron spectroscopy (XPS) and peak decompos...Ta/NiFe film is deposited on Si substrate precoated with SiO_2 by magnetron sputtering.SiO_2/Ta interface and Ta_5Si_3 standard sample are investigated by using X-ray photoelectron spectroscopy (XPS) and peak decomposition technique.The results show that there is a thermodynamically favorable reaction at the SiO_2/Ta interface:37Ta+15SiO_2=5Ta_5Si_3+6Ta_2O_5.The more stable products Ta_5Si_3 and Ta_2O_5 may be beneficial to stop the diffusion of Cu into SiO_2.展开更多
A novel low-swing interface circuit for high-speed on-chip asynchronous interconnection is proposed in this paper. It takes a differential level-triggered latch to recover digital signal with ultra low-swing voltage l...A novel low-swing interface circuit for high-speed on-chip asynchronous interconnection is proposed in this paper. It takes a differential level-triggered latch to recover digital signal with ultra low-swing voltage less than 50 mV, and the driver part of the interface circuit is optimized for low power using the driver-array method, With a capacity to work up to 500 MHz, the proposed circuit, which is simulated and fabricated using SMIC 0.18-pm 1.8-V digital CMOS technology, consumes less power than previously reported designs.展开更多
文摘Ta/NiFe film is deposited on Si substrate precoated with SiO_2 by magnetron sputtering.SiO_2/Ta interface and Ta_5Si_3 standard sample are investigated by using X-ray photoelectron spectroscopy (XPS) and peak decomposition technique.The results show that there is a thermodynamically favorable reaction at the SiO_2/Ta interface:37Ta+15SiO_2=5Ta_5Si_3+6Ta_2O_5.The more stable products Ta_5Si_3 and Ta_2O_5 may be beneficial to stop the diffusion of Cu into SiO_2.
基金the 973 Program of China (Grant No.G1999032903)the National Science Fund for Distinguished Young Scholars (Grant No.60025101)the Major Program of National Natural Science Foundation of China (Grant No.90707002)
文摘A novel low-swing interface circuit for high-speed on-chip asynchronous interconnection is proposed in this paper. It takes a differential level-triggered latch to recover digital signal with ultra low-swing voltage less than 50 mV, and the driver part of the interface circuit is optimized for low power using the driver-array method, With a capacity to work up to 500 MHz, the proposed circuit, which is simulated and fabricated using SMIC 0.18-pm 1.8-V digital CMOS technology, consumes less power than previously reported designs.
