A novel split-gate power UMOSFET with a variable K dielectric layer is proposed. This device shows a 36.2% reduction in the specific on=state resistance at a breakdown voltage of 115 V, as compared with the SGE-UMOS d...A novel split-gate power UMOSFET with a variable K dielectric layer is proposed. This device shows a 36.2% reduction in the specific on=state resistance at a breakdown voltage of 115 V, as compared with the SGE-UMOS device. Numerical simulation results indicate that the proposed device features high performance with an improved figure of merit of Qg × RON and BV^2/RON, as compared with the previous power UMOSFET.展开更多
Based on the theoretical and experimental investigation of a thin silicon layer（TSL） with linear variable doping（LVD） and further research on the TSL LVD with a multiple step field plate（MSFP）,a breakdown voltag...Based on the theoretical and experimental investigation of a thin silicon layer（TSL） with linear variable doping（LVD） and further research on the TSL LVD with a multiple step field plate（MSFP）,a breakdown voltage（BV） model is proposed and experimentally verified in this paper.With the two-dimensional Poisson equation of the silicon on insulator（SOI） device,the lateral electric field in drift region of the thin silicon layer is assumed to be constant.For the SOI device with LVD in the thin silicon layer,the dependence of the BV on impurity concentration under the drain is investigated by an enhanced dielectric layer field（ENDIF）,from which the reduced surface field（RESURF） condition is deduced.The drain in the centre of the device has a good self-isolation effect,but the problem of the high voltage interconnection（HVI） line will become serious.The two step field plates including the source field plate and gate field plate can be adopted to shield the HVI adverse effect on the device.Based on this model,the TSL LVD SOI n-channel lateral double-diffused MOSFET（nLDMOS） with MSFP is realized.The experimental breakdown voltage（BV） and specific on-resistance（R on,sp） of the TSL LVD SOI device are 694 V and 21.3 ·mm 2 with a drift region length of 60 μm,buried oxide layer of 3 μm,and silicon layer of 0.15 μm,respectively.展开更多
Low voltage operating organic devices and circuits have been realized using atomic layer deposition deposited aluminum oxide thin film as dielectric layer. The dielectric film has per unit area capacitance of 165 nF/c...Low voltage operating organic devices and circuits have been realized using atomic layer deposition deposited aluminum oxide thin film as dielectric layer. The dielectric film has per unit area capacitance of 165 nF/cm2 and leakage current of 1 nA/cm2 at 1 MV/cm. The devices and circuits use the small-molecule hydrocarbon pentacene as the active semiconductor material. Transistors,inverters,and ring oscillators with operating voltage lower than 5 V were obtained. The mobility of organic field-effect transistors was extracted to be 0.16 cm2/Vs in saturation range,the threshold voltage is 0.3 V,and the on/off current ratio is larger than 105. The gain of inverters is estimated to be 12 at -5 V supply voltage,and the propagation delay is 0.25 ms per stage in 5-stage ring oscillators.展开更多
基金Project supported by the National Natural Science Foundation of China (Grant No. 60906048)the Program for New Century Excellent Talents in University,China (Grant No. NCET-10-0052)the Fundamental Research Funds for the Central Universities,China (Grant No. HEUCFT1008)
文摘A novel split-gate power UMOSFET with a variable K dielectric layer is proposed. This device shows a 36.2% reduction in the specific on=state resistance at a breakdown voltage of 115 V, as compared with the SGE-UMOS device. Numerical simulation results indicate that the proposed device features high performance with an improved figure of merit of Qg × RON and BV^2/RON, as compared with the previous power UMOSFET.
基金Project supported partially by the National Natural Science Foundation of China (Grant Nos. 60906038 and 61076082)
文摘Based on the theoretical and experimental investigation of a thin silicon layer（TSL） with linear variable doping（LVD） and further research on the TSL LVD with a multiple step field plate（MSFP）,a breakdown voltage（BV） model is proposed and experimentally verified in this paper.With the two-dimensional Poisson equation of the silicon on insulator（SOI） device,the lateral electric field in drift region of the thin silicon layer is assumed to be constant.For the SOI device with LVD in the thin silicon layer,the dependence of the BV on impurity concentration under the drain is investigated by an enhanced dielectric layer field（ENDIF）,from which the reduced surface field（RESURF） condition is deduced.The drain in the centre of the device has a good self-isolation effect,but the problem of the high voltage interconnection（HVI） line will become serious.The two step field plates including the source field plate and gate field plate can be adopted to shield the HVI adverse effect on the device.Based on this model,the TSL LVD SOI n-channel lateral double-diffused MOSFET（nLDMOS） with MSFP is realized.The experimental breakdown voltage（BV） and specific on-resistance（R on,sp） of the TSL LVD SOI device are 694 V and 21.3 ·mm 2 with a drift region length of 60 μm,buried oxide layer of 3 μm,and silicon layer of 0.15 μm,respectively.
基金supported by the National Basic Research Program of China ("973" Project)(Grant Nos.2009CB320302,2011CB808404)the Na-tional Natural Science Foundation of China (Grant Nos.60676001,60676008)
文摘Low voltage operating organic devices and circuits have been realized using atomic layer deposition deposited aluminum oxide thin film as dielectric layer. The dielectric film has per unit area capacitance of 165 nF/cm2 and leakage current of 1 nA/cm2 at 1 MV/cm. The devices and circuits use the small-molecule hydrocarbon pentacene as the active semiconductor material. Transistors,inverters,and ring oscillators with operating voltage lower than 5 V were obtained. The mobility of organic field-effect transistors was extracted to be 0.16 cm2/Vs in saturation range,the threshold voltage is 0.3 V,and the on/off current ratio is larger than 105. The gain of inverters is estimated to be 12 at -5 V supply voltage,and the propagation delay is 0.25 ms per stage in 5-stage ring oscillators.
