This paper describes a novel time domain noise model for voltage controlled oscillators that accurately and efficiently predicts both tuning behavior and phase noise performance. The proposed method is based on device...This paper describes a novel time domain noise model for voltage controlled oscillators that accurately and efficiently predicts both tuning behavior and phase noise performance. The proposed method is based on device level flicker and thermal noise models that have been developed in Simulink and although the case study is a multiple feedback four delay cell architecture it could easily be extended to any similar topology. The strength of the approach is verified through comparison with post layout simulation results from a commercial simulator and measured results from a 120 nm fabricated prototype chip. Furthermore, the effect of control voltage flicker noise on oscillator output phase noise is also investigated as an example application of the model. Transient simulation based noise analysis has the strong advantage that noise performance of higher level systems such as phase locked loops can be easily determined over a realistic acquisition and locking process yielding more accurate and reliable results.展开更多
In the presence of Gaussian white noise,we study the properties of voltage-controlled oscillator neuronmodel and discuss the effects of the additive and multiplicative noise.It is found that the additive noise can acc...In the presence of Gaussian white noise,we study the properties of voltage-controlled oscillator neuronmodel and discuss the effects of the additive and multiplicative noise.It is found that the additive noise can accelerate andcounterwork the firing of neuron,which depends on the value of central frequency of neuron itself,while multiplicativenoise can induce the continuous change or mutation of membrane potential.展开更多
A configuration using current feedback amplifiers AD844 and multiplier AD534 has been presented, which is capable of realizing Voltage Controlled Floating Inductance (proportional and in-verse proportional). The appli...A configuration using current feedback amplifiers AD844 and multiplier AD534 has been presented, which is capable of realizing Voltage Controlled Floating Inductance (proportional and in-verse proportional). The application of band pass filter in Figure 4(a), notch filter in Figure 5(a) and Hartley oscillator in Figure 6(a) and simulation result in Figures 4(b)-(d), Figures 5(b)-(d), Figures 6(b)-(d) shows the workability of proposed configuration.展开更多
This work summarizes the structure and operating features of a high-performance 3-stage dual-delay-path (DDP) voltage-controlled ring oscillator (VCRO) with self-biased delay cells for Phase-Locked Loop (PLL) structur...This work summarizes the structure and operating features of a high-performance 3-stage dual-delay-path (DDP) voltage-controlled ring oscillator (VCRO) with self-biased delay cells for Phase-Locked Loop (PLL) structurebased clock generation and digital system driving. For a voltage supply V<sub>DD</sub> = 1.8 V, the resulting set of performance parameters include power consumption P<sub><sub></sub>DC</sub> = 4.68 mW and phase noise PN@1MHz = -107.8 dBc/Hz. From the trade-off involving P<sub>DC</sub> and PN, a system level high performance is obtained considering a reference figure-of-merit ( FoM = -224 dBc/Hz ). Implemented at schematic level by applying CMOS-based technology (UMC L180), the proposed VCRO was designed at Cadence environment and optimized at MunEDA WiCkeD tool.展开更多
An innovative solution to design phase and quadrature pulsed coupled oscillators systems through electromagnetic waveguides is described in this paper. Each oscillator is constituted by an LC differential resonator re...An innovative solution to design phase and quadrature pulsed coupled oscillators systems through electromagnetic waveguides is described in this paper. Each oscillator is constituted by an LC differential resonator refilled through a couple of current pulse generator circuits. The phase and quadrature coupling between the two differential oscillators is achieved using delayed replicas of generated fundamentals from a resonator as driving signal of pulse generator injecting in the other resonator. The delayed replicas are obtained by microstrip-based delay-lines. A 2.4 - 2.5 GHz VCO has been implemented in a 150 nm RF CMOS process. Simulations showed at 1 MHz offset a phase noise of -139.9 dBc/Hz and a FOM of -189.1 dB.展开更多
In complementary metal oxide semiconductor （CMOS） nanoscalc technology, power dissipation is becoming important metric. In this work low leakage voltage controlled ring oscillator circuit system was proposed for cri...In complementary metal oxide semiconductor （CMOS） nanoscalc technology, power dissipation is becoming important metric. In this work low leakage voltage controlled ring oscillator circuit system was proposed for critical communication systems with high oscillation frequency. An ideal approach has been presented with substrate biasing technique for reduction of power consumption. The simulation have been completed using cadence virtuoso 45 nm standard CMOS technology at room temperature 27~C with supply voltage Vc^d = 0.7 V. The simulation results suggest that voltage controlled ring oscillator has characterized with efficient low power voltage controlled oscillator （VCO） in term of minimum leakage power （1.23 nW） and maximum oscilla- tion frequency （4.76 GHz） with joint positive channel metal oxide semiconductor and negative channel metal oxide semiconductor （PMOS and NMOS） reverse sub- strate bias technique. PMOS, NMOS and joint reverse body bias techniques have been compared in the presented work.展开更多
This paper proposes an efficient PSP-based model for cross-coupled metal-oxide-semiconductor field-effect transistors(MOSFETs) with optimized layout in the voltage controlled oscillator(VCO).The model employs a PSP ch...This paper proposes an efficient PSP-based model for cross-coupled metal-oxide-semiconductor field-effect transistors(MOSFETs) with optimized layout in the voltage controlled oscillator(VCO).The model employs a PSP charge model to characterize the bias-dependent extrinsic capacitance instead of numerical functions with strong non-linearity.The simulation convergence is greatly improved by this method.An original scheme is developed to extract the parameters of the PSP charge model based on S-parameters measurement.The interconnection parasitics of the cross-coupled MOSFETs are modeled based on vector fitting.The model is verified with an LC VCO design,and exhibits excellent convergence during simulation.The results show improvements as high as 60.5% and 61.8% in simulation efficiency and accuracy,respectively,indicating that the proposed model better characterizes optimized cross-coupled MOSFETs in advanced radio frequency(RF) circuit design.展开更多
A novel micromechanical bridge-shaped voltage-controlled oscillator with high Q value was fabricated. The core of this kind of oscillators is an electrothermally excited and piezoresistively detected micromechanical b...A novel micromechanical bridge-shaped voltage-controlled oscillator with high Q value was fabricated. The core of this kind of oscillators is an electrothermally excited and piezoresistively detected micromechanical bridge resonator. Its resonance frequency can be adjusted by changing the DC voltage applied to the Wheatstone bridge. Theoretical analysis and experimental data show that its resonance frequency is linear with the square of the DC voltage. The linearity is better than 0.16% and the adjustable frequency range excels 17.15%.展开更多
The spin-transfer nano-oscillator （STNO） has recently acquired a huge amount of research interest, due to its promising easy tunability along with the miniature size. The output frequency control of an STNO through ...The spin-transfer nano-oscillator （STNO） has recently acquired a huge amount of research interest, due to its promising easy tunability along with the miniature size. The output frequency control of an STNO through magnetic field and current has been examined almost to its full extent; however, there are issues that still need to be addressed. Here, we propose a novel way of voltage control of the output frequency of an STNO, and alongside reducing its power requirement.展开更多
文摘This paper describes a novel time domain noise model for voltage controlled oscillators that accurately and efficiently predicts both tuning behavior and phase noise performance. The proposed method is based on device level flicker and thermal noise models that have been developed in Simulink and although the case study is a multiple feedback four delay cell architecture it could easily be extended to any similar topology. The strength of the approach is verified through comparison with post layout simulation results from a commercial simulator and measured results from a 120 nm fabricated prototype chip. Furthermore, the effect of control voltage flicker noise on oscillator output phase noise is also investigated as an example application of the model. Transient simulation based noise analysis has the strong advantage that noise performance of higher level systems such as phase locked loops can be easily determined over a realistic acquisition and locking process yielding more accurate and reliable results.
基金National Natural Science Foundation of China under Grant No.30600122Natural Science Foundation of Guangdong Province of China under Grant No.06025073the Natural Science Foundation of South China University of Technology under Grant No.B14-E5050200
文摘In the presence of Gaussian white noise,we study the properties of voltage-controlled oscillator neuronmodel and discuss the effects of the additive and multiplicative noise.It is found that the additive noise can accelerate andcounterwork the firing of neuron,which depends on the value of central frequency of neuron itself,while multiplicativenoise can induce the continuous change or mutation of membrane potential.
文摘A configuration using current feedback amplifiers AD844 and multiplier AD534 has been presented, which is capable of realizing Voltage Controlled Floating Inductance (proportional and in-verse proportional). The application of band pass filter in Figure 4(a), notch filter in Figure 5(a) and Hartley oscillator in Figure 6(a) and simulation result in Figures 4(b)-(d), Figures 5(b)-(d), Figures 6(b)-(d) shows the workability of proposed configuration.
文摘This work summarizes the structure and operating features of a high-performance 3-stage dual-delay-path (DDP) voltage-controlled ring oscillator (VCRO) with self-biased delay cells for Phase-Locked Loop (PLL) structurebased clock generation and digital system driving. For a voltage supply V<sub>DD</sub> = 1.8 V, the resulting set of performance parameters include power consumption P<sub><sub></sub>DC</sub> = 4.68 mW and phase noise PN@1MHz = -107.8 dBc/Hz. From the trade-off involving P<sub>DC</sub> and PN, a system level high performance is obtained considering a reference figure-of-merit ( FoM = -224 dBc/Hz ). Implemented at schematic level by applying CMOS-based technology (UMC L180), the proposed VCRO was designed at Cadence environment and optimized at MunEDA WiCkeD tool.
文摘An innovative solution to design phase and quadrature pulsed coupled oscillators systems through electromagnetic waveguides is described in this paper. Each oscillator is constituted by an LC differential resonator refilled through a couple of current pulse generator circuits. The phase and quadrature coupling between the two differential oscillators is achieved using delayed replicas of generated fundamentals from a resonator as driving signal of pulse generator injecting in the other resonator. The delayed replicas are obtained by microstrip-based delay-lines. A 2.4 - 2.5 GHz VCO has been implemented in a 150 nm RF CMOS process. Simulations showed at 1 MHz offset a phase noise of -139.9 dBc/Hz and a FOM of -189.1 dB.
文摘In complementary metal oxide semiconductor （CMOS） nanoscalc technology, power dissipation is becoming important metric. In this work low leakage voltage controlled ring oscillator circuit system was proposed for critical communication systems with high oscillation frequency. An ideal approach has been presented with substrate biasing technique for reduction of power consumption. The simulation have been completed using cadence virtuoso 45 nm standard CMOS technology at room temperature 27~C with supply voltage Vc^d = 0.7 V. The simulation results suggest that voltage controlled ring oscillator has characterized with efficient low power voltage controlled oscillator （VCO） in term of minimum leakage power （1.23 nW） and maximum oscilla- tion frequency （4.76 GHz） with joint positive channel metal oxide semiconductor and negative channel metal oxide semiconductor （PMOS and NMOS） reverse sub- strate bias technique. PMOS, NMOS and joint reverse body bias techniques have been compared in the presented work.
基金Project supported by the National Basic Research Program (973) of China (No. 2010CB327403)the National Natural Science Foundation of China (Nos. 61001066 and 61102027)
文摘This paper proposes an efficient PSP-based model for cross-coupled metal-oxide-semiconductor field-effect transistors(MOSFETs) with optimized layout in the voltage controlled oscillator(VCO).The model employs a PSP charge model to characterize the bias-dependent extrinsic capacitance instead of numerical functions with strong non-linearity.The simulation convergence is greatly improved by this method.An original scheme is developed to extract the parameters of the PSP charge model based on S-parameters measurement.The interconnection parasitics of the cross-coupled MOSFETs are modeled based on vector fitting.The model is verified with an LC VCO design,and exhibits excellent convergence during simulation.The results show improvements as high as 60.5% and 61.8% in simulation efficiency and accuracy,respectively,indicating that the proposed model better characterizes optimized cross-coupled MOSFETs in advanced radio frequency(RF) circuit design.
基金This work supported by the National Natural Science Foundation of China(Grant No.60036016)by National 863 Project of China under Grant No.2001AA313090.
文摘A novel micromechanical bridge-shaped voltage-controlled oscillator with high Q value was fabricated. The core of this kind of oscillators is an electrothermally excited and piezoresistively detected micromechanical bridge resonator. Its resonance frequency can be adjusted by changing the DC voltage applied to the Wheatstone bridge. Theoretical analysis and experimental data show that its resonance frequency is linear with the square of the DC voltage. The linearity is better than 0.16% and the adjustable frequency range excels 17.15%.
文摘The spin-transfer nano-oscillator （STNO） has recently acquired a huge amount of research interest, due to its promising easy tunability along with the miniature size. The output frequency control of an STNO through magnetic field and current has been examined almost to its full extent; however, there are issues that still need to be addressed. Here, we propose a novel way of voltage control of the output frequency of an STNO, and alongside reducing its power requirement.
