Simulation and Analysis of the Effects of Pressure and Temperature on the Output Voltage of Proton Exchange Membrane Fuel Cells

Proton exchange membrane fuel cell has advantages of high energy conversion efficiency, high reliability, no pollution, low operating temperature and rapid start-up. It has become an ideal method of hydrogen energy utilization and is also ideally suited to be used as the main source of energy for automobiles. Currently, it constitutes a research hot spot in the field of new energy vehicles. Based on the working mechanism of proton exchange membrane fuel cells and empirical models, a terminal voltage dynamic model, an open circuit voltage model and three voltage loss models are established. Matlab/Simulink software is utilized to simulate the model and perform analyses in response to the impact of operating temperature and pressure on its performance. To enhance the efficiency of the proton exchange membrane fuel cell, the operating temperature should be increased in the medium and low current density zones and the operating pressure should be increased in the high current density zone.

Optimal Dynamic Voltage Restorer Using Water Cycle Optimization Algorithm

This paper proposes a low complexity control scheme for voltage control of a dynamic voltage restorer(DVR)in a three-phase system.The control scheme employs the fractional order,proportional-integral-derivative(FOPID)controller to improve on the DVR performance in order to enhance the power quality in terms of the response time,steady-state error and total harmonic distortion(THD).The result obtained was compared with fractional order,proportionalintegral(FOPI),proportional-integral-derivative(PID)and proportional-integral(PI)controllers in order to show the effectiveness of the proposed DVR control scheme.A water cycle optimization algorithm(WCA)was utilized to find the optimal set for all the controller gains.They were used to solve four power quality issues;balanced voltage sag,balanced voltage swell,unbalanced voltage sag,and unbalanced voltage swell.It showed that one set of controller gain obtained from the WCA could solve all the power quality issues while the others in the literature needed an individual set of optimal gain for each power quality problem.To prove the concept,the proposed DVR algorithm was simulated in the MATLAB/Simulink software and the results revealed that the four optimal controllers can compensate for all the power quality problems.A comparative analysis of the results in various aspects of their dynamic response and%THD was discussed and analyzed.It was found that PID controller yields the most rapid performance in terms of average response time while FOPID controller yields the best performance in term of average%steady-state error.FOPI controller was found to provide the lowest THD percentage in the average%THD.FOPID did not differ much in average response from the PID and average%THD from FOPI;however,FOPID provided the most outstanding average steady-state error.According to the CBMA curve,the dynamic responses of all controllers fall in the acceptable power quality area.The total harmonic distortion(THD)of the compensated load voltage from all the controllers were within the 8%limit in accordance to the IEEE std.519-2014.

Novel Voltage Scaling Algorithm Through Ant Colony Optimization for Embedded Distributed Systems

Dynamic voltage scaling (DVS), supported by many DVS-enabled processors, is an efficient technique for energy-efficient embedded systems. Many researchers work on DVS and have presented various DVS algorithms, some with quite good results. However, the previous algorithms either have a large time complexity or obtain results sensitive to the count of the voltage modes. Fine-grained voltage modes lead to optimal results, but coarse-grained voltage modes cause less optimal one. A new algorithm is presented, which is based on ant colony optimization, called ant colony optimization voltage and task scheduling (ACO-VTS) with a low time complexity implemented by parallelizing and its linear time approximation algorithm. Both of them generate quite good results, saving up to 30% more energy than that of the previous ones under coarse-grained modes, and their results don’t depend on the number of modes available.

Novel Control Method for Dynamic Voltage Regulator

Control strategy affects directly the working performances of dynamic voltage regulator （DVR）. One-cycle control is an effective nonlinear signal modulation control method. In this paper, a new one-cycle control scheme for DVR was proposed in single phase supply system. On the basis of principle analysis, the corresponding one-cycle control model for DVR was built up, which is characterized by simple control circuits, good control performance, and high control precision. As an example, a control model for single-phase DVR was simulated by using Matlab/Simulink and SimPowerSystem. The results show that the load voltage could be compensated quickly at the points of supply voltage stepping down and up, and the relative error was less than 4% in the whole voltage sag process. Both theory analysis and simulation results show that the new one-cycle control scheme for DVR is effective.

Transient Stability Analysis and Design of VSGs with Different DC-Link Voltage Controllers

Virtual synchronous control has been widely studied for the advantages of emulating inertia for voltage source converters (VSCs). A constant dc-link voltage is usually assumed in existing literature to estimate transient stability of virtual synchronous generators (VSGs). However, actual power supply in the dc-side of VSGs is limited and different dc-link voltage controllers are needed to achieve power balance between DC side and AC side. Addition of dc-link voltage controller has great influence on transient behavior of VSGs, which has not been investigated by previous research. To fill this gap, this paper gives insights into the effect of dc-link voltage dynamics on transient stability of VSGs. First, two typical kinds of VSGs with dc-link voltage controllers are introduced. Then, mathematical models considering dc-link dynamics are established and the effect of dc-link voltage controllers on transient synchronization stability of VSGs is revealed through equal area criterion (EAC). It is found that dc-link voltage controller would reduce stability margin of VSGs and design-oriented transient stability analysis is carried out quantitively using critical clearing time (CCT). Finally, simulation results are given to validate correctness of theoretical analysis.

A Review of the Current Task Offloading Algorithms,Strategies and Approach in Edge Computing Systems

Task offloading is an important concept for edge computing and the Internet of Things(IoT)because computationintensive tasksmust beoffloaded tomore resource-powerful remote devices.Taskoffloading has several advantages,including increased battery life,lower latency,and better application performance.A task offloading method determines whether sections of the full application should be run locally or offloaded for execution remotely.The offloading choice problem is influenced by several factors,including application properties,network conditions,hardware features,and mobility,influencing the offloading system’s operational environment.This study provides a thorough examination of current task offloading and resource allocation in edge computing,covering offloading strategies,algorithms,and factors that influence offloading.Full offloading and partial offloading strategies are the two types of offloading strategies.The algorithms for task offloading and resource allocation are then categorized into two parts:machine learning algorithms and non-machine learning algorithms.We examine and elaborate on algorithms like Supervised Learning,Unsupervised Learning,and Reinforcement Learning(RL)under machine learning.Under the non-machine learning algorithm,we elaborate on algorithms like non(convex)optimization,Lyapunov optimization,Game theory,Heuristic Algorithm,Dynamic Voltage Scaling,Gibbs Sampling,and Generalized Benders Decomposition(GBD).Finally,we highlight and discuss some research challenges and issues in edge computing.

Energy-efficient reconfigurable processor for QC-LDPC via adaptive coding-voltage-frequency tuning

To apply a quasi-cyclic low density parity check(QC-LDPC)to different scenarios,a data-stream driven pipelined macro instruction set and a reconfigurable processor architecture are proposed for the typical QC-LDPC algorithm.The data-level parallelism is improved by instructions to dynamically configure the multi-core computing units.Simultaneously,an intelligent adjustment strategy based on a programmable wake-up controller(WuC)is designed so that the computing mode,operating voltage,and frequency of the QC-LDPC algorithm can be adjusted.This adjustment can improve the computing efficiency of the processor.The QC-LDPC processors are verified on the Xilinx ZCU102 field programmable gate array(FPGA)board and the computing efficiency is measured.The experimental results indicate that the QC-LDPC processor can support two encoding lengths of three typical QC-LDPC algorithms and 20 adaptive operating modes of operating voltage and frequency.The maximum efficiency can reach up to 12.18 Gbit/(s·W),which is more flexible than existing state-of-the-art processors for QC-LDPC.

A Hybrid Model for Reliability Aware and Energy-Efficiency in Multicore Systems

Recently,Multicore systems use Dynamic Voltage/Frequency Scaling(DV/FS)technology to allow the cores to operate with various voltage and/or frequencies than other cores to save power and enhance the performance.In this paper,an effective and reliable hybridmodel to reduce the energy and makespan in multicore systems is proposed.The proposed hybrid model enhances and integrates the greedy approach with dynamic programming to achieve optimal Voltage/Frequency(Vmin/F)levels.Then,the allocation process is applied based on the availableworkloads.The hybrid model consists of three stages.The first stage gets the optimum safe voltage while the second stage sets the level of energy efficiency,and finally,the third is the allocation stage.Experimental results on various benchmarks show that the proposed model can generate optimal solutions to save energy while minimizing the makespan penalty.Comparisons with other competitive algorithms show that the proposed model provides on average 48%improvements in energy-saving and achieves an 18%reduction in computation time while ensuring a high degree of system reliability.

Static and Dynamic Pull-In Instability of Nano-Beams Resting on Elastic Foundation Based on the Nonlocal Elasticity Theory

This paper provides the static and dynamic pullin behavior of nano-beams resting on the elastic foundation based on the nonlocal theory which is able to capture the size effects for structures in micron and sub-micron scales. For this purpose, the governing equation of motion and the boundary conditions are driven using a variational approach. This formulation includes the influences of fringing field and intermolecular forces such as Casimir and van der Waals forces. The differential quadrature （DQ） method is employed as a high-order approximation to discretize the governing nonlinear differential equation, yielding more accurate results with a Considerably smaller number of grid points. In addition, a powerful analytical method called parameter expansion method （PEM） is utilized to compute the dynamic solution and frequency-amplitude relationship. It is illustrated that the first two terms in series expansions are sufficient to produce an acceptable solution of the mentioned structure. Finally, the effects of basic parameters on static and dynamic pull-in insta- bility and natural frequency are studied.

Fuzzy Controlled Ultra-Capacitor Based DVR (UCAP-DVR) for Power Quality Enhancement

In recent years, a rapid decrease in the cost of various energy storage technologies and their integration into grid becomes a reality with the advent of smart grid. The Dynamic Voltage Restorer (DVR) is a custom power device that has an excellent dynamic capability used to provide voltage sag, swell compensation in distribution systems. Among the energy storage devices, Ultra-Capacitors (UCAP) have ideal characteristics such as high power and low energy density essential for the compensation of voltage sag and swell, which require high power for short interval of time. This paper presents an integration of rechargeable UCAP with DVR. This UCAP-DVR presents a modular, flexible system configuration that will have an active power capability and also provide deep, extended mitigation for power quality problems. The DVR is integrated into UCAP via bidirectional DC-DC converter which supports a rigid dc-link voltage for DVR and also helps in compensating temporary voltage sag and swell. FUZZY LOGIC Controller is used to enhance the performance of UCAP-DVR. The simulation model for the proposed system has been developed in MAT-LAB and the performance over conventional DVR is compared with the results obtained.

Low-voltage ride-through capability improvement of Type-3 wind turbine through active disturbance rejection feedback control-based dynamic voltage restorer

Disconnections due to voltage drops in the grid cannot be permitted if wind turbines(WTs)contribute significantly to electricity pro-duction,as this increases the risk of production loss and destabilizes the grid.To mitigate the negative effects of these occurrences,WTs must be able to ride through the low-voltage conditions and inject reactive current to provide dynamic voltage support.This paper investigates the low-voltage ride-through(LVRT)capability enhancement of a Type-3 WT utilizing a dynamic voltage restorer(DVR).During the grid voltage drop,the DVR quickly injects a compensating voltage to keep the stator voltage constant.This paper proposes an active disturbance rejection control(ADRC)scheme to control the rotor-side,grid-side and DVR-side converters in a wind–DVR integrated network.The performance of the Type-3 WT with DVR topology is evaluated under various test conditions using MATLAB®/Simulink®.These simulation results are also compared with the experimental results for the LVRT capability performed on a WT emulator equipped with a crowbar and direct current(DC)chopper.The simulation results demonstrate a favourable transient and steady-state response of the Type-3 wind turbine quantities defined by the LVRT codes,as well as improved reactive power support under balanced fault conditions.Under the most severe voltage drop of 95%,the stator currents,rotor currents and DC bus voltage are 1.25 pu,1.40 pu and 1.09 UDC,respectively,conforming to the values of the LVRT codes.DVR controlled by the ADRC technique significantly increases the LVRT capabilities of a Type-3 doubly-fed induction generator-based WT under symmetrical voltage dip events.Although setting up ADRC controllers might be challenging,the proposed method has been shown to be extremely effective in reducing all kinds of internal and external disturbances.

Energy-saving Superconducting Magnetic Energy Storage(SMES)Based Interline DC Dynamic Voltage Restorer

The fast-response feature from a superconducting magnetic energy storage(SMES)device is favored for suppressing instantaneous voltage and power fluctuations,but the SMES coil is much more expensive than a conventional battery energy storage device.In order to improve the energy utilization rate and reduce the energy storage cost under multiple-line power distribution conditions,this paper investigates a new interline DC dynamic voltage restorer(IDC-DVR)scheme with one SMES coil shared among multiple compensating circuits.In this new concept,an improved current-voltage(I/V)chopper assembly,which has a series of input/output power ports,is introduced to connect the single SMES coil with multiple power lines,and thereby satisfy the independent energy exchange requirements of any line to be compensated.Specifically,if two or more power lines have simultaneous compensating demands,the SMES coil can be selectively controlled to compensate the preferable line according to the priority order of the line.The feasibility of the proposed scheme is technically verified to maintain the transient voltage stability in multiple-line voltage swell and sag cases caused by either output voltage fluctuations from external power sources or power demand fluctuations from local sensitive loads.The simulation results provide a technical basis to develop a cost-effective SMES-based IDC-DVR for use in various DC distribution networks.

Double-loop Control Structure Using Proportional Resonant and Sequence-decoupled Resonant Controllers in Static Coordinates for Dynamic Voltage Restorer

Among incidents on grids,the sag/swell voltage is considered as the most frequent incident.To solve this problem,custom power devices are used.In particular,the dynamic voltage restorer(DVR)is a modern and efficient customer device.DVRs are used to mitigate voltage sag/swells and harmonics on the load bus,thus protecting the sensitive loads.The DVR is a serial compensator that applies a voltage to the point of common coupling to maintain the voltage of sensitive load at the nominal value.To improve the performance of DVRs,in this study,the control strategy of the two-stage loop circuit is implemented.The external voltage control loop uses a sequence-decoupled resonant(SDR)controller,and the inner current-control loop uses the proportional resonant(PR)controller implemented in the stationary frameαβ.

An optimized compensation strategy of DVR for micro-grid voltage sag

Introduction:This paper uses a dynamic voltage restorer(DVR)to improve the voltage quality from voltage sags.It is difficult to satisfy various of compensation quality and time of the voltage sag by using single compensation method.Furthermore,high-power consumption of the phase jump compensation increases the size and cost of a dynamic voltage restorer(DVR).Methods&Results:In order to improve the compensating efficiency of DVR,an optimized compensation strategy is proposed for voltage sag of micro-grid caused by interconnection and sensitive loads.The proposed compensation strategy increases the supporting time for long voltage sags.Discussion:Firstly,the power flow and the maximum compensation time of DVR are analyzed using three basic compensation strategies.Then,the phase jump is corrected by pre-sag compensation.And a quadratic transition curve,which involves the injected voltage phases of pre-sag strategy and minimum energy strategy,is used to transform pre-sag compensation to minimum energy compensation of DVR.Conclusions:The transition utilizes the storage system to reduce the rate of discharge.As a result,the proposed strategy increases the supporting time for long voltage sags.The analytical study shows that the presented method significantly increases compensation time of DVR.The simulation results performed by MATLAB/SIMULINK also confirm the effectiveness of the proposed method.

Optimum Control Scheme of Output Voltage Based on Cascaded H-bridge DVR

This study presents an optimum control scheme to maximize the output voltage level number of the cascaded Hbridge dynamic voltage restorer(CHB–DVR).The relationship between the modulation index and the output voltage level number is analyzed in detail.The compensation reference voltage value is adjusted with the voltage drop depth to obtain high-quality output voltage with an acceptable total harmonic distortion.Thus,the modulation index remains within a certain range and thus meets the requirements of the maximum level number technique(MLNT).In addition,an improvement method based on the MLNT is proposed to achieve minimum active power absorption from a direct current link of the CHB–DVR.The traditional in-phase compensation and optimum control strategies are implemented to analyze the output voltage quality for verifying the feasibility of the proposed approach.Simulation and experimental results show the effectiveness of the proposed control scheme.

A semi-empirical analytic model for threshold voltage instability in MOSFETs with high-k gate stacks

A semi-empirical analytic model for the threshold voltage instability of a MOSFET is derived from Shockley-Read-Hall （SRH） statistics to account for the transient charging effects in a MOSFET high-k gate stack. Starting from the single energy level and single trap assumption, an analytical expression for the filled trap density in terms of dynamic time is derived from SRH statistics. The semi-empirical analytic model for the threshold voltage instability is developed based on MOSFET device physics between the threshold voltage and the induced trap density. The obtained model is also verified by extensive experimental data of trapping and de-trapping stress from different high-k gate configurations.

Application of Dynamic Voltage Restorer in Fault Ride-Through of Grid-Connected Photovoltaic Storage System

Problems in power quality such as temporary drops in grid voltage and flickers have been caught attention with the increasing capacity of the new energy grid-connected systems, such as photovoltaic(PV) and photovoltaic storage. To solve these problems, a dynamic voltage restorer(DVR) for fault ride-through of photovoltaic energy storage systems is presented. We select the appropriate DVR topology and compensation strategy for PV energy storage systems which are used as energy supply equipment for DVR. It proves to be energy-saving and solves the instability of photovoltaic output effectively. The intelligent algorithm that optimized the controller parameter of dynamic voltage restorer is used and the effectiveness of the controller strategy proposed has been assessed by time-domain simulations in the MATLAB/Simulink platform.

Effectiveness Analysis of DVFS and DPM in Mobile Devices

The demand for high-performance embedded processors in multimedia mobile electronics is growing and their power consumption thus increasingly threatens battery lifetime. It is usually believed that the dynamic voltage and frequency scaling （DVFS） feature saves significant energy by changing the performance levels of processors to match the performance demands of applications on the fly. However, because the energy efficiency of embedded processors is rapidly improving, the effectiveness of DVFS is expected to change. In this paper, we analyze the benefit of DVFS in state-of-the-art mobile embedded platforms in comparison to those in servers or PCs. To obtain a clearer view of the relationship between power and performance, we develop a measurement methodology that can synchronize time series for power consumption with those for processor utilization. The results show that DVFS hardly improves the energy efficiency of mobile multimedia electronics, and can even significantly worsen energy efficiency and performance in some cases. According to this observation, we suggest that power management for mobile electronics should concentrate on adaptive and intelligent power management for peripherM devices. As a preliminary design, we implement an adaptive network interface card （NIC） speed control that reduces power consumption by 1070 when NIC is not heavily used. Our results provide valuable insights into the design of power management schemes for future mobile embedded systems.

Energy Efficient Scheduler of Aperiodic Jobs for Real-time Embedded Systems

Energy consumption has become a key metric for evaluating how good an embedded system is,alongside more performance metrics like respecting operation deadlines and speed of execution.Schedulability improvement is no longer the only metric by which optimality is judged.In fact,energy efficiency is becoming a preferred choice with a fundamental objective to optimize the system's lifetime.In this work,we propose an optimal energy efficient scheduling algorithm for aperiodic real-time jobs to reduce CPU energy consumption.Specifically,we apply the concept of real-time process scheduling to a dynamic voltage and frequency scaling(DVFS)technique.We address a variant of earliest deadline first(EDF)scheduling algorithm called energy saving-dynamic voltage and frequency scaling(ES-DVFS)algorithm that is suited to unpredictable future energy production and irregular job arrivals.We prove that ES-DVFS cannot attain a total value greater than C/ˆSα,whereˆS is the minimum speed of any job and C is the available energy capacity.We also investigate the implications of having in advance,information about the largest job size and the minimum speed used for the competitive factor of ES-DVFS.We show that such advance knowledge makes possible the design of semi-on-line algorithm,ES-DVFS∗∗,that achieved a constant competitive factor of 0.5 which is proved as an optimal competitive factor.The experimental study demonstrates that substantial energy savings and highest percentage of feasible job sets can be obtained through our solution that combines EDF and DVFS optimally under the given aperiodic jobs and energy models.

A Compound Prescheduling Algorithm for Real-Time Tasks’ Battery-Aware Scheduling

To minimize battery consumption for portable devices, the prescheduling policy of battery-aware scheduling was improved by optimizing slack distribution. A battery-aware compound task scheduling （BACTS） algorithm considering various aspects including task deadline, current and execution time was proposed and evaluated with the previously prevailing earliest deadline first （EDF） algorithm. The results indicate the proposed BACTS algorithm manages to figure out a feasible schedule （if available） in battery-aware task scheduling even for disorganized connected task graphs beyond the solving ability of EDF. Its schedule achieves better performance with lower charge consumption after prescheduling, and also lower or equal optimum charge consumption after voltage scaling.