Out-of-step oscillation splitting criterion based on bus voltage frequency

Under the background of complicated interconnected network,the splitting criterion for accurately capturing the electrical center in real time is the prerequisite of power grid splitting.This paper studies the features of electric quantity in the electrical center in aspect of the instantaneous frequency,and proposes the out-of-step splitting criterion for power systems based on bus voltage frequency.Firstly,through the establishment and solution to the out-of-step model of the power grid,the analytical expression of the voltage frequency at any position is obtained in the out-of-step oscillation,and the voltage frequency features of electrical center and non-electrical center are analyzed in details.Then,this paper constructs the typical scene of migration of electrical center to study the change rules of voltage frequency.Finally,the splitting criterion based on bus voltage frequency is proposed as well as the instruction for use.This criterion is easy to be realized and can adapt to the migration of electrical center.Also it is free from the limits of power network structure and operational mode.Simulation results of CEPRI-36 system and interconnected network example of one actual region verify the accuracy and the effectiveness of the proposed criterion.

Characterization and comprehension of corona partial discharge in air under power frequency to very low frequency voltage

For the partial discharge test of electrical equipment with large capacitance,the use of lowfrequency voltage instead of power frequency voltage can effectively reduce the capacity requirements of test power supply.However,the validity of PD test under low frequency voltage needs to be evaluated.In order to investigate the influence of voltage frequency on corona discharge in the air,the discharge test of the tip-plate electrode under the frequency from 50 to0.1 Hz is carried out based on the impulse current method.The results show that some of the main features of corona under low frequency do not change.The magnitude of discharge in a positive half cycle is obviously larger than that in a negative cycle.The magnitude of discharge and interval in positive cycle are random,while that in negative cycle are regular.With the decrease of frequency,the inception voltage increases.The variation trend of maximum and average magnitude and repetition rate of the discharge in positive and negative half cycle with the variation of voltage frequency and magnitude is demonstrated,with discussion and interpretation from the aspects of space charge transportation,effective discharge time and transition of discharge modes.There is an obvious difference in the phase resolved pattern of partial discharge and characteristic parameters of discharge patterns between power and low frequency.The experimental results can be the reference for mode identification of partial discharge under low frequency tests.The trend of the measured parameters with the variation of frequency provides more information about the insulation defect than traditional measurements under a single frequency（usually 50 Hz）.Also it helps to understand the mechanism of corona discharge with an explanation of the characteristics under different frequencies.

Electrical and dielectric characterization of Au/ZnO/n-Si device depending frequency and voltage

Au/Zn O/n-type Si device is obtained using atomic layer deposition（ALD） for Zn O layer, and some main electrical parameters are investigated, such as surface/interface state（Nss）, barrier height（Φb）, series resistance（Rs）, donor concentration（Nd）, and dielectric characterization depending on frequency or voltage. These parameters are acquired by use of impedance spectroscopy measurements at frequencies ranging from 10 k Hz to 1 MHz and the direct current（DC） bias voltages in a range from-2 V to ＋2 V at room temperature are used. The main electrical parameters and dielectric parameters,such as dielectric constant（ε＂）, dielectric loss（ε＂）, loss tangent（tan δ）, the real and imaginary parts of electric modulus（M and M）, and alternating current（AC） electrical conductivity（σ） are affected by changing voltage and frequency. The characterizations show that some main electrical parameters usually decrease with increasing frequency because charge carriers at surface states have not enough time to fallow an external AC signal at high frequencies, and all dielectric parameters strongly depend on the voltage and frequency especially in the depletion and accumulation regions. Consequently, it can be concluded that interfacial polarization and interface charges can easily follow AC signal at low frequencies.

Ignition dynamics of radio frequency discharge in atmospheric pressure cascade glow discharge

A cascade glow discharge in atmospheric helium was excited by a microsecond voltage pulse and a pulse-modulated radio frequency(RF) voltage, in which the discharge ignition dynamics of the RF discharge burst was investigated experimentally. The spatio-temporal evolution of the discharge, the ignition time and optical emission intensities of plasma species of the RF discharge burst were investigated under different time intervals between the pulsed voltage and RF voltage in the experiment. The results show that by increasing the time interval between the pulsed discharge and RF discharge burst from 5 μs to 20 μs, the ignition time of the RF discharge burst is increased from 1.6 μs to 2.0 μs, and the discharge spatial profile of RF discharge in the ignition phase changes from a double-hump shape to a bell-shape. The light emission intensity at 706 nm and 777 nm at different time intervals indicates that the RF discharge burst ignition of the depends on the number of residual plasma species generated in the pulsed discharges.

Energy-efficient reconfigurable processor for QC-LDPC via adaptive coding-voltage-frequency tuning

To apply a quasi-cyclic low density parity check(QC-LDPC)to different scenarios,a data-stream driven pipelined macro instruction set and a reconfigurable processor architecture are proposed for the typical QC-LDPC algorithm.The data-level parallelism is improved by instructions to dynamically configure the multi-core computing units.Simultaneously,an intelligent adjustment strategy based on a programmable wake-up controller(WuC)is designed so that the computing mode,operating voltage,and frequency of the QC-LDPC algorithm can be adjusted.This adjustment can improve the computing efficiency of the processor.The QC-LDPC processors are verified on the Xilinx ZCU102 field programmable gate array(FPGA)board and the computing efficiency is measured.The experimental results indicate that the QC-LDPC processor can support two encoding lengths of three typical QC-LDPC algorithms and 20 adaptive operating modes of operating voltage and frequency.The maximum efficiency can reach up to 12.18 Gbit/(s·W),which is more flexible than existing state-of-the-art processors for QC-LDPC.

Electrical and dielectric properties of Al/p-Si and Al/perylene/p-Si type diodes in a wide frequency range

The perylene （C20H12） layer effect on the electrical and dielectric properties of Al/p-Si （MS） and Al/perylene/p-Si （MPS） diodes have been investigated and compared in the frequency range of 0.7 kHz-2 MHz. Experimental results show that C-V characteristics give an anomalous peak for two structures at low frequencies due to interface states （Nss） and series resistance （Rs）. The increases in C and G/o3 at low frequencies confirm that the charges at interface can easily follow an ac signal and yield excess capacitance and conductance. The frequency-dependent dielectric constant （er） and dielectric loss （e＇） are subtracted using C and G/co data at 1.5 V. The eI and e＂ values are found to be strongly dependent on frequency and voltage, and their large values at low frequencies can be attributed to the excess polarization coming from charges at traps. Plots of ln（o＇ac）-ln（w） for two structures have two linear regions, with slopes of 0.369 and 1.166 for MS, and of 0.077 and 1.061 for MPS, respectively. From the C 2-V characteristics, the doping acceptor atom concentration （NA） and barrier height （,~） for Schottky barrier diodes （SBDs） 1.303 ~ 1015 cm-3, and 1.10 and I. 13 eV, respectively. of MS and MPS types are also obtained to be 1.484 ~ 1015

A Hybrid Model for Reliability Aware and Energy-Efficiency in Multicore Systems

Recently,Multicore systems use Dynamic Voltage/Frequency Scaling(DV/FS)technology to allow the cores to operate with various voltage and/or frequencies than other cores to save power and enhance the performance.In this paper,an effective and reliable hybridmodel to reduce the energy and makespan in multicore systems is proposed.The proposed hybrid model enhances and integrates the greedy approach with dynamic programming to achieve optimal Voltage/Frequency(Vmin/F)levels.Then,the allocation process is applied based on the availableworkloads.The hybrid model consists of three stages.The first stage gets the optimum safe voltage while the second stage sets the level of energy efficiency,and finally,the third is the allocation stage.Experimental results on various benchmarks show that the proposed model can generate optimal solutions to save energy while minimizing the makespan penalty.Comparisons with other competitive algorithms show that the proposed model provides on average 48%improvements in energy-saving and achieves an 18%reduction in computation time while ensuring a high degree of system reliability.

Investigation on latch-up susceptibility induced by high-power microwave in complementary metal–oxide–semiconductor inverter

The latch-up effect induced by high-power microwave（HPM） in complementary metal–oxide–semiconductor（CMOS） inverter is investigated in simulation and theory in this paper. The physical mechanisms of excess carrier injection and HPM-induced latch-up are proposed. Analysis on upset characteristic under pulsed wave reveals increasing susceptibility under shorter-width pulsed wave which satisfies experimental data, and the dependence of upset threshold on pulse repetitive frequency（PRF） is believed to be due to the accumulation of excess carriers. Moreover, the trend that HPMinduced latch-up is more likely to happen in shallow-well device is proposed.Finally, the process of self-recovery which is ever-reported in experiment with its correlation with supply voltage and power level is elaborated, and the conclusions are consistent with reported experimental results.

Optimization of synchronized frequency and voltage control for a distributed generation system using the Black Widow Optimization algorithm

A distributed generation network could be a hybrid power system that includes wind-diesel power generation based on induction generators(IGs)and synchronous generators(SGs).The main advantage of these systems is the possibility of using renewable energy in their structures.The most important challenge is to design the voltage-control loop with the frequency-control loop to obtain optimal responses for voltage and frequency deviations.In this work,the voltage-control loop is designed by an automatic voltage regulator.A linear model of the hybrid system has also been developed with coordinated voltage and frequency control.Dynamic frequency response and voltage deviations are compared for different load disturbances and different reactive loads.The gains of the SG and the static volt-ampere reactive compensator(SVC)controllers in the IG terminal are calculated using the Black Widow Optimization(BWO)algorithm to insure low frequency and voltage deviations.The BWO optimization algorithm is one of the newest and most powerful optimization methods to have been introduced so far.The results showed that the BWO algorithm has a good speed in solving the proposed objective function.A 22%improvement in time adjustment was observed in the use of an optimal SVC.Also,an 18%improvement was observed in the transitory values.

Performance study of combined test rig for metro train traction

This paper deals with a combined test rig for a traction system in the laboratory environment.An experimental system was designed and implemented to verify the performance of the traction system for a metro train.For a highly accurate control of the system,a hybrid control algorithm combining vector control and slip frequency control was applied to control the traction inverter.The design method of the flywheels,which represent the equivalent model of the train moment inertia,was elaborated.A train runtime diagnosis system was completed by adopting the multifunction vehicle bus（MVB） protocol.The dynamic performance of the metro power traction system was emulated under the control of the train runtime diagnosis system.Using the combined test rig,the performances of the traction system in traction,braking,temperature rise,etc.,were verified through traction and breaking experiments.

0.15-μm T-gate In_(0.52)Al_(0.48)As/In_(0.53)Ga_(0.47)As InP-based HEMT with fmax of 390 GHz

In this paper, 0.15-μm gate-length In0.52Al0.48As/In0.53Ga0.47As InP-based high electron mobility transistors （HEMTs） each with a gate-width of 2×50 μm are designed and fabricated. Their excellent DC and RF characterizations are demonstrated. Their full channel currents and extrinsic maximum transconductance （gm,max） values are measured to be 681 mA/mm and 952 mS/mm, respectively. The off-state gate-to-drain breakdown voltage （BVGD） defined at a gate current of-1 mA/mm is 2.85 V. Additionally, a current-gain cut-off frequency （fT） of 164 GHz and a maximum oscillation frequency （fmax） of 390 GHz are successfully obtained; moreover, the fmax of our device is one of the highest values in the reported 0.15-μm gate-length lattice-matched InP-based HEMTs operating in a millimeter wave frequency range. The high gm,max, BVGD, fmax, and channel current collectively make this device a good candidate for high frequency power applications.

Near-Threshold Wide-Voltage Design Review

This paper presents a comprehensive review of near-threshold wide-voltage designs on memory,resilient logic designs,low voltage Radio Frequency(RF)circuits,and timing analysis.With the prosperous development of wearable applications,low power consumption has become one of the primary challenges for IC designs.To improve the power efficiency,the prefer scheme is to operate at an ultra low voltage of Near Threshold Voltage(NTV).For the performance variation and degradation,a self-adaptive margin assignment technique is proposed in the low voltage.The proposed technique tracks the circuit states in real time and dynamically allocates voltage margins,reducing the minimum supply voltage and achieving higher energy efficiency.The self-adaptive margin assignment technique can be used in Static Random Access Memory(SRAM),digital circuits,and analog/RF circuits.Based on the self-adaptive margin assignment technique,the minimum voltage in the 40 nm CMOS process is reduced to 0.6 V or even lower,and the energy efficiency is increased by 3–4 times.

A Designated Harmonic Suppression Technology for Sampled SPWM

Sampled SPWM is an excellent VVVF method of motor speed control, meanwhile the harmonic components of the output wave impairs its applications in practice. A designated harmonic suppression technology is presented for sampled SPWM, which is an improved algorithm for the harmonic suppression in high voltage and high frequency spectrum. As the technology is applied in whole speed adjusting range, the voltage can be conveniently controlled and high frequency harmonic of SP WM is also improved.

Probabilistic Delay Fault Model for DVFS Circuits

Decreasing the power supply voltage in dynamic voltage frequency scaling to save power con- sumption may introduce extra delays in CMOS circuits, which may cause errors. This paper presents the probabilistic delay fault model （PDFM）, which describes the probability of an error occurring as a function of the power supply voltage and the clock period in synchronous CMOS circuits. In a wide range of applica- tions （graphic, video, digital filtering, etc.）, errors occurring with low probability and not remaining for a long time are acceptable. For combinational circuits which have long critical paths with low probability of excita- tion, a performance increase is achieved with a certain rate of errors determined by the PDFM compared with the traditional design which considers the worst case. The PDFM applied to array multipliers and ripple carry adders shows the agreement of the predicted probabilities with simulated delay histograms to support the practicality of using the PDFM to select power supply voltage and clock period in dynamic voltage fre- quency scaling circuits with tolerable error rates.

Stability analysis and decentralized control of inverter-based ac microgrid

This work considers the problem of decentralized control of inverter-based ac micro-grid in different operation modes.The main objectives are to(i)design decentralized frequency and voltage controllers,to gather with power sharing,without information exchange between microsources(ii)design passive dynamic controllers which ensure stability of the entire microgrid system(iii)capture nonlinear,interconnected and large-scale dynamic of the micro-grid system with meshed topology as a port-Hamiltonian formulation(iv)expand the property of shifted-energy function in the context of decentralized control of ac micro-grid(v)analysis of system stability in large signal point of view.More precisely,to deal with nonlinear,interconnected and large-scale structure of micro-grid systems,the port-Hamiltonian formulation is used to capture the dynamic of micro-grid components including microsource,distribution line and load dynamics as well as interconnection controllers.Furthermore,to deal with large signal stability problem of the microgrid system in the grid-connected and islanded conditions,the shifted-Hamiltonian energy function is served as a storage function to ensure incremental passivity and stability of the microgrid system.Moreover,it is shown that the aggregating of the microgrid dynamic and the decentralized controller dynamics satisfies the incremental passivity.Finally,the effectiveness of the proposed controllers is evaluated through simulation studies.The different scenarios including grid-connected and islanded modes as well as transition between both modes are simulated.The simulation conforms that the decentralized control dynamics are suited to achieve the desired objective of frequency synchronization,voltage control and power sharing in the grid-connected and islanded modes.The simulation results demonstrate the effectiveness of the proposed control strategy.

Ant Lion Algorithm for Optimized Controller Gains for Power Quality Enrichment of Off-grid Wind Power Harnessing Units

The proposed system uses an algorithm that works on the admittance of the system,for estimating the reference values of generated currents for an off-grid wind power harnessing unit(WPHU).The controller controls the voltage and maintains the frequency within the limits while working with both linear and nonlinear loads for varying wind speeds.The admittance algorithm is simple and easy to implement and works very efficiently to generate the triggering signals for the controller of the WPHU.The wind power harnessing unit comprising of a squirrel cage induction generator,a star-delta transformer,a battery storage system and the control unit are modeled using Matlab/Simulink R2019.An isolated transformer with a star-delta configuration connects the load and the generator circuit with the controller to reduce the dc bus voltage and mitigate current in the neutral line.The response of the system during the dynamic loading depends on the best possible compensator proportional-integral(PI)gains.The antlion optimization algorithm is compared with particle swarm optimization and grey wolf optimization and is found to have the advantages of good convergence,high efficiency and fast calculating speed.It is therefore used to extract the optimal values of frequency and voltage PI gains.The simulation results of the control algorithm for the WPHU are validated in a real-time environment in a dSpace1104 laboratory set up.This algorithm is proven to have a quick response,maintain the required frequency,suppress the current harmonics,regulate voltage,help in balancing the load and compensating for the neutral current.

Energy Efficient Block-Partitioned Multicore Processors for Parallel Applications

Due to the increasing power consumption in modern computing systems, energy management has become an important research area in the last decade. Recently, multicore has emerged to be an energy efficient architecture that exploits parallelisms in modern applications. However, as the number of cores on a single chip continues to increase, it has been a grand challenge on how to effectively manage the energy efficiency of multicore-based systems. In this paper, based on the voltage island and dynamic voltage and frequency scaling （DVFS） techniques, we investigate the energy efficiency of block-partitioned multieore processors, where cores are grouped into blocks with the cores on one block sharing a DVFS- enabled power supply. Depending on the number of cores on each block, we study both symmetric and asymmetric block configurations. We develop a system-level power model （which can support various power management techniques） and derive both block- and system-wide energy-efficient frequencies for systems with block-partitioned multieore processors. Based on the power model, we prove that, for embarrassingly parallel applications, having all cores on a single block can achieve the same energy savings as that of the individual block configuration （where each core forms a single block and has its own power supply）. However, for applications with limited degrees of parallelism, we show the superiority of the buddy-asymmetric block configuration, where the number of required blocks （and power supplies） is logarithmically related to the number of cores on the chip, in that it can achieve the same amount of energy savings as that of the individual block configuration. The energy efficiency of different block configurations is further evaluated through extensive simulations with both synthetic as well as a real life application.