Accurately identifying defect patterns in wafer maps can help engineers find abnormal failure factors in production lines.During the wafer testing stage,deep learning methods are widely used in wafer defect detection ...Accurately identifying defect patterns in wafer maps can help engineers find abnormal failure factors in production lines.During the wafer testing stage,deep learning methods are widely used in wafer defect detection due to their powerful feature extraction capa-bilities.However,most of the current wafer defect patterns classification models have high complexity and slow detection speed,which are difficult to apply in the actual wafer production process.In addition,there is a data imbalance in the wafer dataset that seriously affects the training results of the model.To reduce the complexity of the deep model without affecting the wafer feature expression,this paper adjusts the structure of the dense block in the PeleeNet network and proposes a lightweight network WM‐PeleeNet based on the PeleeNet module.In addition,to reduce the impact of data imbalance on model training,this paper proposes a wafer data augmentation method based on a convolutional autoencoder by adding random Gaussian noise to the hidden layer.The method proposed in this paper has an average accuracy of 95.4%on the WM‐811K wafer dataset with only 173.643 KB of the parameters and 316.194 M of FLOPs,and takes only 22.99 s to detect 1000 wafer pictures.Compared with the original PeleeNet network without optimization,the number of parameters and FLOPs are reduced by 92.68%and 58.85%,respectively.Data augmentation on the minority class wafer map improves the average classification accuracy by 1.8%on the WM‐811K dataset.At the same time,the recognition accuracy of minority classes such as Scratch pattern and Donut pattern are significantly improved.展开更多
The integrated circuit chip with high performance has a high sensitivity to the defects in manufacturing environments.When there are defects on a wafer,the defects may lead to the degradation of chip performance.It is...The integrated circuit chip with high performance has a high sensitivity to the defects in manufacturing environments.When there are defects on a wafer,the defects may lead to the degradation of chip performance.It is necessary to design effective detection approaches for the defects in order to ensure the reliability of wafer.In this paper,a new method based on image boundary extraction is presented for the detection of defects on a wafer.The method uses island model genetic algorithms to perform the segmentation of wafer images,and gets the optimal threshold values.The island model genetic algorithm uses two distinct subpopulations,it is a coarse grain parallel model.The individuals migration can occur between the two subpopulations to share genetic materials.A lot of experimental results show that the defect detection method proposed in this paper can obtain the features of defects effectively.展开更多
For the typical color detects of polysilicon wafers, i.e., edge discoloration, color inaccuracy and color non-uniformity, a new integrated machine vision detection method is proposed based on an HSV color model. By tr...For the typical color detects of polysilicon wafers, i.e., edge discoloration, color inaccuracy and color non-uniformity, a new integrated machine vision detection method is proposed based on an HSV color model. By transforming RGB image into three-channel HSV images, the HSV model can efficiently reduce the disturbances of complex wafer textures. A fuzzy color clustering method is used to detect edge discoloration by defining membership function for each channel image. The mean-value classi- fying method and region growing method are used to identify the other two defects, respectively. A vision detection system is developed and applied in the produc- tion of polysilicon wafers.展开更多
针对准确与实时检测晶圆表面缺陷的需求,提出了一种基于主成分分析(Principal Component Analysis,PCA)和贝叶斯概率模型(Bayesian Probability Model,BPM)的在线检测算法;首先,改进双边滤波方法以消除晶圆表面图像中的噪声和突出晶圆...针对准确与实时检测晶圆表面缺陷的需求,提出了一种基于主成分分析(Principal Component Analysis,PCA)和贝叶斯概率模型(Bayesian Probability Model,BPM)的在线检测算法;首先,改进双边滤波方法以消除晶圆表面图像中的噪声和突出晶圆缺陷的模式特征;然后,提取晶圆表面缺陷的Hu不变矩、方向梯度直方图(Histogram of Oriented Gradients,HOG)和尺度不变特征变换特征(Scale Invariant Feature Transform,SIFT);接着,采用PCA方法对特征进行降维;最后,在离线建模阶段构建正常晶圆表面模式和各种缺陷模式的BPMs;在在线检测阶段采用胜者全取(Winner-take-all,WTA)法判断缺陷的模式和构建新缺陷模式的BPMs;提出算法在WM-811K晶圆数据库中得到了87.2%的检测准确率;单副图像的平均检测时间为40.5ms;实验结果表明,提出算法具有较高的检测准确性与实时性,可以实际应用到集成电路制造产线的晶圆表面缺陷在线检测中。展开更多
基金supported by a project jointly funded by the Beijing Municipal Education Commission and Municipal Natural Science Foundation under grant KZ202010005004.
文摘Accurately identifying defect patterns in wafer maps can help engineers find abnormal failure factors in production lines.During the wafer testing stage,deep learning methods are widely used in wafer defect detection due to their powerful feature extraction capa-bilities.However,most of the current wafer defect patterns classification models have high complexity and slow detection speed,which are difficult to apply in the actual wafer production process.In addition,there is a data imbalance in the wafer dataset that seriously affects the training results of the model.To reduce the complexity of the deep model without affecting the wafer feature expression,this paper adjusts the structure of the dense block in the PeleeNet network and proposes a lightweight network WM‐PeleeNet based on the PeleeNet module.In addition,to reduce the impact of data imbalance on model training,this paper proposes a wafer data augmentation method based on a convolutional autoencoder by adding random Gaussian noise to the hidden layer.The method proposed in this paper has an average accuracy of 95.4%on the WM‐811K wafer dataset with only 173.643 KB of the parameters and 316.194 M of FLOPs,and takes only 22.99 s to detect 1000 wafer pictures.Compared with the original PeleeNet network without optimization,the number of parameters and FLOPs are reduced by 92.68%and 58.85%,respectively.Data augmentation on the minority class wafer map improves the average classification accuracy by 1.8%on the WM‐811K dataset.At the same time,the recognition accuracy of minority classes such as Scratch pattern and Donut pattern are significantly improved.
基金supported by Guangdong Provincial Natural Science Foundation of China (7005833)
文摘The integrated circuit chip with high performance has a high sensitivity to the defects in manufacturing environments.When there are defects on a wafer,the defects may lead to the degradation of chip performance.It is necessary to design effective detection approaches for the defects in order to ensure the reliability of wafer.In this paper,a new method based on image boundary extraction is presented for the detection of defects on a wafer.The method uses island model genetic algorithms to perform the segmentation of wafer images,and gets the optimal threshold values.The island model genetic algorithm uses two distinct subpopulations,it is a coarse grain parallel model.The individuals migration can occur between the two subpopulations to share genetic materials.A lot of experimental results show that the defect detection method proposed in this paper can obtain the features of defects effectively.
基金supported by the National Natural Science Foundation of China(Grant Nos.51205242,and 51075261)the Shanghai Science and Technology Innovation Action Plan,China(Grant No.13111102900)
文摘For the typical color detects of polysilicon wafers, i.e., edge discoloration, color inaccuracy and color non-uniformity, a new integrated machine vision detection method is proposed based on an HSV color model. By transforming RGB image into three-channel HSV images, the HSV model can efficiently reduce the disturbances of complex wafer textures. A fuzzy color clustering method is used to detect edge discoloration by defining membership function for each channel image. The mean-value classi- fying method and region growing method are used to identify the other two defects, respectively. A vision detection system is developed and applied in the produc- tion of polysilicon wafers.
