At present,the architecture of a digital-to-analog converter(DAC) in essence is based on the weight current,and the average value of its D/A signal current increases in geometric series according to its digital signal...At present,the architecture of a digital-to-analog converter(DAC) in essence is based on the weight current,and the average value of its D/A signal current increases in geometric series according to its digital signal bits increase,which is 2^(n-1) times of its least weight current.But for a dual weight resistance chain type DAC,by using the weight voltage manner to D/A conversion,the D/A signal current is fixed to chain current I_(cha);it is only 1/2^(n-1) order of magnitude of the average signal current value of the weight current type DAC.Its principle is:n pairs dual weight resistances form a resistance chain,which ensures the constancy of the chain current;if digital signals control the total weight resistance from the output point to the zero potential point,that could directly control the total weight voltage of the output point,so that the digital signals directly turn into a sum of the weight voltage signals;thus the following goals are realized:(1) the total current is less than 200μA;(2) the total power consumption is less than 2 m W;(3) an 18-bit conversion can be realized by adopting a multi-grade structure;(4) the chip area is one order of magnitude smaller than the subsection current-steering type DAC;(5) the error depends only on the error of the unit resistance,so it is smaller than the error of the subsection current-steering type DAC; (6) the conversion time is only one action time of switch on or off,so its speed is not lower than the present DAC.展开更多
Resistive random-access memory(RRAM)is a promising technology to develop nonvolatile memory and artificial synaptic devices for brain-inspired neuromorphic computing.Here,we have developed a STO:Ag/SiO_(2) bilayer bas...Resistive random-access memory(RRAM)is a promising technology to develop nonvolatile memory and artificial synaptic devices for brain-inspired neuromorphic computing.Here,we have developed a STO:Ag/SiO_(2) bilayer based memristor that has exhibited a filamentary resistive switching with stable endurance and long-term data retention ability.The memristor also exhibits a tunable resistance modulation under positive and negative pulse trains,which could fully mimic the potentiation and depression behavior like a bio-synapse.Several synaptic plasticity functions,including long-term potentiation(LTP)and long-term depression(LTD),paired-pulsed facilitation(PPF),spike-rate-dependent-plasticity(SRDP),and post-tetanic potentiation(PTP),are faithfully implemented with the fabricated memristor.Moreover,to demonstrate the feasibility of our memristor synapse for neuromorphic applications,spike-timedependent plasticity(STDP)is also investigated.Based on conductive atomic force microscopy observations and electrical transport model analyses,it can be concluded that it is the controlled formation and rupture of Ag filaments that are responsible for the resistive switching while exhibiting a switching ratio of~10;along with a good endurance and stability suitable for nonvolatile memory applications.Before fully electroforming,the gradual conductance modulation of Ag/STO:Ag/SiO_(2)/p^(++)-Si memristor can be realized,and the working mechanism could be explained by the succeeding growth and contraction of Ag filaments promoted by a redox reaction.This newly fabricated memristor may enable the development of nonvolatile memory and realize controllable resistance/weight modulation when applied as an artificial synapse for neuromorphic computing.展开更多
文摘At present,the architecture of a digital-to-analog converter(DAC) in essence is based on the weight current,and the average value of its D/A signal current increases in geometric series according to its digital signal bits increase,which is 2^(n-1) times of its least weight current.But for a dual weight resistance chain type DAC,by using the weight voltage manner to D/A conversion,the D/A signal current is fixed to chain current I_(cha);it is only 1/2^(n-1) order of magnitude of the average signal current value of the weight current type DAC.Its principle is:n pairs dual weight resistances form a resistance chain,which ensures the constancy of the chain current;if digital signals control the total weight resistance from the output point to the zero potential point,that could directly control the total weight voltage of the output point,so that the digital signals directly turn into a sum of the weight voltage signals;thus the following goals are realized:(1) the total current is less than 200μA;(2) the total power consumption is less than 2 m W;(3) an 18-bit conversion can be realized by adopting a multi-grade structure;(4) the chip area is one order of magnitude smaller than the subsection current-steering type DAC;(5) the error depends only on the error of the unit resistance,so it is smaller than the error of the subsection current-steering type DAC; (6) the conversion time is only one action time of switch on or off,so its speed is not lower than the present DAC.
基金financially supported by the National Science Funds for Excellent Young Scholars of China(no.61822106)the Natural Science Foundation of China(no.U19A2070)。
文摘Resistive random-access memory(RRAM)is a promising technology to develop nonvolatile memory and artificial synaptic devices for brain-inspired neuromorphic computing.Here,we have developed a STO:Ag/SiO_(2) bilayer based memristor that has exhibited a filamentary resistive switching with stable endurance and long-term data retention ability.The memristor also exhibits a tunable resistance modulation under positive and negative pulse trains,which could fully mimic the potentiation and depression behavior like a bio-synapse.Several synaptic plasticity functions,including long-term potentiation(LTP)and long-term depression(LTD),paired-pulsed facilitation(PPF),spike-rate-dependent-plasticity(SRDP),and post-tetanic potentiation(PTP),are faithfully implemented with the fabricated memristor.Moreover,to demonstrate the feasibility of our memristor synapse for neuromorphic applications,spike-timedependent plasticity(STDP)is also investigated.Based on conductive atomic force microscopy observations and electrical transport model analyses,it can be concluded that it is the controlled formation and rupture of Ag filaments that are responsible for the resistive switching while exhibiting a switching ratio of~10;along with a good endurance and stability suitable for nonvolatile memory applications.Before fully electroforming,the gradual conductance modulation of Ag/STO:Ag/SiO_(2)/p^(++)-Si memristor can be realized,and the working mechanism could be explained by the succeeding growth and contraction of Ag filaments promoted by a redox reaction.This newly fabricated memristor may enable the development of nonvolatile memory and realize controllable resistance/weight modulation when applied as an artificial synapse for neuromorphic computing.