Dependence of R-G Currenton Bulk Traps Characteristics and Silicon Film Structure in SOI Gated-Diode

The dependence of the Recombination- Generation( R- G) current on the bulk trap characteristics and sili- con film structure in SOI lateral p+ p- n+ diode has been analyzed num erically by using the simulation tool,DESSIS- ISE.By varying the bulk trap characteristics such as the trap density and energy level spectrum systematically,the dependence of the R- G current on both of them has been dem onstrated in details.Moreover,the silicon film doping concentration and thickness are changed to make silicon body varies from the fully- depletion m ode into the partial- ly- depletion one.The influence of the transfer of silicon body characteristics on the R- G currenthas also been care- fully examined.A better understanding is obtained of the behavior of bulk trap R- G current in the SOI lateral gat- ed- diode.

Novel layout design of 4H-SiC merged PiN Schottky diodes leading to improved surge robustness

A method to improve the surge current capability of silicon carbide(SiC)merged PiN Schottky(MPS)diodes is presented and investigated via three-dimensional electro-thermal simulations.When compared with a conventional MPS diode,the proposed structure has a more uniform current distribution during bipolar conduction due to the help of the continuous P+surface,which can avoid the formation of local hotspots during the surge process.The Silvaco simulation results show that the proposed structure has a 20.29%higher surge capability and a 15.06%higher surge energy compared with a conventional MPS diode.The bipolar on-state voltage of the proposed structure is 4.69 V,which is 56.29%lower than that of a conventional MPS diode,enabling the device to enter the bipolar mode earlier during the surge process.Furthermore,the proposed structure can suppress the occurrence of‘snapback'phenomena when switching from the unipolar to the bipolar operation mode.In addition,an analysis of the surge process of MPS diodes is carried out in detail.

Optoelectronic properties analysis of silicon light-emitting diode monolithically integrated in standard CMOS IC

Si p^+n junction diodes operating in the mode of avalanche breakdown are capable of emitting light in the visible range of 400-900 nm. In this study, to realize the switching speed in the GHz range, we present a transient model to shorten the carrier lifetime in the high electric field region by accumulating carriers in both p and n type regions. We also verify the optoelectronic characteristics by disclosing the related physical mechanisms behind the light emission phenomena. The emission of visible light by a monolithically integrated Si diode under the reverse bias is also discussed. The light is emitted as spatial sources by the defects located at the p-n junction of the reverse-biased diode. The influence of the defects on the electrical behavior is manifested as a current-dependent electroluminescence.

HETEROJUNCTION DIODES OF POROUS SILICON WITH SOLUBLE POLYANILINE

Two kinds of heterojunction diodes of porous silicon (PS) with soluble polyaniline (PANI) were fabricated. One is a heterojunction diode of PS with water-soluble copolymer of polyaniline (PAOABSA), Al/PS-PAOABSA/Au cell as rectifying diode. Another is a heterojunction diode of PS with soluble polyaniline doped with DBSA, Al/PS-PANI (DBSA)/Au cell as light emitting diode (LED). The rectifying characteristics of the rectifying diodes were measured as a function of the degree of sulfonation and thickness of the copolymers, as well as oxidation of PS. The rectifying ratio of the heterojunction can reach 5.0x10(4) at +/-3 V bias. For the LED, the photoluminescence (PL) and electroluminescence (EL) spectra were measured and discussed.

Breakdown characteristics of AlGaN/GaN Schottky barrier diodes fabricated on a silicon substrate

In this work, the breakdown characteristics of AlGaN/GaN planar Schottky barrier diodes （SBDs） fabricated on the silicon substrate are investigated. The breakdown voltage （BV） of the SBDs first increases as a function of the anodeto-cathode distance and then tends to saturate at larger inter-electrode spacing. The saturation behavior of the BV is likely caused by the vertical breakdown through the intrinsic GaN buffer layer on silicon, which is supported by the post-breakdown primary leakage path analysis with the emission microscopy. Surface passivation and field plate termination are found effective to suppress the leakage current and enhance the BV of the SBDs. A high BV of 601 V is obtained with a low on-resistance of 3.15 mΩ·cm^2.

Structure-dependent behaviors of diode-triggered silicon controlled rectifier under electrostatic discharge stress

The comprehensive understanding of the structure-dependent electrostatic discharge behaviors in a conventional diode-triggered silicon controlled rectifier （DTSCR） is presented in this paper. Combined with the device simulation, a mathematical model is built to get a more in-depth insight into this phenomenon. The theoretical studies are verified by the transmission-line-pulsing （TLP） test results of the modified DTSCR structure, which is realized in a 65-nm complementary metal-oxide-semiconductor （CMOS） process. The detailed analysis of the physical mechanism is used to provide predictions as the DTSCR-based protection scheme is required. In addition, a method is also presented to achieve the tradeoff between the leakage and trigger voltage in DTSCR.

4H-SiC Schottky barrier diodes with semi-insulating polycrystalline silicon field plate termination

Based on the theoretical analysis of the 4H-SiC Schottky-barrier diodes （SBDs） with field plate termination, 4H-SiC SBD with semi-insulating polycrystalline silicon （SIPOS） FP termination has been fabricated. The relative dielectric con-stant of the SIPOS dielectric first used in 4H-SiC devices is 10.4, which is much higher than that of the SiO2 dielectric, leading to benefitting the performance of devices. The breakdown voltage of the fabricated SBD could reach 1200 V at leak-age current 20 μA, about 70% of the theoretical breakdown voltage. Meanwhile, both of the simulation and experimental results show that the length of the SIPOS FP termination is an important factor for structure design.

Analytical model for capacitance-voltage characteristics of ion-implanted 4H silicon carbide Schottky barrier diodes

In order to undertake theory analysis in the application area of switching,frequency and power devices,an analytical model for capacitance-voltage (C-V) characteristics of ion-implanted 4H silicon carbide (SiC) Schottky barrier diodes (SBDs) was investigated.This model was established by considering the effects of incomplete ionization of nitrogen in 4H-SiC,the Poole-Frenkel on the ionization energy,and the ion-implanted nitrogen donor profiles.The simulation process is discussed in detail for two multiple nitrogen ion-implanted 4H-SiC SBDs (three and four fold ion-implantations) designed and fabricated in the experiments using this model at different activation rates.An agreement between the modeled C-V curves and the measured results for two ion-implanted 4H-SiC SBDs fabricated is shown.This capacitance model has the potential to be used to simulate and design ion-implanted SiC devices concerned in the future.

Total dose test with γ-ray for silicon single photon avalanche diodes

Gamma-ray(γ-ray)radiation for silicon single photon avalanche diodes(Si SPADs)is evaluated,with total dose of 100 krad(Si)and dose rate of 50 rad(Si)/s by using 60Co as theγ-ray radiation source.The breakdown voltage,photocurrent,and gain have no obvious change after the radiation.However,both the leakage current and dark count rate increase by about one order of magnitude above the values before the radiation.Temperature-dependent current-voltage measurement results indicate that the traps caused by radiation function as generation and recombination centers.Both leakage current and dark count rate can be almost recovered after annealing at 200℃for about 2 hours,which verifies the radiation damage mechanics.

High-Voltage Ti /6H-SiC Schottky Barrier Diodes

The fabrication and electrical characterization of Scho tt ky barrier diodes (SBD) on 6H-SiC,via thermal evaporation of Ni are reported.Th e Schottky barrier diodes are fabricated during the 6H-SiC epilayers grow n by using chemical vapor deposition on commercially available single-crystal 6 H-SiC wafers.The I-V characteristics of these diodes exhibit a sharp break down,with the breakdown voltage of 450V at room temperature.The diodes are demon strated to be of a low reverse leakage current of 5×10 -4 A·cm -2 at the bias voltage of -200V.The ideal factor and barrier height are 1 09 and 1 24-1 26eV,respectively.

EQR SiPM with P-on-N diode configuration

The silicon photomultiplier(SiPM) with epitaxial quenching resistor(EQR) is an emerging and developing technology that has recently attracted the interest from the research community. It has characteristics of a continuous low-resistance cap layer and integrated quenching resisters in epitaxial silicon layer, which makes it possible to increase microcell density or reduce microcell size, thus obtaining large dynamic range and high photon detection efficiency(PDE) simultaneously. Results published show that the EQR SiPM with N-on-P diode configuration had relatively low PDE at peak wavelength of 480 nm as 16%. This paper reported the EQR SiPM with P-on-N diode configuration having active area of 3 × 3 mm^2 and cell density of 10,000/mm^2(total 90,000 pixels). It was characterized with gain of 2E5, dark count rate of 7 MHz, crosstalk of 7%, dynamic range of 85,000 pixels, overall recovery time of 32 ns at room temperature and over-voltage of 3.5 V. The improved PDE at peak wavelength of 420 nm was 30%.

Dark count rate and band to band tunneling optimization for single photon avalanche diode topologies

This paper proposes two optimal designs of single photon avalanche diodes(SPADs) minimizing dark count rate(DCR). The first structure is introduced as p^+/pwell/nwell, in which a specific shallow pwell layer is added between p^+and nwell layers to decrease the electric field below a certain threshold. The simulation results show on average 19.7%and 8.5% reduction of p^+/nwell structure’s DCR comparing with similar previous structures in different operational excess bias and temperatures respectively. Moreover, a new structure is introduced as n+/nwell/pwell, in which a specific shallow nwell layer is added between n+and pwell layers to lower the electric field below a certain threshold. The simulation results show on average 29.2% and 5.5% decrement of p^+/nwell structure’s DCR comparing with similar previous structures in different operational excess bias and temperatures respectively. It is shown that in higher excess biases(about 6 volts), the n+/nwell/pwell structure is proper to be integrated as digital silicon photomultiplier(dSiPM) due to low DCR. On the other hand, the p^+/pwell/nwell structure is appropriate to be utilized in dSiPM in high temperatures(above 50?C) due to lower DCR value.

Investigations on mesa width design for 4H–SiC trench super junction Schottky diodes

Mesa width （WM） is a key design parameter for SiC super junction （SJ） Schottky diodes （SBD） fabricated by the trench-etching-and-sidewall-implant method. This paper carries out a comprehensive investigation on how the mesa width design determines the device electrical performances and how it affects the degree of performance degradation induced by process variations. It is found that structures designed with narrower mesa widths can tolerant substantially larger charge imbalance for a given BV target, but have poor specific on-resistances. On the contrary, structures with wider mesa widths have superior on-state performances but their breakdown voltages are more sensitive to p-type doping variation. Medium WM structures （-2 p.m） exhibit stronger robustness against the process variation resulting from SiC deep trench etching. Devices with 2-p.m mesa width were fabricated and electrically characterized. The fabricated SiC SJ SBDs have achieved a breakdown voltage of 1350 V with a specific on-resistance as low as 0.98 mΩ2.cm2. The estimated specific drift on- resistance by subtracting substrate resistance is well below the theoretical one-dimensional unipolar limit of SiC material. The robustness of the voltage blocking capability against trench dimension variations has also been experimentally verified for the proposed SiC SJ SBD devices.

Modeling of 4H-SiC multi-floating-junction Schottky barrier diode

This paper develops a new and easy to implement analytical model for the specific on-resistance and electric field distribution along the critical path for 4H-SiC multi-floating junction Schottky barrier diode. Considering the charge compensation effects by the multilayer of buried opposite doped regions, it improves the breakdown voltage a lot in comparison with conventional one with the same on-resistance. The forward resistance of the floating junction Schottky barrier diode consists of several components and the electric field can be understood with superposition concept, both are consistent with MEDICI simulation results. Moreover, device parameters are optimized and the analyses show that in comparison with one layer floating junction, multilayer of floating junction layer is an effective way to increase the device performance when specific resistance and the breakdown voltage are traded off. The results show that the specific resistance increases 3.2 mΩ.cm2 and breakdown voltage increases 422 V with an additional floating junction for the given structure.

Research on high-voltage 4H-SiC P-i-N diode with planar edge junction termination techniques

The planar edge termination techniques of junction termination extension （JTE） and offset field plates and fieldlimiting rings for the 4H-SiC P i-N diode were investigated and optimized by using a two-dimensional device simulator ISE-TCAD10.0. By experimental verification, a good consistency between simulation and experiment can be observed. The results show that the reverse breakdown voltage for the 4H-SiC P-i-N diode with optimized JTE edge termination can accomplish near ideal breakdown voltage and much lower leakage current. The breakdown voltage can be near 1650 V, which achieves more than 90 percent of ideal parallel plane junction breakdown voltage and the leakage current density can be near 3 ×10^-5 A/cm2.

High energy electron radiation effect on Ni and Ti/4H-SiC Schottky barrier diodes at room temperature

This paper reports that Ni and Ti/4H-SiC Schottky barrier diodes （SBDs） were fabricated and irradiated with 1 MeV electrons up to a dose of 3.43 × 10^14 e/cm2. After radiation, the Schottky barrier height φB of the Ni/4H-SiC SBD increased from 1.20 eV to 1.21 eV, but decreased from 0.95 eV to 0.94 eV for the Ti/4H-SiC SBD. The degradation of φB could be explained by interface states of changed Schottky contacts. The on-state resistance Rs of both diodes increased with the dose, which can be ascribed to the radiation defects. The reverse current of the Ni/4H-SiC SBD slightly increased, but for the Ti/4H-SiC SBD it basically remained the same. At room temperature, φB of the diodes recovered completely after one week, and the RS partly recovered.

Silicothermic reduction of MgO using diode laser:Experimental and kinetic study

As a step toward realizing magnesium civilization,which needs a sustainable Mg production process,the reduction of MgO to Mg has been investigated.Direct diode laser(DDL)produces high power and continuous beam in tiny spots.The laser with energy density up to 83*10^(5) W/cm^(2) is focused on MgO/Si target inside the vacuum chamber,creating the high temperature zone,which stimulates the Mg production reaction.The vapor is collected on the copper plate;and then,analyzed chemically in terms of Mg production efficiency.The largest reduction and energy efficiencies in Ar atmosphere were 41%and 15.3 mg kJ^(−1),while in the vacuum,13.5%and 15.8 mg kJ^(−1) were attainable.The reactions of MgO and Si have been investigated.Calculations revealed that the MgO reduction with Si proceeds as heterogeneous reaction.The rate of reaction of Si with MgO is faster than the rate of MgO evaporation and Mg vapor deposition.

Design of a novel high holding voltage LVTSCR with embedded clamping diode

In order to reduce the latch-up risk of the traditional low-voltage-triggered silicon controlled rectifier(LVTSCR), a novel LVTSCR with embedded clamping diode(DC-LVTSCR) is proposed and verified in a 0.18-μm CMOS process. By embedding a p+implant region into the drain of NMOS in the traditional LVTSCR, a reversed Zener diode is formed by the p+implant region and the n+bridge, which helps to improve the holding voltage and decrease the snapback region.The physical mechanisms of the LVTSCR and DC-LVTSCR are investigated in detail by transmission line pulse(TLP)tests and TCAD simulations. The TLP test results show that, compared with the traditional LVTSCR, the DC-LVTSCR exhibits a higher holding voltage of 6.2 V due to the embedded clamping diode. By further optimizing a key parameter of the DC-LVTSCR, the holding voltage can be effectively increased to 8.7 V. Therefore, the DC-LVTSCR is a promising ESD protection device for circuits with the operation voltage of 5.5–7 V.

Thermally annealed gamma irradiated Ni/4H-SiC Schottky barrier diode characteristics

Thermal annealing effects on gamma irradiated Ni/4 H-SiC Schottky barrier diode(SBD) characteristics are analyzed over a wide range of temperatures(400–1100 °C). The annealing induced variations in the concentration of deep level traps in the SBDs are identified by thermally stimulated capacitance(TSCAP). A little decrease in the trap density at E_C – 0.63 eV and E_C –1.13 eV is observed up to the annealing temperature of 600 °C. Whereas, a gamma induced trap at E_C – 0.89 eV disappeared after annealing at 500 °C, revealing that its concentration(< 1013 cm-3) is reduced below the detection limit of the TSCAP technique.The electrical characteristics of irradiated SBDs are considerably changed at each annealing temperature. To understand the anomalous variations in the post-annealing characteristics, the interface state density distribution in the annealed SBDs is extracted.The electrical properties are improved at 400 °C due to the reduction in the interface trap density. However, from 500 °C, the electrical parameters are found to degrade with the annealing temperature because of the increase in the interface trap density.From the results, it is noted that the rectifying nature of the SBDs vanishes at or above 800 °C.

Characterization of ion-implanted 4H-SiC Schottky barrier diodes

Ion-implantation layers are fabricated by multiple nitrogen ion-implantations （3 times for sample A and 4 times for sample B） into a p-type 4H-SiC epitaxial layer. The implantation depth profiles are calculated by using the Monte Carlo simulator TRIM. The fabrication process and the I-V and C V characteristics of the lateral Ti/4H-SiC Schottky barrier diodes （SBDs） fabricated on these multiple box-like ion-implantation layers are presented in detail. Measurements of the reverse I V characteristics demonstrate a low reverse current, which is good enough for many SiC-based devices such as SiC metal-semiconductor field-effect transistors （MESFETs）, and SiC static induction transistors （SITs）. The parameters of the diodes are extracted from the forward I-V and C-V characteristics. The values of ideality factor n of SBDs for samples A and B are 3.0 and 3.5 respectively, and the values of series resistance Rs are 11.9 and 1.0 kf~ respectively. The values of barrier height φB of Ti/4H-SiC are 0.95 and 0.72 eV obtained by the I-V method and 1.14 and 0.93 eV obtained by the C-V method for samples A and B respectively. The activation rates for the implanted nitrogen ions of samples A and B are 2% and 4% respectively extracted from C V testing results.