High performance analog and mixed signal circuits are strongly demanded in todays’system on chip systems.They found pervasive applications in A/D or D/A conversion,power management,radio frequency(RF)signal sensing a...High performance analog and mixed signal circuits are strongly demanded in todays’system on chip systems.They found pervasive applications in A/D or D/A conversion,power management,radio frequency(RF)signal sensing and processing,clock generation,etc.In this special issue,we collected 7 comprehensive reviews and 2 research articles from leading research groups,which presented state-of-art design techniques and insight forecast of development trend in this hot area.展开更多
为了实现较高的电容检测范围,传统的采用SAR ADC的开关电容(Switched capacitor,SC)的电容数字转换器(Capacitance to digital converter,CDC)使用高压供电提高输出摆幅,而其为了保证噪声性能又采用大电流驱动,所以显著增加了系统功耗...为了实现较高的电容检测范围,传统的采用SAR ADC的开关电容(Switched capacitor,SC)的电容数字转换器(Capacitance to digital converter,CDC)使用高压供电提高输出摆幅,而其为了保证噪声性能又采用大电流驱动,所以显著增加了系统功耗。为了解决以上问题,提出了一种基于数字放大器的电容数字转换器,将CDAC阵列作为模拟输出承担高压。仅对CDAC阵列与传感电容采用高压(5 V)驱动,而其余部分仍采用低压(1 V)供电,使得CDC在达到高动态范围与高灵敏度的同时保持低功耗、低噪声。此外,针对噪声的优化,本文一方面通过在数字放大器内加入积分环路实现SAR ADC的一阶噪声整形,降低了系统的量化噪声,提高了CDC的有效位数;另一方面通过引入有源噪声抵消(Active noise cancellation technology,ANC)技术,降低了系统的混叠噪声,提高了系统的信噪比。展开更多
A digital calibration technique for an ultra high-speed folding and interpolating analog-to-digital con- verter in 0.18-μm CMOS technology is presented. The similar digital calibration techniques are taken for high 3...A digital calibration technique for an ultra high-speed folding and interpolating analog-to-digital con- verter in 0.18-μm CMOS technology is presented. The similar digital calibration techniques are taken for high 3-bit flash converter and low 5-bit folding and interpolating converter, which are based on well-designed calibration reference, calibration DAC and comparators. The spice simulation and the measured results show the ADC produces 5.9 ENOB with calibration disabled and 7.2 ENOB with calibration enabled for high-frequency wide-bandwidth analog input.展开更多
Switched-capacitor(SC)DC-DC converter[1]is an impor-tant alternative to inductive DC-DC converter,in terms of removing the bulky power inductor.Hence,it is widely used in low-profile,low-power applications,such as the...Switched-capacitor(SC)DC-DC converter[1]is an impor-tant alternative to inductive DC-DC converter,in terms of removing the bulky power inductor.Hence,it is widely used in low-profile,low-power applications,such as the internet of things(IoT)sensor nodes and energy harvesting[2].Mean-while,considering that capacitor has a much higher energy density than inductor,high-power applications.展开更多
Statistical regression models are input-oriented estimation models that account for observation errors. On the other hand, an output-oriented possibility regression model that accounts for system fluctuations is propo...Statistical regression models are input-oriented estimation models that account for observation errors. On the other hand, an output-oriented possibility regression model that accounts for system fluctuations is proposed. Furthermore, the possibility Markov chain is proposed, which has a disidentifiable state (posterior) and a nondiscriminable state (prior). In this paper, we first take up the entity efficiency evaluation problem as a case study of the posterior non-discriminable production possibility region and mention Fuzzy DEA with fuzzy constraints. Next, the case study of the ex-ante non-discriminable event setting is discussed. Finally, we introduce the measure of the fuzzy number and the equality relation and attempt to model the possibility Markov chain mathematically. Furthermore, we show that under ergodic conditions, the direct sum state can be decomposed and reintegrated using fuzzy OR logic. We had already constructed the Possibility Markov process based on the indifferent state of this world. In this paper, we try to extend it to the indifferent event in another world. It should be noted that we can obtain the possibility transfer matrix by full use of possibility theory.展开更多
An integrated quantum probe for magnetic field imaging is proposed,where the nitrogen–vacancy(NV)center fixed at the fiber tip is located on the periphery of flexible ring resonator.Using flexible polyimide(PI)as the...An integrated quantum probe for magnetic field imaging is proposed,where the nitrogen–vacancy(NV)center fixed at the fiber tip is located on the periphery of flexible ring resonator.Using flexible polyimide(PI)as the substrate medium,we design a circular microstrip antenna,which can achieve a bandwidth of 140 MHz at Zeeman splitting frequency of 2.87 GHz,specifically suitable for NV center experiments.Subsequently,this antenna is seamlessly fixed at a three-dimensional-printed cylindrical support,allowing the optical fiber tip to extend out of a dedicated aperture.To mitigate errors originating from processing,precise tuning within a narrow range can be achieved by adjusting the conformal amplitude.Finally,we image the microwave magnetic field around the integrated probe with high resolution,and determine the suitable area for placing the fiber tip(SAP).展开更多
A 2-Gsample/s 8-b analog-to-digital converter in 0.35μm BiCMOS process technology is presented. The ADC uses the unique folding and interpolating algorithm and dual-channel timing interleave multiplexing technology t...A 2-Gsample/s 8-b analog-to-digital converter in 0.35μm BiCMOS process technology is presented. The ADC uses the unique folding and interpolating algorithm and dual-channel timing interleave multiplexing technology to achieve a sampling rate of 2 GSPS.Digital calibration technology is used for the offset and gain corrections of the S/H circuit,the offset correction of preamplifier,and the gain and clock phase corrections between channels.As a result of testing,the ADC achieves 7.32 ENOB at an analog input of 484 MHz and 7.1 ENOB at Nyquist input after the chip is self-corrected.展开更多
This paper presents a 16-bit 2 GSPS digital-to-analog converter （DAC） in 0.18/zm CMOS technology. This DAC is implemented using time division multiplex access system architecture in the digital domain. The input dat...This paper presents a 16-bit 2 GSPS digital-to-analog converter （DAC） in 0.18/zm CMOS technology. This DAC is implemented using time division multiplex access system architecture in the digital domain. The input data is received with a two-channel LVDS interface. The DLL technology is introduced to meet the timing requirements between phases of the LVDS data and the data sampling clock. A FIFO is designed to absorb the phase difference between the data clock and DAC system clock. A delay controller is integrated to adjust the phase relationship between the high speed digital clock and analog clock, obtaining a sampling rate of 2 GSPS. The current source mismatch at higher bits is calibrated in the digital domain. Test results show that the DAC achieves 74.02 dBC SFDR at analog output of 36 MHz, and DNL less than ±2.1 LSB ＆ INL less than ±4.3 LSB after the chip is calibrated.展开更多
Qinghaosu 1 isolated from Artemisia annua L. has attracted great interest in recent years owing to its unique chemical structure and potent antimalarial activity, especially against chloroquine-resistant faleiprum mal...Qinghaosu 1 isolated from Artemisia annua L. has attracted great interest in recent years owing to its unique chemical structure and potent antimalarial activity, especially against chloroquine-resistant faleiprum malaria. A series of studies have been carried out on its reactions, total synthesis and analogs.For preparation of more Qing-展开更多
文摘High performance analog and mixed signal circuits are strongly demanded in todays’system on chip systems.They found pervasive applications in A/D or D/A conversion,power management,radio frequency(RF)signal sensing and processing,clock generation,etc.In this special issue,we collected 7 comprehensive reviews and 2 research articles from leading research groups,which presented state-of-art design techniques and insight forecast of development trend in this hot area.
基金Project supported by the National Natural Science Foundation of China(Nos.60906009,60773025)the Postdoctoral Science Foundation of China(No.20090451423)the National Labs of Analog Integrated Circuits Foundation(No.9140C0901110902)
文摘A digital calibration technique for an ultra high-speed folding and interpolating analog-to-digital con- verter in 0.18-μm CMOS technology is presented. The similar digital calibration techniques are taken for high 3-bit flash converter and low 5-bit folding and interpolating converter, which are based on well-designed calibration reference, calibration DAC and comparators. The spice simulation and the measured results show the ADC produces 5.9 ENOB with calibration disabled and 7.2 ENOB with calibration enabled for high-frequency wide-bandwidth analog input.
基金This work is supported by the Macao Science and Technology Development Fund(FDCT)under Grant 0041/2022/A1by the Research Committee of University of Macao under Grant MYRG2022-00004-IME.
文摘Switched-capacitor(SC)DC-DC converter[1]is an impor-tant alternative to inductive DC-DC converter,in terms of removing the bulky power inductor.Hence,it is widely used in low-profile,low-power applications,such as the internet of things(IoT)sensor nodes and energy harvesting[2].Mean-while,considering that capacitor has a much higher energy density than inductor,high-power applications.
文摘Statistical regression models are input-oriented estimation models that account for observation errors. On the other hand, an output-oriented possibility regression model that accounts for system fluctuations is proposed. Furthermore, the possibility Markov chain is proposed, which has a disidentifiable state (posterior) and a nondiscriminable state (prior). In this paper, we first take up the entity efficiency evaluation problem as a case study of the posterior non-discriminable production possibility region and mention Fuzzy DEA with fuzzy constraints. Next, the case study of the ex-ante non-discriminable event setting is discussed. Finally, we introduce the measure of the fuzzy number and the equality relation and attempt to model the possibility Markov chain mathematically. Furthermore, we show that under ergodic conditions, the direct sum state can be decomposed and reintegrated using fuzzy OR logic. We had already constructed the Possibility Markov process based on the indifferent state of this world. In this paper, we try to extend it to the indifferent event in another world. It should be noted that we can obtain the possibility transfer matrix by full use of possibility theory.
基金Project supported by the National Key Research and Development Program of China(Grant No.2021YFB2012600)the Science and Technology Plan Project of State Administration of Market Regulation,China(Grant No.2021MK039)。
文摘An integrated quantum probe for magnetic field imaging is proposed,where the nitrogen–vacancy(NV)center fixed at the fiber tip is located on the periphery of flexible ring resonator.Using flexible polyimide(PI)as the substrate medium,we design a circular microstrip antenna,which can achieve a bandwidth of 140 MHz at Zeeman splitting frequency of 2.87 GHz,specifically suitable for NV center experiments.Subsequently,this antenna is seamlessly fixed at a three-dimensional-printed cylindrical support,allowing the optical fiber tip to extend out of a dedicated aperture.To mitigate errors originating from processing,precise tuning within a narrow range can be achieved by adjusting the conformal amplitude.Finally,we image the microwave magnetic field around the integrated probe with high resolution,and determine the suitable area for placing the fiber tip(SAP).
文摘A 2-Gsample/s 8-b analog-to-digital converter in 0.35μm BiCMOS process technology is presented. The ADC uses the unique folding and interpolating algorithm and dual-channel timing interleave multiplexing technology to achieve a sampling rate of 2 GSPS.Digital calibration technology is used for the offset and gain corrections of the S/H circuit,the offset correction of preamplifier,and the gain and clock phase corrections between channels.As a result of testing,the ADC achieves 7.32 ENOB at an analog input of 484 MHz and 7.1 ENOB at Nyquist input after the chip is self-corrected.
文摘This paper presents a 16-bit 2 GSPS digital-to-analog converter （DAC） in 0.18/zm CMOS technology. This DAC is implemented using time division multiplex access system architecture in the digital domain. The input data is received with a two-channel LVDS interface. The DLL technology is introduced to meet the timing requirements between phases of the LVDS data and the data sampling clock. A FIFO is designed to absorb the phase difference between the data clock and DAC system clock. A delay controller is integrated to adjust the phase relationship between the high speed digital clock and analog clock, obtaining a sampling rate of 2 GSPS. The current source mismatch at higher bits is calibrated in the digital domain. Test results show that the DAC achieves 74.02 dBC SFDR at analog output of 36 MHz, and DNL less than ±2.1 LSB ＆ INL less than ±4.3 LSB after the chip is calibrated.
文摘Qinghaosu 1 isolated from Artemisia annua L. has attracted great interest in recent years owing to its unique chemical structure and potent antimalarial activity, especially against chloroquine-resistant faleiprum malaria. A series of studies have been carried out on its reactions, total synthesis and analogs.For preparation of more Qing-
