Analysis and Characterization of Normally-Off Gallium Nitride High Electron Mobility Transistors

High electron mobility transistor(HEMT)based on gallium nitride(GaN)is one of the most promising candidates for the future generation of high frequencies and high-power electronic applications.This research work aims at designing and characterization of enhancement-mode or normally-off GaN HEMT.The impact of variations in gate length,mole concentration,barrier variations and other important design parameters on the performance of normally-off GaN HEMT is thoroughly investigated.An increase in the gate length causes a decrease in the drain current and transconductance,while an increase in drain current and transconductance can be achieved by increasing the concentration of aluminium(Al).For Al mole fractions of 23%,25%,and 27%,within Al gallium nitride(AlGaN)barrier,the GaN HEMT devices provide a maximum drain current of 347,408 and 474 mA/μm and a transconductance of 19,20.2,21.5 mS/μm,respectively.Whereas,for Al mole fraction of 10%and 15%,within AlGaN buffer,these devices are observed to provide a drain current of 329 and 283 mA/μm,respectively.Furthermore,for a gate length of 2.4,3.4,and 4.4μm,the device is observed to exhibit a maximum drain current of 272,235,and 221 mA/μm and the transconductance of 16.2,14,and 12.3 mS/μm,respectively.It is established that a maximum drain current of 997 mA/μm can be achieved with an Al concentration of 23%,and the device exhibits a steady drain current with enhanced transconductance.These observations demonstrate tremendous potential for two-dimensional electron gas(2DEG)for securing of the normally-off mode operation.A suitable setting of gate length and other design parameters is critical in preserving the normally-off mode operation while also enhancing the critical performance parameters at the same time.Due to the normallyon depletion-mode nature of GaN HEMT,it is usually not considered as suitable for high power levels,frequencies,and temperature.In such settings,a negative bias is required to enter the blocking condition;however,in the before-mentioned normally-off devices,the negative bias can be avoided and the channel can be depleted without applying a negative bias.

A review on non-isolated low-power DC-DC converter topologies with high output gain for solar photovoltaic system applications

The major challenges of the high-gain DC-DC boost converters are high-voltage stress on the switch,extreme duty ratio operation,diode reverse-recovery and converter efficiency problems.There are many topologies of high-gain converters that have been widely developed to overcome those problems,especially for solar photovoltaic(PV)power-system applications.In this paper,20 high-gain and low-power DC-DC converter topologies are selected from many topologies of available literature.Then,seven prospective topologies with conversion ratios of>15 are thoroughly reviewed and compared.The selected topologies are:(i)voltage-multiplier cell,(ii)voltage doubler,(iii)coupled inductor,(iv)converter with a coupled inductor and switch capacitor,(v)converter with a switched inductor and switched capacitor,(vi)cascading techniques and(vii)voltage-lift techniques.Each topology has its advantages and disadvantages.A comparison of the seven topologies is provided in terms of the number of components,hardware complexity,maximum converter efficiency and voltage stress on the switch.These are presented in detail.So,in the future,it will be easier for researchers and policymakers to choose the right converter topologies and build them into solar PV systems based on their needs.