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DFT Techniques in DSP Chip Core NDSP25
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作者 XUEJing BAIYong-qiang DENGZheng-hong ZHENGWei 《医学信息(医学与计算机应用)》 2004年第3期118-122,共5页
Design for Testability(DFT) is critical in chip design.DFT techniques insert hardware logic to an original design,in order to improve testability of the chip,and thus reduce test cost significantly.In this paper,we in... Design for Testability(DFT) is critical in chip design.DFT techniques insert hardware logic to an original design,in order to improve testability of the chip,and thus reduce test cost significantly.In this paper,we introduces the most frequently used DFT techniques,then put emphasis on the DFT policy and the DFT realization of the NDSP25 chip core,and analyses the result at last. 展开更多
关键词 易测性设计 NDSP25芯片 自测 数字信号处理
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