MoS_(2)/Si tunnel diodes based on comprehensive transfer technique

Due to the pristine interface of the 2D/3D face-tunneling heterostructure with an ultra-sharp doping profile, the 2D/3D tunneling field-effect transistor(TFET) is considered as one of the most promising low-power devices that can simultaneously obtain low off-state current(IOFF), high on-state current(ION) and steep subthreshold swing(SS). As a key element for the 2D/3D TFET, the intensive exploration of the tunnel diode based on the 2D/3D heterostructure is in urgent need.The transfer technique composed of the exfoliation and the release process is currently the most common approach to fabricating the 2D/3D heterostructures. However, the well-established transfer technique of the 2D materials is still unavailable.Only a small part of the irregular films can usually be obtained by mechanical exfoliation, while the choice of the chemical exfoliation may lead to the contamination of the 2D material films by the ions in the chemical etchants. Moreover, the deformation of the 2D material in the transfer process due to its soft nature also leads to the nonuniformity of the transferred film,which is one of the main reasons for the presence of the wrinkles and the stacks in the transferred film. Thus, the large-scale fabrication of the high-quality 2D/3D tunnel diodes is limited. In this article, a comprehensive transfer technique that can mend up the shortages mentioned above with the aid of the water and the thermal release tape(TRT) is proposed. Based on the method we proposed, the MoS_(2)/Si tunnel diode is experimentally demonstrated and the transferred monolayer MoS_(2) film with the relatively high crystal quality is confirmed by atomic force microscopy(AFM), scanning electron microscopy(SEM), and Raman characterizations. Besides, the prominent negative differential resistance(NDR) effect is observed at room temperature, which verifies the relatively high quality of the MoS_(2)/Si heterojunction. The bilayer MoS_(2)/Si tunnel diode is also experimentally fabricated by repeating the transfer process we proposed, followed by the specific analysis of the electrical characteristics. This study shows the advantages of the transfer technique we proposed and indicates the great application foreground of the fabricated 2D/3D heterostructure for ultralow-power tunneling devices.

High on-state current p-type tunnel effect transistor based on doping modulation

To solve the problem of the low on-state current in p-type tunnel field-effect transistors(p-TFETs),this paper analyzes the mechanism of adjusting the tunneling current of a TFET device determined by studying the influence of the peak position of ion implantation on the potential of the p-TFET device surface and the width of the tunneling barrier.Doping-regulated silicon-based high on-state p-TFET devices are designed and fabricated,and the test results show that the on-state current of the fabricated devices can be increased by about two orders of magnitude compared with the current of other devices with the same structure.This method provides a new idea for the realization of high on-state current TFET devices.

A Configurable Circuit for Cross-Correlation in Real-Time Image Matching

Cross-correlation （CC） is the most time-consuming in the implementation of image matching algorithms based on the correlation method. Therefore, how to calculate CC fast is crucial to real-time image matching. This work reveals that the single cascading multiply-accumulate （CAMAC） and concurrent multiply-accumulate （COMAC） architectures which have been widely used in the past, actually, do not necessarily bring about a satisfactory time performance for CC. To obtain better time performance and higher resource efficiency, this paper proposes a configurable circuit involving the advantages of CAMAC and COMAC for a large amount of multiply-accumulate （MAC） operations of CC in exhaustive search. The proposed circuit works in an array manner and can better adapt to changing size image matching in real-time processing. Experimental results demonstrate that this novel circuit which involves the two structures can complete vast MAC calculations at a very high speed. Compared with existing related work, it improves the computation density further and is more flexible to use.