Frequency domain based DC fault analysis for bipolar HVDC grids

This paper proposes a frequency domain based methodology to analyse the influence of High Voltage Direct Current(HVDC) configurations and system parameters on the travelling wave behaviour during a DC fault. The method allows us to gain deeper understanding of these influencing parameters. In the literature, the majority of DC protection algorithms essentially use thefirst travelling waves initiated by a DC fault for fault discrimination due to the stringent time constraint in DC grid protection. However, most protection algorithms up to now have been designed based on extensive time domain simulations using one specific test system. Therefore, general applicability or adaptability to different configurations and system changes is not by default ensured, and it is difficult to gain in-depth understanding of the influencing parameters through time domain simulations. In order to analyse the first travelling wave for meshed HVDC grids, voltage and current wave transfer functions with respect to the incident voltage wave are derived adopting Laplace domain based component models. The step responses obtained from the voltage transfer functions are validated by comparison against simulations using a detailed model implemented in PSCADTM. Then, the influences of system parameters such as the number of parallel branches, HVDC grid configurations and groundings on the first travelling wave are investigated by analysing the voltage and current transfer functions.

A hybrid circuit breaker with fault current limiter circuit in a VSC-HVDC application

A conventional hybrid circuit breaker(HCB)is used to protect a voltage source converter-based high voltage direct current transmission system(VSC-HVDC)from a short circuit fault.With the increased converter capacity,the DC protection equipment also requires a regular upgrade.This paper adopts a novel type of HCB with a fault current limiter circuit(FCLC),and focuses on the responses of voltage and current during DC faults,which are associated with parameter selection.PSCAD/EMTDC based simulation of a three-terminal VSC-HVDC system confirms the effectiveness and value of HCB with FCLC,by using an equivalent circuit modelling approach.Laboratory experimental tests validate the simulation results.The peak fault current is reduced according to the current limiting inductor(CLI)increase,and can be isolated more quickly.By adopting parallel metal oxide arrester(MOA)with the main branch of HCB,voltage stresses across the breaker components decrease during transient and continuous operation,and less energy needs to be dissipated by the MOA.The remnant current for all cases is transmitted to power dissipating resis-tor(PDR)in the final stage,and the fault current is reduced to the lowest possible value.When the current from the main branch is transferred to the FCLC branch,transient voltage spikes occur,while smaller PDR is required to absorb current in the final stage.

Signal Processing for Fast Fault Detection in HVDC Grids

For multiterminal or meshed Voltage Source Converter(VSC)High-voltage Direct Current(HVDC)systems,high speed protection against DC faults is essential,as power electronic components cannot withstand the rapidly increasing fault currents which would otherwise result.Recently proposed DC fault detection methods were developed based on time domain simulations in EMT-type software,which requires considerable modeling and computational efforts and results in methods specifically designed for the HVDC grid under study.To simplify the initial design of DC fault detection methods,this paper proposes general guidelines based on fundamental theory and offers a reduced modeling approach.Furthermore,the impact of non-ideal measurements is investigated and a method to choose the filters that optimally discriminate these fault signals from noise,is proposed.The approach was evaluated in a case study on fault detection in a realistically dimensioned HVDC grid.The paper shows that the initial design of fast fault detection methods can be based on the relatively simple proposed guidelines and reduced models.The paper furthermore shows that a sufficiently high sampling frequency and a filter matched to the fault signal enable fault detection within hundreds of microseconds and discrimination of DC faults from transients not related to DC faults.