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面向同步规范的并行代码自动生成 被引量:3
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作者 胡凯 张腾 +2 位作者 尚利宏 杨志斌 Jean-Pierre TALPIN 《软件学报》 EI CSCD 北大核心 2017年第7期1698-1712,共15页
随着对安全攸关实时系统功能与非功能要求的日益增加,使用多核技术将成为发展趋势.如何在多核平台条件下保证系统运行的可信任性及可靠性是学术上和应用上的关键问题.目前基于形式化方法的系统设计、验证以及自动代码生成已在单核平台... 随着对安全攸关实时系统功能与非功能要求的日益增加,使用多核技术将成为发展趋势.如何在多核平台条件下保证系统运行的可信任性及可靠性是学术上和应用上的关键问题.目前基于形式化方法的系统设计、验证以及自动代码生成已在单核平台上形成很多研究成果,但在多核平台上的研究仍面临许多科学问题.同步语言SIGNAL是一种被广泛应用于安全攸关实时系统功能设计的形式化方法,适用于对系统确定性并发行为的描述.SIGNAL编译器也支持将同步规范(synchronous specification)生成仿真代码,以对其进行验证与分析.然而,现有研究较少关注从SIGNAL同步规范到支持跨平台并行代码的生成方法.研究了面向SIGNAL同步规范的并行自动代码生成方法.提出了方程依赖图EDG的概念,将SIGNAL规范转换为EDG以分析其全局数据依赖关系;研究了对EDG进行任务划分获取规范中可以并行执行部分的算法;最后,以跨平台并行编程API-Open MP作为对象,结合程序中信号的时钟关系,将并行任务映射到Open MP并行代码,并进行了实例验证. 展开更多
关键词 同步规范 SIGNAL 并行程序 代码生成 OPENMP
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GPU的并行支持向量机算法(英文) 被引量:6
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作者 DO Thanh-Nghi NGUYEN Van-Hoa POULET Franqois 《计算机科学与探索》 CSCD 2009年第4期368-377,共10页
提出了一种新的并行增量式支持向量机算法来解决图形处理单元(GPU)中大规模数据集的分类问题。SVM以及核相关方法可以用来创建精确分类模型,但学习过程需要大量内存和很长时间。扩展了Suykens和Vandewalle提出的最少次方SVM(LS-SVM)方... 提出了一种新的并行增量式支持向量机算法来解决图形处理单元(GPU)中大规模数据集的分类问题。SVM以及核相关方法可以用来创建精确分类模型,但学习过程需要大量内存和很长时间。扩展了Suykens和Vandewalle提出的最少次方SVM(LS-SVM)方法来建立增量和并行算法。新算法使用图形处理器以低代价获得高系统性能。实现表明,在UCI和Delve数据集上,基于GPU并行增量算法较CPU实现方法快130倍,而且比现行算法,如LibSVM、SVM-perf和CB-SVM等快的多(超过2500倍)。 展开更多
关键词 支持向量机 图形处理器 最少次方SVM
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Energy-Efficient Methods for Highly Correlated Spatio-Temporal Environments in Wireless Sensor Network Communications
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作者 Mohammad Abdul Azim Zeyar Aung +3 位作者 Sofiane Moad Nizar Bouabdallah Mario E. Rivero-Angeles Israel Leyva-Mayorga 《Wireless Sensor Network》 2014年第5期67-92,共26页
Continuous-monitoring (CM) of natural phenomenon is one of the major streams of applications in wireless sensor networks (WSNs), where aggregation and clustering techniques are beneficial as correlation dominates in b... Continuous-monitoring (CM) of natural phenomenon is one of the major streams of applications in wireless sensor networks (WSNs), where aggregation and clustering techniques are beneficial as correlation dominates in both spatial and temporal aspects of sensed phenomenon. Conversely, in Event Driven Reporting (EDR), the efficient transmission of sensitive data related to some predefined alarm cases is of major importance. As such, reporting latency is a more important performance parameter. However, in some applications, the transmission of both CM and EDR data is encouraged or even required. For either CM or EDR applications, system performance can be greatly improved when both the number of packets to be transmitted as well as the packet size is reduced. This is especially true for highly dense sensor networks where many nodes detect the same values for the sensed phenomenon. Building on this, this paper focuses on studying and proposing compression techniques to improve the system performance in terms of energy consumption and reporting latency in both CM and EDR applications. Furthermore, we extend our analysis to hybrid networks where CM and EDR are required simultaneously. Specifically, this paper presents a simple aggregation technique named smart aggregation (SAG) for the CM applications and an event driven scheme named compression cluster scheme in spatial correlated region (CC_SCR). The proposed SAG exploits both spatial and temporal correlations where CC_SCR exploits the spatial correlation of such networks by data compression. Rationalizing the developments is attained by simulations that compare energy efficiency of the proposed SAG with k-hop aggregation and CM based event driven reporting (CMEDR) schemes. Results of CC_SCR show that the technique may reduce the energy consumption drastically. In some specific cases the reduction becomes more than 10 times compared to a classical clustering scheme. Two different strategies for the transmission of event reports through the CM infrastructure are incorporated: PER and NPER protocols. Both strategies take advantage of the cluster-based architecture which assigns a TDMA schedule for the CM data transmission while using NP/CSMA for the transmission of the event information. Consequently, no extra energy is consumed for separate event clusters. As such, the number of packets to be transmitted is greatly reduced. 展开更多
关键词 Wireless Sensor Networks AGGREGATION Continuous-Monitoring Event Driven REPORTING Data Compression Clustering
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Exploring system architectures in AADL via POLYCHRONY and SYNDEx 被引量:2
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作者 Huafeng YU Yue MA +4 位作者 Thierry GAUTIER LoYc BESNARD Jean-Pierre TALPIN Paul Le GUERNIC Yves SOREL 《Frontiers of Computer Science》 SCIE EI CSCD 2013年第5期627-649,共23页
Architecture analysis & design language (AADL) has been increasingly adopted in the design of em- bedded systems, and corresponding scheduling and formal verification have been well studied. However, little work ta... Architecture analysis & design language (AADL) has been increasingly adopted in the design of em- bedded systems, and corresponding scheduling and formal verification have been well studied. However, little work takes code distribution and architecture exploration into ac- count, particularly considering clock constraints, for dis- tributed multi-processor systems. In this paper, we present an overview of our approach to handle these concerns, together with the associated toolchain, AADL-PoLYCHRONY-SYNDEx. First, in order to avoid semantic ambiguities of AADL, the polychronous/multiclock semantics of AADL, based on a polychronous model of computation, is considered. Clock synthesis is then carried out in POLYCHRONY, which bridges the gap between the polychronous semantics and the syn- chronous semantics of SYNDEx. The same timing semantics is always preserved in order to ensure the correctness of the transformations between different formalisms. Code distri- bution and corresponding scheduling is carried out on the obtained SYNDEx model in the last step, which enables the exploration of architectures originally specified in AADL. Our contribution provides a fast yet efficient architecture ex- ploration approach for the design of distributed real-time and embedded systems. An avionic case study is used here to illustrate our approach. 展开更多
关键词 POLYCHRONY SIGNAL AADL SYNDEx architec-ture exploration modeling timing analysis scheduling dis-tribution
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Rotational Forms of Large Eddy Simulation Turbulence Models:Modeling and Mathematical Theory
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作者 Luigi C.BERSELLI Roger LEWANDOWSKI Dinh Duong NGUYEN 《Chinese Annals of Mathematics,Series B》 SCIE CSCD 2021年第1期17-40,共24页
In this paper the authors present a derivation of a back-scatter rotational Large Eddy Simulation model,which is the extension of the Baldwin&Lomax model to nonequilibrium problems.The model is particularly design... In this paper the authors present a derivation of a back-scatter rotational Large Eddy Simulation model,which is the extension of the Baldwin&Lomax model to nonequilibrium problems.The model is particularly designed to mathematically describe a fluid filling a domain with solid walls and consequently the differential operators appearing in the smoothing terms are degenerate at the boundary.After the derivation of the model,the authors prove some of the mathematical properties coming from the weighted energy estimates,which allow to prove existence and uniqueness of a class of regular weak solutions. 展开更多
关键词 Fluid mechanics Turbulence models Rotational Large Eddy Simulation models Navier-Stokes equations
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TRAP:trace runtime analysis of properties
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作者 Daian YUE Vania JOLOBOFF Frederic MALLET 《Frontiers of Computer Science》 SCIE EI CSCD 2020年第3期15-29,共15页
We present a method and a tool for the verification of causal and temporal properties for embedded systems.We analyze trace streams resulting from the execution of virtual prototypes that combine simulated hardware an... We present a method and a tool for the verification of causal and temporal properties for embedded systems.We analyze trace streams resulting from the execution of virtual prototypes that combine simulated hardware and embedded software.The main originality lies in the use of logical clocks to abstract away irrelevant information from the trace.We propose a model-based approach that relies on domain specific languages(DSL).A first DSL,called TISL(trace item specification language),captures the relevant data structures.A second DSL,called STML(simulation trace mapping language),abstracts the simulation raw data into logical clocks,abstracting simulation data into relevant observation probes and thus reducing the trace streams size.The third DSL,called TPSL,defines a set of behavioral patterns that include widely used temporal properties.This is meant for users who are not familiar with temporal logics.Each pattern is transformed into an automata.All the automata are executed concurrently and each one raises an error if and when the related TPSL property is violated.The contribution is the integration of this pattern-based property specification language into the SimSoC virtual prototyping framework without requiring to recompile all the simulation models when the properties evolve.We illustrate our approach with experiments that show the possibility to use multi-core platforms to parallelize the simulation and verification processes,thus reducing the verification time. 展开更多
关键词 runtime verification trace analysis property specification logical clocks SIMULATION virtual prototyping
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