The circular phased antenna array is commonly used for generating waves bearing Orbital Angular Momentum (OAM) in the radio frequency band, but it achieves a relatively low directivity. To overcome this drawback, we p...The circular phased antenna array is commonly used for generating waves bearing Orbital Angular Momentum (OAM) in the radio frequency band, but it achieves a relatively low directivity. To overcome this drawback, we present here a method to improve the directivity of an OAM circular phased antenna array by embedding it inside a Fabry-Perot cavity. The Fabry-Perot cavity contains three main parts: a partially reflecting surface (PRS), an air cavity and a ground plane. Simulation data show that the directivity of this new OAM antenna achieves an improvement of 8.2 dB over the original array. A prototype is realized and characterized. The simulated and measured characteristics are in good agreement.展开更多
A wireless communication system can be tested either in actual conditions or by a hardware simulator reproducing actual conditions. With a hardware simulator it is possible to freely simulate a desired type of a radio...A wireless communication system can be tested either in actual conditions or by a hardware simulator reproducing actual conditions. With a hardware simulator it is possible to freely simulate a desired type of a radio channel and making it possible to test “on table” mobile radio equipment. This paper presents an architecture for the digital block of a hardware simulator of MIMO propagation channels. This simulator can be used for LTE and WLAN IEEE 802.11ac applications, in indoor and outdoor environments. However, in this paper, specific architecture of the digital block of the simulator is presented to characterize a scenario indoor to outdoor using TGn channel models. The switching between each environment in the scenario must be made in a continuous manner. Therefore, an algorithm is designed to pass from a considered impulse response in the environment to another in other environment. The architecture of the digital block of the hardware simulator is presented and implemented on a Xilinx Virtex-IV FPGA. Moreover, the impulse responses are transferred into the simulator. The accuracy, the occupation on the FPGA and the latency of the architecture are analyzed.展开更多
A hardware simulator reproduces the behavior of the radio propagation channel, thus making it possible to test “on table” the mobile radio equipments. The simulator can be used for LTE and WLAN 802.11ac applications...A hardware simulator reproduces the behavior of the radio propagation channel, thus making it possible to test “on table” the mobile radio equipments. The simulator can be used for LTE and WLAN 802.11ac applications, in indoor and outdoor environments. In this paper, the input signals parameters and the relative power of the impulse responses are related to the relative error and SNR of the output signals. After analyzing the influence of these parameters on the output error and SNR, an algorithm based on an Auto-Scale Factor (ASF) is analyzed in details to improve the precision of the output signals of the hardware simulator digital block architecture. Moreover, the circuit needed for the validation of this algorithm has been introduced, verified and realized. It is shown that this solution increases the output SNR if the relative powers of the impulse responses are attenuated. The new architecture of the digital block is presented and implemented on a Xilinx Virtex-IV FPGA. The occupation on the FPGA and the accuracy of the architecture are analyzed.展开更多
文摘The circular phased antenna array is commonly used for generating waves bearing Orbital Angular Momentum (OAM) in the radio frequency band, but it achieves a relatively low directivity. To overcome this drawback, we present here a method to improve the directivity of an OAM circular phased antenna array by embedding it inside a Fabry-Perot cavity. The Fabry-Perot cavity contains three main parts: a partially reflecting surface (PRS), an air cavity and a ground plane. Simulation data show that the directivity of this new OAM antenna achieves an improvement of 8.2 dB over the original array. A prototype is realized and characterized. The simulated and measured characteristics are in good agreement.
文摘A wireless communication system can be tested either in actual conditions or by a hardware simulator reproducing actual conditions. With a hardware simulator it is possible to freely simulate a desired type of a radio channel and making it possible to test “on table” mobile radio equipment. This paper presents an architecture for the digital block of a hardware simulator of MIMO propagation channels. This simulator can be used for LTE and WLAN IEEE 802.11ac applications, in indoor and outdoor environments. However, in this paper, specific architecture of the digital block of the simulator is presented to characterize a scenario indoor to outdoor using TGn channel models. The switching between each environment in the scenario must be made in a continuous manner. Therefore, an algorithm is designed to pass from a considered impulse response in the environment to another in other environment. The architecture of the digital block of the hardware simulator is presented and implemented on a Xilinx Virtex-IV FPGA. Moreover, the impulse responses are transferred into the simulator. The accuracy, the occupation on the FPGA and the latency of the architecture are analyzed.
文摘A hardware simulator reproduces the behavior of the radio propagation channel, thus making it possible to test “on table” the mobile radio equipments. The simulator can be used for LTE and WLAN 802.11ac applications, in indoor and outdoor environments. In this paper, the input signals parameters and the relative power of the impulse responses are related to the relative error and SNR of the output signals. After analyzing the influence of these parameters on the output error and SNR, an algorithm based on an Auto-Scale Factor (ASF) is analyzed in details to improve the precision of the output signals of the hardware simulator digital block architecture. Moreover, the circuit needed for the validation of this algorithm has been introduced, verified and realized. It is shown that this solution increases the output SNR if the relative powers of the impulse responses are attenuated. The new architecture of the digital block is presented and implemented on a Xilinx Virtex-IV FPGA. The occupation on the FPGA and the accuracy of the architecture are analyzed.
